?? cstartup.lst
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###############################################################################
# #
# IAR Systems ARM Assembler V4.30A/W32 14/Nov/2006 15:13:49 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Source file = G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 CAN通訊實驗\BasicCAN-SAM7X\compil\srcIAR\Cstartup.s79#
# List file = G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 CAN通訊實驗\BasicCAN-SAM7X\compil\FLASH_Debug\List\Cstartup.lst#
# Object file = G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 CAN通訊實驗\BasicCAN-SAM7X\compil\FLASH_Debug\Obj\Cstartup.r79#
# Command line = G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 CAN通訊實驗\BasicCAN-SAM7X\compil\srcIAR\Cstartup.s79 #
# -OG:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 CAN通訊實驗\BasicCAN-SAM7X\compil\FLASH_Debug\Obj\ #
# -s+ -M<> -w+ -r #
# -LG:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 CAN通訊實驗\BasicCAN-SAM7X\compil\FLASH_Debug\List\ #
# -t8 --cpu ARM7TDMI --fpu None #
# -If:\Program Files\IAR Systems\Embedded Workbench 4.0 Evaluation\arm\INC\ #
# -IG:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 CAN通訊實驗\BasicCAN-SAM7X\compil\..\..\ #
# #
###############################################################################
1 00000000 ;-----------------------------------------------
-------------------------------
2 00000000 ;- ATMEL Microcontroller Software
Support - ROUSSET -
3 00000000 ;-----------------------------------------------
-------------------------------
4 00000000 ; The software is delivered "AS IS" without
warranty or condition of any
5 00000000 ; kind, either express, implied or statutory.
This includes without
6 00000000 ; limitation any warranty or condition with
respect to merchantability or
7 00000000 ; fitness for any particular purpose, or against
the infringements of
8 00000000 ; intellectual property rights of others.
9 00000000 ;-----------------------------------------------
------------------------------
10 00000000 ;- File source : Cstartup.s79
11 00000000 ;- Object : Generic CStartup for
IAR No Use REMAP
12 00000000 ;- Compilation flag : None
13 00000000 ;-
14 00000000 ;- 1.0 15/Jun/04 JPP : Creation
15 00000000 ;-----------------------------------------------
-------------------------------
16 00000000
17 00000000 #include "include/AT91SAM7X256_inc.h"
18 00000000
19 00000000 ;-----------------------------------------------
-------------------------------
20 00000000 ;- Area Definition
21 00000000 ;-----------------------------------------------
-------------------------------
22 00000000
23 00000000 ;-----------------------------------------------
----------------
24 00000000 ; ?RESET
25 00000000 ; Reset Vector.
26 00000000 ; Normally, segment INTVEC is linked at address
0.
27 00000000 ; For debugging purposes, INTVEC may be placed
at other
28 00000000 ; addresses.
29 00000000 ; A debugger that honors the entry point will
start the
30 00000000 ; program in a normal way even if INTVEC is not
at address 0.
31 00000000 ;-----------------------------------------------
--------------
32 00000000
33 00000000 PROGRAM ?RESET
34 00000000 RSEG INTRAMSTART_REMAP
35 00000000 RSEG INTRAMEND_REMAP
36 00000000
37 00000000 RSEG ICODE:CODE:ROOT(2)
38 00000000 CODE32 ; Always ARM mode after
reset
39 00000000 org 0
40 00000000 reset
41 00000000 ;-----------------------------------------------
-------------------------------
42 00000000 ;- Exception vectors
43 00000000 ;--------------------
44 00000000 ;- These vectors can be read at address 0 or at
RAM address
45 00000000 ;- They ABSOLUTELY requires to be in relative
addresssing mode in order to
46 00000000 ;- guarantee a valid jump. For the moment, all
are just looping.
47 00000000 ;- If an exception occurs before remap, this
would result in an infinite loop.
48 00000000 ;- To ensure if a exeption occurs before start
application to infinite loop.
49 00000000 ;-----------------------------------------------
-------------------------------
50 00000000
51 00000000 0F0000EA B InitReset
; 0x00 Reset handler
52 00000004 undefvec:
53 00000004 FEFFFFEA B undefvec
; 0x04 Undefined Instruction
54 00000008 swivec:
55 00000008 FEFFFFEA B swivec
; 0x08 Software Interrupt
56 0000000C pabtvec:
57 0000000C FEFFFFEA B pabtvec
; 0x0C Prefetch Abort
58 00000010 dabtvec:
59 00000010 FEFFFFEA B dabtvec
; 0x10 Data Abort
60 00000014 rsvdvec:
61 00000014 FEFFFFEA B rsvdvec
; 0x14 reserved
62 00000018 irqvec:
63 00000018 1D0000EA B IRQ_Handler_Entry
; 0x18 IRQ
64 0000001C fiqvec:
; 0x1c FIQ
65 0000001C ;-----------------------------------------------
-------------------------------
66 0000001C ;- Function : FIQ_Handler_Entry
67 0000001C ;- Treatments : FIQ Controller
Interrupt Handler.
68 0000001C ;- Called Functions : AIC_FVR[interrupt]
69 0000001C ;-----------------------------------------------
-------------------------------
70 0000001C
71 0000001C FIQ_Handler_Entry:
72 0000001C
73 0000001C ;- Switch in SVC/User Mode to allow User Stack
access for C code
74 0000001C ; because the FIQ is not yet acknowledged
75 0000001C
76 0000001C ;- Save and r0 in FIQ_Register
77 0000001C 0090A0E1 mov r9,r0
78 00000020 040198E5 ldr r0 , [r8, #AIC_FVR]
79 00000024 D3F021E3 msr CPSR_c,#I_BIT | F_BIT |
ARM_MODE_SVC
80 00000028
81 00000028 ;- Save scratch/used registers and LR in User
Stack
82 00000028 0E502DE9 stmfd sp!, { r1-r3, r12,
lr}
83 0000002C
84 0000002C ;- Branch to the routine pointed by the
AIC_FVR
85 0000002C 0FE0A0E1 mov r14, pc
86 00000030 10FF2FE1 bx r0
87 00000034
88 00000034 ;- Restore scratch/used registers and LR from
User Stack
89 00000034 0E50BDE8 ldmia sp!, { r1-r3, r12,
lr}
90 00000038
91 00000038 ;- Leave Interrupts disabled and switch back in
FIQ mode
92 00000038 D1F021E3 msr CPSR_c, #I_BIT | F_BIT |
ARM_MODE_FIQ
93 0000003C
94 0000003C ;- Restore the R0 ARM_MODE_SVC register
95 0000003C 0900A0E1 mov r0,r9
96 00000040
97 00000040 ;- Restore the Program Counter using the LR_fiq
directly in the PC
98 00000040 04F05EE2 subs pc,lr,#4
99 00000044
100 00000044
101 00000044 InitReset:
102 00000044 ;-----------------------------------------------
-------------------------------
103 00000044 ;- Low level Init (PMC, AIC, ? ....) by C
function AT91F_LowLevelInit
104 00000044 ;-----------------------------------------------
-------------------------------
105 00000000 EXTERN AT91F_LowLevelInit
106 00000044
107 00000044 #define __iramend SFB(INTRAMEND_REMAP)
108 00000044
109 00000044 ;- minumum C initialization
110 00000044 ;- call AT91F_LowLevelInit( void)
111 00000044
112 00000044 94D09FE5 ldr r13,=__iramend ;
temporary stack in
internal RAM
113 00000048 ;--Call Low level init function in ABSOLUTE
through the Interworking
114 00000048 94009FE5 ldr r0,=AT91F_LowLevelInit
115 0000004C 0FE0A0E1 mov lr, pc
116 00000050 10FF2FE1 bx r0
117 00000054 ;-----------------------------------------------
-------------------------------
118 00000054 ;- Stack Sizes Definition
119 00000054 ;------------------------
120 00000054 ;- Interrupt Stack requires 2 words x 8 priority
level x 4 bytes when using
121 00000054 ;- the vectoring. This assume that the IRQ
management.
122 00000054 ;- The Interrupt Stack must be adjusted
depending on the interrupt handlers.
123 00000054 ;- Fast Interrupt not requires stack If in your
application it required you must
124 00000054 ;- be definehere.
125 00000054 ;- The System stack size is not defined and is
limited by the free internal
126 00000054 ;- SRAM.
127 00000054 ;-----------------------------------------------
-------------------------------
128 00000054
129 00000054 ;-----------------------------------------------
-------------------------------
130 00000054 ;- Top of Stack Definition
131 00000054 ;-------------------------
132 00000054 ;- Interrupt and Supervisor Stack are located at
the top of internal memory in
133 00000054 ;- order to speed the exception handling context
saving and restoring.
134 00000054 ;- ARM_MODE_SVC (Application, C) Stack is
located at the top of the external memory.
135 00000054 ;-----------------------------------------------
-------------------------------
136 00000054
137 00000040 IRQ_STACK_SIZE EQU (2*8*4) ; 2
words per interrupt priority level
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