?? cstartup_sam7.lst
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##############################################################################
# #
# IAR ARM ANSI C/C++ Compiler V4.30A/W32 EVALUATION 14/Nov/2006 15:13:50 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Cpu mode = interwork #
# Endian = little #
# Stack alignment = 4 #
# Source file = G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 #
# CAN通訊實驗\BasicCAN-SAM7X\compil\srcIAR\Cstartup_SA #
# M7.c #
# Command line = "G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 #
# CAN通訊實驗\BasicCAN-SAM7X\compil\srcIAR\Cstartup_SA #
# M7.c" -lC "G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X2 #
# 56 CAN通訊實驗\BasicCAN-SAM7X\compil\FLASH_Debug\Lis #
# t\" -o "G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 #
# CAN通訊實驗\BasicCAN-SAM7X\compil\FLASH_Debug\Obj\" #
# -z2 --no_cse --no_unroll --no_inline #
# --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --cpu_mode thumb --endian #
# little --cpu ARM7TDMI --stack_align 4 --interwork #
# -e --fpu None --dlib_config "f:\Program Files\IAR #
# Systems\Embedded Workbench 4.0 #
# Evaluation\arm\LIB\dl4tptinl8f.h" -I #
# "G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 #
# CAN通訊實驗\BasicCAN-SAM7X\compil\srcIAR\" -I #
# "G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 #
# CAN通訊實驗\BasicCAN-SAM7X\compil\..\src\" -I #
# "G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 #
# CAN通訊實驗\BasicCAN-SAM7X\compil\..\..\" -I #
# "f:\Program Files\IAR Systems\Embedded Workbench #
# 4.0 Evaluation\arm\INC\" #
# List file = G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 #
# CAN通訊實驗\BasicCAN-SAM7X\compil\FLASH_Debug\List\C #
# startup_SAM7.lst #
# Object file = G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 #
# CAN通訊實驗\BasicCAN-SAM7X\compil\FLASH_Debug\Obj\Cs #
# tartup_SAM7.r79 #
# #
# #
##############################################################################
G:\光盤刻錄\IAR實驗代碼\實驗五\AT91SAM7X256 CAN通訊實驗\BasicCAN-SAM7X\compil\srcIAR\Cstartup_SAM7.c
1 // ----------------------------------------------------------------------------
2 // ATMEL Microcontroller Software Support - ROUSSET -
3 // ----------------------------------------------------------------------------
4 // DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
5 // IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
6 // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
7 // DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
8 // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
9 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
10 // OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
11 // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
12 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
13 // EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
14 // ----------------------------------------------------------------------------
15 // File Name : Cstartup_SAM7.c
16 // Object : Low level initialisations written in C for IAR Tools
17 // Creation : FBr 01-Sep-2005
18 // ----------------------------------------------------------------------------
19
20 #include "project.h"
21
22 // The following functions must be write in ARM mode this function called directly by exception vector
23 extern void AT91F_Spurious_handler(void);
24 extern void AT91F_Default_IRQ_handler(void);
25 extern void AT91F_Default_FIQ_handler(void);
26
27 //*----------------------------------------------------------------------------
28 //* \fn AT91F_LowLevelInit
29 //* \brief This function performs very low level HW initialization
30 //* this function can use a Stack, depending the compilation
31 //* optimization mode
32 //*----------------------------------------------------------------------------
\ In segment CODE, align 4, keep-with-next
33 void AT91F_LowLevelInit(void)
34 {
\ AT91F_LowLevelInit:
\ 00000000 00B5 PUSH {LR}
35 unsigned char i;
36 /////////////////////////////////////////////////////////////////////////////////////////////////////
37 // EFC Init
38 /////////////////////////////////////////////////////////////////////////////////////////////////////
39 AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS; // 1 Wait State necessary to work at 48MHz
\ 00000002 9F21 MOV R1,#+0x9F
\ 00000004 C943 MVN R1,R1 ;; #-160
\ 00000006 8022 MOV R2,#+0x80
\ 00000008 5200 LSL R2,R2,#+0x1 ;; #+0x100
\ 0000000A 0A60 STR R2,[R1, #+0]
40
41 /////////////////////////////////////////////////////////////////////////////////////////////////////
42 // Init PMC Step 1. Enable Main Oscillator
43 // Main Oscillator startup time is board specific:
44 // Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms (0x40 for AT91C_CKGR_OSCOUNT field)
45 /////////////////////////////////////////////////////////////////////////////////////////////////////
46 AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
\ 0000000C 2049 LDR R1,??AT91F_LowLevelInit_0 ;; 0xfffffc20
\ 0000000E 214A LDR R2,??AT91F_LowLevelInit_0+0x4 ;; 0x4001
\ 00000010 0A60 STR R2,[R1, #+0]
47 // Wait Main Oscillator stabilization
48 while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
\ ??AT91F_LowLevelInit_1:
\ 00000012 2149 LDR R1,??AT91F_LowLevelInit_0+0x8 ;; 0xfffffc68
\ 00000014 0968 LDR R1,[R1, #+0]
\ 00000016 C907 LSL R1,R1,#+0x1F
\ 00000018 FBD5 BPL ??AT91F_LowLevelInit_1
49
50 /////////////////////////////////////////////////////////////////////////////////////////////////////
51 // Init PMC Step 2.
52 // Set PLL to 96MHz (96,109MHz) and UDP Clock to 48MHz
53 // PLL Startup time depends on PLL RC filter: worst case is choosen
54 // UDP Clock (48,058MHz) is compliant with the Universal Serial Bus Specification (+/- 0.25% for full speed)
55 /////////////////////////////////////////////////////////////////////////////////////////////////////
56 AT91C_BASE_PMC->PMC_PLLR = AT91C_CKGR_USBDIV_1 | AT91C_CKGR_OUT_0 | AT91C_CKGR_PLLCOUNT |
57 (AT91C_CKGR_MUL & (72 << 16)) | (AT91C_CKGR_DIV & 14);
\ 0000001A 2049 LDR R1,??AT91F_LowLevelInit_0+0xC ;; 0xfffffc2c
\ 0000001C 204A LDR R2,??AT91F_LowLevelInit_0+0x10 ;; 0x10483f0e
\ 0000001E 0A60 STR R2,[R1, #+0]
58 // Wait for PLL stabilization
59 while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) );
\ ??AT91F_LowLevelInit_2:
\ 00000020 1D49 LDR R1,??AT91F_LowLevelInit_0+0x8 ;; 0xfffffc68
\ 00000022 0968 LDR R1,[R1, #+0]
\ 00000024 4907 LSL R1,R1,#+0x1D
\ 00000026 FBD5 BPL ??AT91F_LowLevelInit_2
60 // Wait until the master clock is established for the case we already turn on the PLL
61 while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
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