sysPciOutWord (DEC2155X_CSR_ADRS(DEC2155X_CSR_CHP_SET_IRQ_MSK),                               DEC2155X_CHPCSR_PM_D0);                break;                }            case DEC2155X_I2O_INT_LVL:                {                DEC2155X_PCI_INSERT_LONG(DEC2155X_CSR_I2O_IBND_PST_LST_MSK,                                         DEC2155X_I2O_PST_LST_MSK,                                         DEC2155X_I2O_PST_LST_MSK);                break;                }            case DEC2155X_PG_CRSSNG_INT_LVL:                {                sysPciOutLong (DEC2155X_CSR_ADRS(                               DEC2155X_CSR_US_PG_BND_IRQ_MSK0),                               (UINT32)(0xffffffff));                sysPciOutLong (DEC2155X_CSR_ADRS(                               DEC2155X_CSR_US_PG_BND_IRQ_MSK1),                               (UINT32)(0xffffffff));                break;                }            default:                {                return (ERROR);                break;                }            }        }    return (OK);    }/********************************************************************************* sysDec2155xIntEnable - Enable a Dec2155x internal interrupt** This routine enables the specified internal Dec2155x interrupt.** RETURNS: OK, or ERROR if invalid interrupt vector.** SEE ALSO: sysDec2155xIntDisable()**/STATUS sysDec2155xIntEnable    (    int vector          /* interrupt vector for interrupt */    )    {    int bit;    /* check for doorbell interrupt */    if ( (vector >= DEC2155X_DOORBELL0_INT_VEC) &&         (vector <= DEC2155X_DOORBELL15_INT_VEC) )        {        /* calculate the bit in the Secondary Clear IRQ Mask Register */        bit = vector - DEC2155X_DOORBELL0_INT_VEC;        /* set the correct bit in the Secondary Clear IRQ Mask Register */        sysPciOutWord (DEC2155X_CSR_ADRS(DEC2155X_CSR_SEC_CLR_IRQ_MSK),                       (UINT16)(1 << bit));        }    else        {        switch (vector)            {            case DEC2155X_PWR_MGMT_INT_LVL:                {                sysPciOutWord (DEC2155X_CSR_ADRS(DEC2155X_CSR_CHP_CLR_IRQ_MSK),                               DEC2155X_CHPCSR_PM_D0);                break;                }            case DEC2155X_I2O_INT_LVL:                {                DEC2155X_PCI_INSERT_LONG(DEC2155X_CSR_I2O_IBND_PST_LST_MSK,                                         DEC2155X_I2O_PST_LST_MSK,                                         ~DEC2155X_I2O_PST_LST_MSK);                break;                }            case DEC2155X_PG_CRSSNG_INT_LVL:                {                sysPciOutLong (DEC2155X_CSR_ADRS(                               DEC2155X_CSR_US_PG_BND_IRQ_MSK0),                               (UINT32)(0x00000000));                sysPciOutLong (DEC2155X_CSR_ADRS(                               DEC2155X_CSR_US_PG_BND_IRQ_MSK1),                               (UINT32)(0x00000000));                break;                }            default:                {                return (ERROR);                break;                }            }        }    return (OK);    }/********************************************************************************* sysDec2155xBusIntGen - generate an out-bound cPCI bus interrupt** This routine generates a Compact PCI backpanel interrupt by setting one of* the 16 bits in the 2155x Primary Set IRQ register. The bit is set regardless* of the current state of the bit and whether the interrupt has been enabled by* the host processor. Because the Compact PCI bus does not have interrupt* levels or vectors, the caller's interrupt level parameter is ignored and the* caller's vector number is used to select the bit to set in the Primary Set IRQ* Register. The symbol DEC2155X_DOORBELL0_INT_VEC corresponds to bit 0 (LSB)* and the remaining bits are mapped in sequence.** RETURNS: OK, or ERROR if <vector> is out of range.** SEE ALSO: sysBusIntAck()*/STATUS sysDec2155xBusIntGen    (    int level,          /* interrupt level to generate (not used) */    int vector          /* interrupt vector for interrupt */    )    {    int bit;    /* make sure the interrupt vector is valid */    if ( (vector > DEC2155X_DOORBELL15_INT_VEC) ||         (vector < DEC2155X_DOORBELL0_INT_VEC) )        return (ERROR);    /* calculate the bit in the Primary Set IRQ Register */    bit = vector - DEC2155X_DOORBELL0_INT_VEC;    /* set the correct bit in the Primary Set IRQ Register */    sysPciOutWord (DEC2155X_CSR_ADRS(DEC2155X_CSR_PRI_SET_IRQ),                   (UINT16)(1 << bit));    return (OK);    }/********************************************************************************* sysDec2155xErrClr - Dec2155x Error Clear routine** This is the Error clear routine for the Dec21554x PCI to PCI Bridge. The* following error bits are cleared:** Secondary Status Register:* Data Parity Detected* Signaled Target Abort* Received Target Abort* Received Master Abort* Signaled System Error* Detected Parity Error** Primary Status Register:* Received Master Abort** Chip Status Register:* Upstream Delayed Transaction Master Timeout* Upstream Delayed Read Transaction Discarded* Upstream Delayed Write Transaction Discarded* Upstream Posted Write Data Discarded** RETURNS: N/A*/void sysDec2155xErrClr (void)    {    DEC2155X_CFG_WR_WORD(PCI_CFG_STATUS, DEC2155X_CFG_STS_ERR_CLR);    DEC2155X_CFG_WR_WORD(PCI_CFG_STATUS + DEC2155X_PRI_FROM_SEC_OFFSET,                         DEC2155X_CFG_STS_RCVD_MSTR_ABT);    /* need to use insert routine due to reserved bits in register */    DEC2155X_CFG_INSERT_WORD(DEC2155X_CFG_CHP_STATUS,                             DEC2155X_CFG_CHP_STS_ERR_CLR,                             DEC2155X_CFG_CHP_STS_ERR_CLR);    }/********************************************************************************* sysDec2155xIntr - Dec2155x (Drawbridge) PCI-to-PCI interrupt handler** This is the interrupt handler for the Dec2155x PCI-to-PCI Bridge.  It is* connected to the single Dec2155x interrupt from the interrupt controller and* examines the Dec2155x chip to determine the interrupt number of the interrupt* source. Having obtained the interrupt number, this routine then indexes into* the system vector table and dispatches the specified interrupt handling* routine(s).** NOTE: The Dec2155x does not present a vector number. Each interrupt source* within the chip is examined to determine the interrupt source and* a logical interrupt vector number is synthesized as a result of that* search. The search order is as follows:** Power Management Transition to D0 (due to response time requirements)* Secondary doorbell interrupts* I20 interrupt* Upstream Memory 2 BAR page crossing interrupts.** This handler will clear all interrupt sources except the Upstream Memory* 2 BAR page crossing interrupts. Since there are 64 of these interrupts, it* is left to the page crossing handler to clear the interrupts it services.* This policy eliminates races in determining which page crossing interrupts* were presented in time for the handler to see them vs. those that arrived too* late for processing. The only exception to this policy in the case of a page* crossing interrupt arriving without a registered handler. This is a* programming error, but to protect itself, the interrupt handler will clear* any pending page crossing interrupts before reporting the un-handled* interrupt.** RETURNS: N/A*/void sysDec2155xIntr (void)    {    UINT32		vecNum = 0;    UINT16		status;    UINT16              mask;    UINT32		intMskAdrs;    UINT32		intClrAdrs;    INT_HANDLER_DESC *  currHandler;    /*     * Handle pending interrupts in order of highest priority.     *     * For each interrupt source, check for interrupt asserted, clear the     * interrupt in the Dec2155x, and dispatch to all associated ISRs.     */    /* check for power management event */    intMskAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_CHP_SET_IRQ_MSK);    intClrAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_CHP_STS_CSR);    /*     * Dec2155x mask registers are constructed such that a 0 allows the     * interrupt and a 1 masks out the interrupt. To convert the masked     * to an interrupt enabled array, it must be inverted before use.     */    mask = ~(sysPciInWord (intMskAdrs));    /*     * To clear a Dec2155x interrupt, a 1 is written to the bit to be     * cleared. The zeroes in the remaining bit positions are ignored. By     * isolating the proper bit during the status read, we set up the     * value to be used when clearing the interrupt.     */        status = sysPciInWord (intClrAdrs) & DEC2155X_CHPCSR_PM_D0;    if (status & mask)        {        /* clear interrupt source */        sysPciOutWordConfirm (intClrAdrs, status);        vecNum = DEC2155X_PWR_MGMT_INT_VEC;        if ((currHandler = sysIntTbl[vecNum]) == NULL)            logMsg ("uninitialized Dec2155x interrupt %d\n", vecNum,                     0,0,0,0,0);        else            {            while (currHandler != NULL)                {                currHandler->vec (currHandler->arg);                currHandler = currHandler->next;                }            }        }    /* check for secondary doorbell interrupts */    intMskAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_SEC_SET_IRQ_MSK);    intClrAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_SEC_CLR_IRQ);    mask = ~(sysPciInWord (intMskAdrs));    status = sysPciInWord (intClrAdrs);    /* isolate and save the active and enabled bits */    if (status &= mask)        {        /* clear interrupt source(s) */        sysPciOutWordConfirm (intClrAdrs, status);        /* start search at LSB */        mask = 1;        /* examine each bit to determine which bit(s) is set */        for (vecNum = DEC2155X_DOORBELL0_INT_VEC;             vecNum <= DEC2155X_DOORBELL15_INT_VEC;             vecNum++)            {            if (status & mask)                {                if ((currHandler = sysIntTbl[vecNum]) == NULL)                    logMsg ("uninitialized Dec2155x interrupt %d\n", vecNum,                             0,0,0,0,0);                else                    {                    while (currHandler != NULL)                        {                        currHandler->vec (currHandler->arg);                        currHandler = currHandler->next;                        }                    }                }            /* advance to next bit */            mask <<= 1;            }        }    /* check for I2O  event */    intMskAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_I2O_IBND_PST_LST_MSK);    intClrAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_I2O_IBND_PST_LST_STS);    mask = ~(sysPciInWord (intMskAdrs));    status = sysPciInWord (intClrAdrs) & DEC2155X_I2O_PST_LST_MSK;        if (status & mask)        {        /* clear interrupt source */        sysPciOutWordConfirm (intClrAdrs, status);        vecNum = DEC2155X_I2O_INT_VEC;        if ((currHandler = sysIntTbl[vecNum]) == NULL)            logMsg ("uninitialized Dec2155x interrupt %d\n", vecNum,                     0,0,0,0,0);        else            {            while (currHandler != NULL)                {                currHandler->vec (currHandler->arg);                currHandler = currHandler->next;                }            }        }    /*     * check for Upstream Memory 2 Page Crossing event starting with the     * first 32 bits, followed by the next 32 bits.     */    intMskAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_US_PG_BND_IRQ_MSK0);    intClrAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_US_PG_BND_IRQ0);    status = sysPciInWord (intClrAdrs) & ~(sysPciInWord (intMskAdrs));    intMskAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_US_PG_BND_IRQ_MSK1);    intClrAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_US_PG_BND_IRQ1);    /* re-use the mask variable to hold the status for the upper 32 bits */    mask = sysPciInWord (intClrAdrs) & ~(sysPciInWord (intMskAdrs));    if (status || mask)        {        vecNum = DEC2155X_PG_CRSSNG_INT_VEC;        if ((currHandler = sysIntTbl[vecNum]) == NULL)            {            logMsg ("uninitialized Dec2155x interrupt %d\n", vecNum,                     0,0,0,0,0);            /* since there is no registered handler, clear interrupt source */            sysPciOutWordConfirm (intClrAdrs, mask);            intClrAdrs = DEC2155X_CSR_ADRS(DEC2155X_CSR_US_PG_BND_IRQ0);            sysPciOutWordConfirm (intClrAdrs, status);            }        else            {            /* isr handles interrupt clearing */            while (currHandler != NULL)                {                currHandler->vec (currHandler->arg);                currHandler = currHandler->next;                }            }        }    return;    }/******************************************************************************** sysDec2155xCnvrtAdrs - converts an address across the Dec2155x** This routine examines the caller-provided array of Dec2155x windows looking* for a window which maps the target address. If such a window is found, the* caller's address is converted to the equivalent address as it would appear* on the opposite bus.** RETURNS: OK if conversion successful, else ERROR.** SEE ALSO: sysLocalToBusAdrs(), sysBusToLocalAdrs(), sysDec2155xCnvrtAdrs()*/LOCAL STATUS sysDec2155xCnvrtAdrs    (    UINT32 adrsSpace,    UINT32 adrs,    UINT32 *pCnvrtAdrs,    UINT32 winCnt,    WINDOW_PARAMETERS *pWinParam    )    {    while (winCnt--)        {        if ( (pWinParam->windowType == adrsSpace) &&             (adrs >= pWinParam->trgtBase) &&             (adrs <= pWinParam->trgtLimit) )            {            *pCnvrtAdrs = ( adrs - pWinParam->trgtBase + pWinParam->origBase );            return (OK);