;
; file:
;       arm_a.S
; description:
;       implementation code depend on architecture.
;

I_BIT       EQU     0x80
F_BIT       EQU     0x40
T_BIT       EQU     0x20
LOCKOUT     EQU     0xc0


        AREA    arm_a, CODE, READONLY, ALIGN=4
        CODE32


        EXPORT  _disable_int
        EXPORT  DisableInt
; int _disable_int(void);
_disable_int
DisableInt
        mrs     r1, cpsr
        and     r0, r1, #LOCKOUT
        orr     r1, r1, #LOCKOUT
        msr     cpsr_cxsf, r1
        mov     pc, lr


        EXPORT  _enable_int
        EXPORT  EnableInt
; void _enable_int(int istatus);
_enable_int
EnableInt
        mrs     r1, cpsr
        bic     r1, r1, #LOCKOUT
        orr     r1, r1, r0
        msr     cpsr_cxsf, r1
        mov     pc, lr


        EXPORT  _switch_thread_context
; void _switch_thread_context(thread_context* new_context, thread_context* old_context);
_switch_thread_context
        mrs     r3, cpsr
        stmia   r1, {r3-r11, ip, sp, lr}


        EXPORT  _load_thread_context
; void _load_thread_context(thread_context* new_context);
_load_thread_context
        ldmia   r0, {r3-r11, ip, sp, lr}
        msr     cpsr_cxsf, r3
        mov     pc, lr


        EXPORT  _start_thread
; void _start_thread(void);
_start_thread
        mov     r0, r6
        mov     lr, pc
        mov     pc, r5
        mov     lr, pc
        mov     pc, r4


        EXPORT  _get_stack_ptr
; unsigned int _get_stack_ptr(void);
_get_stack_ptr
        mov     r0, sp
        mov     pc, lr


        IMPORT  _irq_handler
        IMPORT  _schedule_thread
        EXPORT  _irq_entry
; void _irq_entry(int irq);
_irq_entry
        bl      _irq_handler                ; process irq.

        mov     r0, sp                      ; pass irq sp to SYS mode.
        add     sp, r0, #20                 ; restore irq stack.
        ldr     lr, [sp], #4                ; restore return pc.

        mrs     r1, spsr                    ; pass status register to SYS mode
        bic     r2, r1, #T_BIT
        orr     r3, r2, #LOCKOUT
        msr     spsr_cxsf, r3               ; disable thumb and interrupt of SYS mode.
        sub     r2, lr, #3                  ; pass return pc to SYS mode.
                                            ; sub 3 for supporting thumb interwork.
        subs    pc, pc, #4                  ; switch to SYS mode.
        str     r2, [sp, #-4]               ; save pc.
        str     r1, [sp, #-32]              ; save status register.
        sub     sp, sp, #8                  ; adjust sp.
        ldmfd   r0, {r0-r3, ip}             ; restore temporary register(r0-r3).
        stmed   sp!, {r0-r3, ip, lr}        ; push stack.

        bl      _schedule_thread            ; switch thread.
        ldr     r3, [sp], #4
        msr     cpsr_cxsf, r3               ; restore status register.
        ldmfd   sp!, {r0-r3, ip, lr, pc}    ; pop stack and return.
        LTORG


        END