/*
* MMU Cache/TLB/etc on/off functions
*/

#define R1_I    (1<<12)
#define R1_C    (1<<2)
#define R1_A    (1<<1)
#define R1_M    (1)
#define R1_iA   (1<<31)
#define R1_nF   (1<<30)


.text


        .global MMU_EnableICache
/* void MMU_EnableICache(void) */
MMU_EnableICache:
        mrc     p15, 0, r0, c1, c0, 0
        orr     r0, r0, #R1_I
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global MMU_DisableICache
/* void MMU_DisableICache(void) */
MMU_DisableICache:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #R1_I
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global MMU_EnableDCache
/* void MMU_EnableDCache(void) */
MMU_EnableDCache:
        mrc     p15, 0, r0, c1, c0, 0
        orr     r0, r0, #R1_C
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global MMU_DisableDCache
/* void MMU_DisableDCache(void) */
MMU_DisableDCache:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #R1_C
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global MMU_EnableAlignFault
/* void MMU_EnableAlignFault(void) */
MMU_EnableAlignFault:
        mrc     p15, 0, r0, c1, c0, 0
        orr     r0, r0, #R1_A
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global  MMU_DisableAlignFault
/* void MMU_DisableAlignFault(void) */
MMU_DisableAlignFault:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #R1_A
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global MMU_EnableMMU
/* void MMU_EnableMMU(void) */
MMU_EnableMMU:
        mrc     p15, 0, r0, c1, c0, 0
        orr     r0, r0, #R1_M
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global MMU_DisableMMU
/* void MMU_DisableMMU(void) */
MMU_DisableMMU:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #R1_M
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global MMU_SetFastBusMode
/* void MMU_SetFastBusMode(void) FCLK:HCLK = 1:1 */
MMU_SetFastBusMode:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #R1_iA|R1_nF
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global MMU_SetAsyncBusMode
/* void MMU_SetAsyncBusMode(void) FCLK:HCLK = 1:2 */
MMU_SetAsyncBusMode:
        mrc     p15, 0, r0, c1, c0, 0
        orr     r0, r0, #R1_nF|R1_iA
        mcr     p15, 0, r0, c1, c0, 0
        mov     pc, lr


        .global MMU_SetTTBase
/* void MMU_SetTTBase(int base) */
MMU_SetTTBase:
        mcr     p15, 0, r0, c2, c0, 0
        mov     pc, lr


        .global MMU_SetDomain
/* void MMU_SetDomain(int domain) */
MMU_SetDomain:
        mcr     p15, 0, r0, c3, c0, 0
        mov     pc, lr


        .global MMU_InvalidateIDCache
/* void MMU_InvalidateIDCache(void) */
MMU_InvalidateIDCache:
        mcr     p15, 0, r0, c7, c7, 0
        mov     pc, lr


        .global MMU_InvalidateICache
/* void MMU_InvalidateICache(void) */
MMU_InvalidateICache:
        mcr     p15, 0, r0, c7, c5, 0
        mov     pc, lr


        .global MMU_InvalidateICacheMVA
/* void MMU_InvalidateICacheMVA(unsigned int mva) */
MMU_InvalidateICacheMVA:
        mcr     p15, 0, r0, c7, c5, 1
        mov     pc, lr


        .globl MMU_PrefetchICacheMVA
/* void MMU_PrefetchICacheMVA(unsigned int mva) */
MMU_PrefetchICacheMVA:
        mcr     p15, 0, r0, c7, c13, 1
        mov     pc, lr


        .global MMU_InvalidateDCache
/* void MMU_InvalidateDCache(void) */
MMU_InvalidateDCache:
        mcr     p15, 0, r0, c7, c6, 0
        mov     pc, lr


        .global MMU_InvalidateDCacheMVA
/* void MMU_InvalidateDCacheMVA(unsigned int mva) */
MMU_InvalidateDCacheMVA:
        mcr     p15, 0, r0, c7, c6, 1
        mov     pc, lr


        .global MMU_CleanDCacheMVA
/* void MMU_CleanDCacheMVA(unsigned int mva) */
MMU_CleanDCacheMVA:
        mcr     p15, 0, r0, c7, c10, 1
        mov     pc, lr


        .global MMU_CleanInvalidateDCacheMVA
/* void MMU_CleanInvalidateDCacheMVA(unsigned int mva) */
MMU_CleanInvalidateDCacheMVA:
        mcr     p15, 0, r0, c7, c14, 1
        mov     pc, lr


        .global MMU_CleanDCacheIndex
/* void MMU_CleanDCacheIndex(unsigned int index) */
MMU_CleanDCacheIndex:
        mcr     p15, 0, r0, c7, c10, 2
        mov     pc, lr


        .global MMU_CleanInvalidateDCacheIndex
/* void MMU_CleanInvalidateDCacheIndex(unsigned int index) */
MMU_CleanInvalidateDCacheIndex:
        mcr     p15, 0, r0, c7, c14, 2
        mov     pc, lr


        .global MMU_WaitForInterrupt
/* void MMU_WaitForInterrupt(void) */
MMU_WaitForInterrupt:
        mcr     p15, 0, r0, c7, c0, 4
        mov     pc, lr


        .global MMU_InvalidateTLB
/* voic MMU_InvalidateTLB(void) */
MMU_InvalidateTLB:
        mcr     p15, 0, r0, c8, c7, 0
        mov     pc, lr


        .global MMU_InvalidateITLB
/* void MMU_InvalidateITLB(void) */
MMU_InvalidateITLB:
        mcr     p15, 0, r0, c8, c5, 0
        mov     pc, lr


        .global MMU_InvalidateITLBMVA
/* void MMU_InvalidateITLBMVA(unsigned int mva) */
MMU_InvalidateITLBMVA:
        mcr     p15, 0, r0, c8, c5, 1
        mov     pc, lr


        .global MMU_InvalidateDTLB
/* void MMU_InvalidateDTLB(void) */
MMU_InvalidateDTLB:
        mcr     p15, 0, r0, c8, c6, 0
        mov     pc, lr


        .global MMU_InvalidateDTLBMVA
/* void MMU_InvalidateDTLBMVA(unsigned int mva) */
MMU_InvalidateDTLBMVA:
        mcr     p15, 0, r0, c8, c6, 1
        mov     pc, lr


        .global MMU_SetDCacheLockdownBase
/* void MMU_SetDCacheLockdownBase(unsigned int base) */
MMU_SetDCacheLockdownBase:
        mcr     p15, 0, r0, c9, c0, 0
        mov     pc, lr


        .global MMU_SetICacheLockdownBase
/* void MMU_SetICacheLockdownBase(unsigned int base) */
MMU_SetICacheLockdownBase:
        mcr     p15, 0, r0, c9, c0, 1
        mov     pc, lr


        .global MMU_SetDTLBLockdown
/* void MMU_SetDTLBLockdown(unsigned int baseVictim) */
MMU_SetDTLBLockdown:
        mcr     p15, 0, r0, c10, c0, 0
        mov     pc, lr


        .global MMU_SetITLBLockdown
/* void MMU_SetITLBLockdown(unsigned int baseVictim) */
MMU_SetITLBLockdown:
        mcr     p15, 0, r0, c10, c0, 1
        mov     pc, lr


        .global MMU_SetProcessId
/* void MMU_SetProcessId(unsigned int pid) */
MMU_SetProcessId:
        mcr     p15, 0, r0, c13, c0, 0
        mov     pc, lr


        .end