void MMU_Init(void)
{
    int i, j;

    /*
    * ========================== IMPORTANT NOTE =========================
    * The current stack and code area can't be re-mapped in this routine.
    * If you want memory map mapped freely, your own sophiscated MMU
    * initialization code is needed.
    */
    MMU_DisableDCache();
    MMU_DisableICache();

    /* If write-back is used,the DCache should be cleared. */
    for(i=0;i<64;i++)
    {
        for(j=0;j<8;j++)
            MMU_CleanInvalidateDCacheIndex((i<<26)|(j<<5));
    }
    MMU_InvalidateICache();
    MMU_InvalidateDCache();

    #if 0
    /* To complete MMU_Init() fast, Icache may be turned on here. */
    MMU_EnableICache();
    #endif

    MMU_DisableMMU();
    MMU_InvalidateTLB();

    /* MMU_SetMTT(int vaddrStart, int vaddrEnd, int paddrStart, int attr) */
    MMU_SetMTT(0x00000000, 0x07f00000, 0x00000000, RW_NCNB); //bank0
    MMU_SetMTT(0x08000000, 0x0ff00000, 0x08000000, RW_NCNB); //bank1
    MMU_SetMTT(0x10000000, 0x17f00000, 0x10000000, RW_NCNB); //bank2
    MMU_SetMTT(0x18000000, 0x1ff00000, 0x18000000, RW_NCNB); //bank3
    MMU_SetMTT(0x20000000, 0x27f00000, 0x20000000, RW_NCNB); //bank4
    MMU_SetMTT(0x28000000, 0x2ff00000, 0x28000000, RW_NCNB); //bank5
    MMU_SetMTT(0x30000000, 0x37f00000, 0x30000000, RW_CB);   //bank6-1
//  MMU_SetMTT(0x30600000, 0x30600000, 0x30600000, RW_NCNB); //bank6-2
//  MMU_SetMTT(0x30700000, 0x37f00000, 0x30700000, RW_CB);   //bank6-3
    MMU_SetMTT(0x38000000, 0x3ff00000, 0x38000000, RW_NCNB); //bank7

    MMU_SetMTT(0x40000000, 0x47f00000, 0x40000000, RW_NCNB); //StepSram
    MMU_SetMTT(0x48000000, 0x5ff00000, 0x48000000, RW_NCNB); //SFR
    MMU_SetMTT(0x60000000, 0xfff00000, 0x60000000, RW_FAULT);//not used

    MMU_SetTTBase(CFG_MMUTT_BASEADDRESS);
    /* DOMAIN1: no_access, DOMAIN0,2~15=client(AP is checked) */
    MMU_SetDomain(0x55555550|DOMAIN1_ATTR|DOMAIN0_ATTR);
    MMU_SetProcessId(0x0);
    MMU_EnableAlignFault();

    MMU_EnableMMU();
    MMU_EnableICache();
    /* DCache should be turned on after MMU is turned on. */
    MMU_EnableDCache();
}


/* attr=RW_CB,RW_CNB,RW_NCNB,RW_FAULT */
void MMU_ChangeRomCacheStatus(int attr)
{
    int i, j;

    MMU_DisableDCache();
    MMU_DisableICache();

    /* If write-back is used,the DCache should be cleared. */
    for(i=0; i<64; i++)
    {
        for(j=0;j<8;j++)
            MMU_CleanInvalidateDCacheIndex((i<<26)|(j<<5));
    }
    MMU_InvalidateICache();
    MMU_InvalidateDCache();

    MMU_DisableMMU();
    MMU_InvalidateTLB();
    /* bank0 */
    MMU_SetMTT(0x00000000,0x07f00000,0x00000000,attr);
    /* bank1 */
    MMU_SetMTT(0x08000000,0x0ff00000,0x08000000,attr);
    MMU_EnableMMU();
    MMU_EnableICache();
    MMU_EnableDCache();
}


void MMU_SetMTT(int vaddrStart, int vaddrEnd, int paddrStart, int attr)
{
    int          i, sec;
    unsigned int *pTT;

    pTT = (unsigned int *)CFG_MMUTT_BASEADDRESS + (vaddrStart>>20);
    sec = (vaddrEnd>>20) - (vaddrStart>>20);
    for(i=0; i<=sec; i++)
        *pTT++ = attr | (((paddrStart>>20)+i)<<20);
}