?? spi.c
字號(hào):
printf("Tx Strings:%s\n",txStr);
SPI_Port_Return();
}
void __irq Spi0_M_Fifo(void)
{
rINTMSK|=BIT_SPI0;
ClearPending(BIT_SPI0);
// while((rSPSTA0>>5)&0x1){ // Tx Fifo not full ? => 0:full, 1:not full
while((rSPSTA0>>10)&0x1){ // Tx Fifo not full ? => 0:full, 1:not full
if(*spi0TxStr!='\0') { // TxStr is End ? => 0:End, 1:Not End
rSPTXFIFO0=*spi0TxStr++; // Write to SPTXFIFO
}
else {
endSpi0Tx=1;
return;
}
}
rINTMSK&=~BIT_SPI0;
}
void Test_Spi0_S_Fifo(void)
{
char *txStr,*rxStr,i;
printf("[SPI FIFO Rx-Test]\n");
endSpi0Tx=0;
spi0RxStr=(char *) SPI_BUFFER0; // Rx Buffer to receive
rxStr=(char *)spi0RxStr;
SPI_Port_Init(0);
SPI_Baud_Rate_Set(0, 1000000); // SPI Channel 0, 1MHz
ClearPending(BIT_SPI0);
pISR_SPI0=(unsigned)Spi0_S_Fifo;
rINTMSK&=~(BIT_SPI0);
rSPCON0=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON0>>10)&0x3 == 3); // Wait for FIFO Clear
rSPSTA0 = ((1<<9)|(1<<8)); // Rx FIFO Full Error, Tx FIFO Empty Error CLEAR
while((rSPSTA0>>8)&0x3 == 0); // Wait for FIFO Error Clear
rSPPIN0=(0<<2)|(0<<1)|(1<<0);//dis-ENMUL,SBO,release
rSPFIC0=(1<<3)|(1<<1)|(0<<0);// Rx FIFO Full Err Enable,Rx FIFO Full Int Enable,Tx FIFO Empty Int Disable,
rSPCON0=(1<<9)|(0<<8)|(0<<5)|(0<<4)|(0<<3)|(1<<2)|(0<<1)|(0<<0);//Rx,Tx Fifo En,dis-SCK,slave,low,A,normal
FFlag=0; bufCnt=0;
while(1){
if(Uart_GetKey()!=0) {
rINTMSK|=BIT_SPI0;
break;
}
if(bufCnt>72) break;
}
while((rSPSTA0>>6)&0x1)
*spi0RxStr++= rSPRXFIFO0;
rINTMSK|=BIT_SPI0;
*spi0RxStr='\0'; // attach End of String(Null)
printf("\n");
printf("Rx Strings:%s :",rxStr);
printf("FFlag:%d\n",FFlag);
SPI_Port_Return();
}
void __irq Spi0_S_Fifo(void)
{
rINTMSK|=BIT_SPI0;
ClearPending(BIT_SPI0);
if((rSPSTA0>>8)&0x1) { rSPSTA0 = (1<<8); FFlag++; }
while((rSPSTA0>>6)&0x1) { // Rx Fifo not empty ? => 0:empty, 1:not empty
*spi0RxStr++= rSPRXFIFO0;
bufCnt++;
}
rINTMSK&=~BIT_SPI0;
}
void __irq Spi1_S_Fifo(void)
{
rINTMSK|=BIT_SPI1;
ClearPending(BIT_SPI1);
if((rSPSTA1>>8)&0x1) { rSPSTA1 = (1<<8); FFlag++; }
while((rSPSTA1>>6)&0x1) { // Rx Fifo not empty ? => 0:empty, 1:not empty
*spi1RxStr++= rSPRXFIFO1;
bufCnt++;
}
rINTMSK&=~BIT_SPI1;
}
void Test_Spi1_Loopback_int(void)
{
char *txStr,*rxStr;
printf("[SPI Interrupt Tx/Rx Self-Test]\n");
printf("Connect SPIMOSI 1 into SPIMISO 1.\n");
endSpi1Tx=0;
spi1TxStr="ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789"; // Tx Data to send
spi1RxStr=(char *) SPI_BUFFER1; // Rx Buffer to receive
txStr=(char *)spi1TxStr;
rxStr=(char *)spi1RxStr;
SPI_Port_Init(1);
SPI_Baud_Rate_Set(1, 25000000); // SPI Channel 0, 25MHz
rSPCON1=(1<<5)|(1<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Polling,en-SCK,master,low,A,normal
rSPPIN1=(0<<2)|(1<<1)|(0<<0);//dis-ENMUL,SBO,release
pISR_SPI1=(unsigned)Spi1_Int;
rINTMSK&=~(BIT_SPI1);
while(endSpi1Tx==0);
*spi1RxStr='\0'; // attach End of String(Null)
printf("Tx Strings:%s\n",txStr);
printf("Rx Strings:%s :",rxStr);
if(strcmp(rxStr,txStr)==0) printf("O.K.\n");
else printf("ERROR!!!\n");
SPI_Port_Return();
}
void Test_Spi01_MS_fifo_Int(void)
{
char *rx0Str,*tx0Str;
char *rx1Str,*tx1Str;
printf("[SPI0(Master), SPI1(Slave) Interrupt Rx/Tx test in 1 Board]\n");
endSpi0Tx=0;
spi0TxStr="!@#$%^&*()_+|<>?:~ABCDEFGHIJKLMNOPQRSTUVWXYZ1234567890";
spi1RxStr=(char *) SPI_BUFFER1;
tx0Str=(char *)spi0TxStr;
rx1Str=(char *)spi1RxStr;
SPI_Port_Init(0);
SPI_Baud_Rate_Set(0, 1000000); // SPI Channel 0, 1MHz
SPI_Baud_Rate_Set(1, 1000000); // SPI Channel 1, 1MHz
ClearPending(BIT_SPI0|BIT_SPI1);
pISR_SPI0=(unsigned)Spi0_M_Fifo;
pISR_SPI1=(unsigned)Spi1_S_Fifo;
rINTMSK&=~(BIT_SPI0|BIT_SPI1);
rSPCON0=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON0>>10)&0x3 == 3); // Wait for FIFO Clear
rSPCON1=(1<<11)|(1<<10); // FIFO Clear
while((rSPCON1>>10)&0x3 == 3); // Wait for FIFO Clear
rSPSTA0 = ((1<<9)|(1<<8)); // Rx FIFO Full Error, Tx FIFO Empty Error CLEAR
while((rSPSTA0>>8)&0x3 == 0); // Wait for FIFO Error Clear
rSPSTA1 = ((1<<9)|(1<<8)); // Rx FIFO Full Error, Tx FIFO Empty Error CLEAR
while((rSPSTA1>>8)&0x3 == 0); // Wait for FIFO Error Clear
rSPPIN1=(0<<2)|(0<<1)|(1<<0); //Use Feedback clk, dis-ENMUL,SBO, Keep
rSPFIC1=(1<<3)|(1<<1)|(0<<0); // Rx FIFO Full Error Enable,Rx FIFO Full Int Enable,Tx FIFO Empty Int Disable,
rSPCON1=(1<<7)|(0<<5)|(0<<4)|(0<<3)|(1<<2)|(0<<1)|(0<<0); //Rx,Tx Fifo En,en-SCK,master,low,A,normal
printf("Slave setting end\n");
rSPPIN0=(1<<3)|(0<<2)|(0<<1)|(1<<0); //Use Feedback clk, dis-ENMUL,SBO, Keep
rSPFIC0=(0<<1)|(1<<0); // Rx FIFO Full Error Enable,Rx FIFO Full Int Enable,Tx FIFO Empty Int Disable,
rSPCON0=(1<<12)|(0<<7)|(0<<5)|(1<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0); //Rx,Tx Fifo En,en-SCK,master,low,A,normal
printf("Master setting end\n");
rSPCON1|=(1<<9); // Rx fifo enable
rSPCON0|=(1<<8); // Tx fifo enable
Master_nSS_Con0(0); // Activate nSS
while(endSpi0Tx==0) {
if(endSpi0Tx==1) { // Tx End ?
while(((rSPSTA0>>4)&0x1)==0); // Tx FIFO Empty ?
break;
}
}
while((rSPSTA1>>6)&0x1)
*spi1RxStr++= rSPRXFIFO1;
Master_nSS_Con0(1);
rINTMSK |=(BIT_SPI0|BIT_SPI1);
ClearPending(BIT_SPI0|BIT_SPI1);
printf("\n");
*spi0RxStr='\0';//attach End of String(Null)
*spi1RxStr='\0';//attach End of String(Null)
printf("SPI0Tx Strings:%s\n",tx0Str);
// printf("SPI1Rx Strings:%s\n",rx1Str+1);//remove first dummy data
printf("SPI1Rx Strings:%s\n",rx1Str);//remove first dummy data
if(strcmp(tx0Str,rx1Str)==0)
printf("SPI test O.K !!!\n");
else
printf("ERROR!!!\n");
printf("FFlag:%d\n",FFlag);
SPI_Port_Return();
}
void Test_Spi01_MS_Int(void)
{
char *rx0Str,*tx0Str;
char *rx1Str,*tx1Str;
printf("[SPI0(Master), SPI1(Slave) Interrupt Rx/Tx test in 1 Board]\n");
endSpi0Tx=0;
endSpi1Tx=0;
// spi0TxStr="!@#$%^&*()_+|<>?:~ABCDEFGHIJKLMNOPQRSTUVWXYZ1234567890";
// spi1TxStr="1234567890ABCDEFGHIJKLMNOPQRSTUVWXYZ!@#$%^&*()_+|<>?:~";
// spi0TxStr="1234567890";
// spi1TxStr="ABCDEFGHIJ";
spi0TxStr="UV";
spi1TxStr="UV";
spi0RxStr=(char *) SPI_BUFFER0;
spi1RxStr=(char *) SPI_BUFFER1;
tx0Str=(char *)spi0TxStr;
rx0Str=(char *)spi0RxStr;
tx1Str=(char *)spi1TxStr;
rx1Str=(char *)spi1RxStr;
SPI_Port_Init(0);
SPI_Baud_Rate_Set(0, 500000); // SPI Channel 0, 1MHz
SPI_Baud_Rate_Set(1, 500000); // SPI Channel 1, 1MHz
rSPCON1=(0<<7)|(1<<5)|(0<<4)|(0<<3)|(1<<2)|(1<<1)|(0<<0);//Polling,dis-SCK,slave,low,A,normal
rSPPIN1=(0<<2)|(1<<1)|(1<<0);//dis-ENMUL,SBO,release
printf("Slave setting end\n");
rSPPIN0=(0<<2)|(1<<1)|(1<<0);//dis-ENMUL,SBO,release
printf("Master setting end\n");
pISR_SPI0=(unsigned)Spi01_M_Int;
pISR_SPI1=(unsigned)Spi01_S_Int;
Master_nSS_Con0(0); // Activate nSS
rINTMSK&=~(BIT_SPI1);
rINTMSK&=~(BIT_SPI0);
while((endSpi1Tx==0)||(endSpi0Tx==0))
{
if(Uart_GetKey()) {
Master_nSS_Con0(1);
rINTMSK |=(BIT_SPI0|BIT_SPI1);
ClearPending(BIT_SPI0|BIT_SPI1);
SPI_Port_Return();
return;
}
}
Master_nSS_Con0(1);
rINTMSK |=(BIT_SPI0|BIT_SPI1);
ClearPending(BIT_SPI0|BIT_SPI1);
printf("\n");
*spi0RxStr='\0';//attach End of String(Null)
*spi1RxStr='\0';//attach End of String(Null)
printf("SPI0Tx Strings:%s\n",tx0Str);
printf("SPI0Rx Strings:%s\n",rx0Str+1);//remove first dummy data
printf("SPI1Tx Strings:%s\n",tx1Str);
printf("SPI1Rx Strings:%s\n",rx1Str+1);//remove first dummy data
if(strcmp((rx1Str+1),tx0Str)==0)
printf("SPI0 test O.K !!!\n");
if(strcmp((rx0Str+1),tx1Str)==0)
printf("SPI1 test O.K !!!\n");
else
printf("ERROR!!!\n");
SPI_Port_Return();
}
void Test_Spi0_M_Int(void)
{
char *rx0Str,*tx0Str;
char *rx1Str,*tx1Str;
char temp;
printf("[SPI0(Master) Interrupt Rx/Tx test for board to board]\n");
endSpi0Tx=0;
spi0TxStr="ABCDEFGHIJKLMNOPQRSTUVWXYZ1234567890";
spi0RxStr=(char *) SPI_BUFFER0;
tx0Str=(char *)spi0TxStr;
rx0Str=(char *)spi0RxStr;
temp = rSPRDAT0;
temp = rSPRDATB0;
SPI_Port_Init(0);
SPI_Baud_Rate_Set(0, 1000000); // SPI Channel 0, 25MHz
rSPCON0=(0<<7)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(0<<0);//Polling,en-SCK,master,low,A,normal
rSPPIN0=(1<<3)|(0<<2)|(1<<1)|(1<<0);//dis-ENMUL,SBO,release
printf("Master setting end\n");
printf("If Slave is ready, press any key to start\n");
getchar();
pISR_SPI0=(unsigned)Spi0_M_Int;
Master_nSS_Con0(0); // Activate nSS
rINTMSK&=~(BIT_SPI0);
while(endSpi0Tx==0)
{
if(Uart_GetKey()) {
Master_nSS_Con0(1);
rINTMSK |=(BIT_SPI0);
ClearPending(BIT_SPI0);
SPI_Port_Return();
return;
}
}
Master_nSS_Con0(1);
rINTMSK |=(BIT_SPI0);
ClearPending(BIT_SPI0);
printf("\n");
*spi0RxStr='\0';//attach End of String(Null)
printf("SPI0Tx Strings:%s\n",tx0Str);
// printf("SPI0Rx Strings:%s\n",rx0Str+1);//remove first dummy data
printf("SPI0Rx Strings:%s\n",rx0Str);//remove first dummy data
SPI_Port_Return();
}
void Test_Spi0_S_Int(void)
{
char *rx0Str,*tx0Str;
char *rx1Str,*tx1Str;
char temp;
printf("[SPI0(Slave) Interrupt Rx/Tx test for board to board]\n");
endSpi0Tx=0;
spi0TxStr="1234567890ABCDEFGHIJKLMNOPQRSTUVWXYZ";
spi0RxStr=(char *) SPI_BUFFER0;
tx0Str=(char *)spi0TxStr;
rx0Str=(char *)spi0RxStr;
temp = rSPRDAT0;
temp = rSPRDATB0;
SPI_Port_Init(0);
rGPGCON &= ~(0xf<<4);
rGPGCON |= (0xf<<4); // GPIO => nSS0, nSS1
SPI_Baud_Rate_Set(0, 1000000); // SPI Channel 0, 25MHz
rSPCON0=(0<<7)|(1<<5)|(0<<4)|(0<<3)|(1<<2)|(1<<1)|(0<<0);//Polling,en-SCK,master,low,A,normal
rSPPIN0=(1<<3)|(0<<2)|(1<<1)|(1<<0);//dis-ENMUL,SBO,release
printf("Slave setting end\n");
pISR_SPI0=(unsigned)Spi0_S_Int;
rINTMSK&=~(BIT_SPI0);
while(endSpi0Tx==0)
{
if(Uart_GetKey()) {
rINTMSK |=(BIT_SPI0);
ClearPending(BIT_SPI0);
SPI_Port_Return();
return;
}
}
rINTMSK |=(BIT_SPI0);
ClearPending(BIT_SPI0);
printf("\n");
*spi0RxStr='\0';//attach End of String(Null)
printf("SPI0Tx Strings:%s\n",tx0Str);
printf("SPI0Rx Strings:%s\n",rx0Str+1);//remove first dummy data
// printf("SPI0Rx Strings:%s\n",rx0Str);//remove first dummy data
SPI_Port_Return();
}
void __irq Spi0_Int(void)
{
rINTMSK|=BIT_SPI0;
ClearPending(BIT_SPI0);
if(*spi0TxStr!='\0') {
rSPTDAT0=*spi0TxStr++;
if(rSPSTA0&0x2) printf("Data Collision or Multi Master Error!!!\n");
while(!(REDY0_org)); //Check ready state
*spi0RxStr++=rSPRDATB0; //First Rx data is garbage data
rINTMSK&=~BIT_SPI0;
}
else {
endSpi0Tx=1;
}
}
void __irq Spi1_Int(void)
{
rINTMSK|=BIT_SPI1;
ClearPending(BIT_SPI1);
if(*spi1TxStr!='\0') {
rSPTDAT1=*spi1TxStr++;
if(rSPSTA1&0x2) printf("Data Collision or Multi Master Error!!!\n");
while(!(REDY1_org)); //Check ready state
*spi1RxStr++=rSPRDATB1; //First Rx data is garbage data
rINTMSK&=~BIT_SPI1;
}
else {
endSpi1Tx=1;
}
}
void __irq Spi0_M_Int(void)
{
rINTMSK|=BIT_SPI0;
ClearPending(BIT_SPI0);
if(*spi0TxStr!='\0') {
rSPTDAT0=*spi0TxStr++;
if(rSPSTA0&0x2) printf("Data Collision or Multi Master Error!!!\n");
while(!(REDY0_org)); //Check ready state
// while(!(REDY0)); //Check ready state
*spi0RxStr++=rSPRDATB0; //First Rx data is garbage data
rINTMSK&=~BIT_SPI0;
}
else {
endSpi0Tx=1;
}
}
void __irq Spi0_S_Int(void)
{
rINTMSK|=BIT_SPI0;
ClearPending(BIT_SPI0);
if(*spi0TxStr!='\0') {
rSPTDAT0=*spi0TxStr++;
if(rSPSTA0&0x2) printf("Data Collision or Multi Master Error!!!\n");
// while(!(REDY0_org)); //Check ready state
while(!(REDY0)); //Check ready state
*spi0RxStr++=rSPRDATB0; //First Rx data is garbage data
rINTMSK&=~BIT_SPI0;
}
else {
while(!(REDY0)); //Check ready state
*spi0RxStr++=rSPRDATB0; //First Rx data is garbage data
endSpi0Tx=1;
}
}
void __irq Spi01_M_Int(void)
{
rINTMSK|=BIT_SPI0;
ClearPending(BIT_SPI0);
*spi0RxStr++=rSPRDATB0; //First Rx data is garbage data
if(*spi0TxStr!='\0') {
rSPTDAT0=*spi0TxStr++;
rINTMSK&=~BIT_SPI1;
}
else {
endSpi0Tx=1;
}
// printf("M");
}
void __irq Spi01_S_Int(void)
{
rINTMSK|=BIT_SPI1;
ClearPending(BIT_SPI1);
*spi1RxStr++=rSPRDATB1; //First Rx data is garbage data
if(*spi1TxStr!='\0') {
printf("%c",*spi1TxStr);
rSPTDAT1=*spi1TxStr++;
rINTMSK&=~BIT_SPI0;
}
else {
endSpi1Tx=1;
}
// printf("S");
}
void SPI_Baud_Rate_Set(U32 ch, float BaudRate)
{
U32 PrescalerVal;
if(BaudRate>25000000) {
printf("SPI Baud Rate is too big (<25MHz)\n");
while(1);
}
SystemCLK();
PrescalerVal = (U32)(PCLK/2/BaudRate-1);
if(ch) {
rSPPRE1 = PrescalerVal;
printf("BaudRate [%f]\trSPPRE1 [0x%08x]\n",BaudRate,rSPPRE1);
}
else {
rSPPRE0 = PrescalerVal;
printf("BaudRate [%f]\trSPPRE0 [0x%08x]\n",BaudRate,rSPPRE0);
}
}
void SPI_Port_Init(U32 WhichMstr)
{
spi0_rGPECON=rGPECON;
spi0_rGPEDAT=rGPEDAT;
spi0_rGPEDN=rGPEDN;
spi1_rGPGCON=rGPGCON;
spi1_rGPGDAT=rGPGDAT;
spi1_rGPGDN=rGPGDN;
rGPEDN |= (0x7<<11); // Pull-down Disable
rGPECON &= ~(0x3f<<22); //
rGPECON |= (0x2a<<22); // GPE13,12,11 = SPICLK0,SPIMOSI0,SPIMISO0
rGPGDN |= ((0x7<<5)|(0x3<<2)); // Pull-down Disable
rGPGCON &= ~(0x3f<<10); //
rGPGCON |= (0x3f<<10); // GPG7,6,5 = SPICLK1,SPIMOSI1,SPIMISO1
rGPGCON &= ~(0xf<<4);
rGPGCON |= (0xf<<4); // GPIO => nSS0, nSS1
if (WhichMstr==0) // SPI0 is Master
{
rGPGDAT |= (1<<2); // nSS0 = 'High'
rGPGCON &= ~(0x3<<4);
rGPGCON |= (0x1<<4); // nSS0 is Output
}
else // SPI1 is Master
{
rGPGDAT |= (1<<3); // nSS1 = 'High'
rGPGCON &= ~(0x3<<6);
rGPGCON |= (0x1<<6); // nSS1 is Output
}
rSPCON0 = 0x8;
rSPPIN0 = 0x2;
rSPPRE0 = 0;
rSPFIC0 =0;
rSPCON1 = 0x8;
rSPPIN1 = 0x2;
rSPPRE1 = 0;
rSPFIC1 =0;
}
void SPI_Port_Return(void)
{
rGPECON=spi0_rGPECON;
rGPEDAT=spi0_rGPEDAT;
rGPEDN=spi0_rGPEDN;
rGPGCON=spi1_rGPGCON;
rGPGDAT=spi1_rGPGDAT;
rGPGDN=spi1_rGPGDN;
}
void Master_nSS_Con0(int Set)
{
rGPGDAT=(rGPGDAT&~(1<<2))|(Set<<2);
if(Set) printf("Chip Select nSS0 Disassert");
else printf("Chip Select nSS0 Assert");
}
void Master_nSS_Con1(int Set)
{
rGPGDAT=(rGPGDAT&~(1<<3))|(Set<<3);
if(Set) printf("Chip Select nSS1 Disassert");
else printf("Chip Select nSS1 Assert");
}
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