/****************************************************************************** Filename:	camproset.c Descriptions		 - Camera Processor Initialization code using IIC. History  - July 23, 2003. Coded for other device.  - Janualy 15, 2004. Modifed by Boaz  Copyright (c) 2003 SAMSUNG Electronics. # However, Anybody can use this code without our permission.   ******************************************************************************/#include <stdio.h>#include <stdlib.h>#include "def.h"#include "2413addr.h"#include "console.h"#include "def.h"#include "camproset.h"#include "camdata.h"static U8 _CAMiicData[CAMIICBUFSIZE];static volatile int _CAMiicDataCount;static volatile int _CAMiicMode;static int _CAMiicPt;extern U32 CAMTYPE, CAMSIZE, CAMIICID;void Wr_CamIIC(U32 slvAddr, U32 addr, U8 data){	_CAMiicMode      = CAMWRDATA;	_CAMiicPt        = 0;	_CAMiicData[0]   = (U8)addr;	_CAMiicData[1]   = data;	_CAMiicDataCount = 2;    	rIICDS        = slvAddr;	rIICSTAT      = 0xf0; //Start Master TX Condition    	rIICCON    = 0xef;   //Clearing the pending bit isn't needed because the pending bit has been cleared.	while(_CAMiicDataCount!=-1);   }void Rd_CamIIC(U32 slvAddr,U32 addr,U8 *data){	/*IIC Slave Addr Write + IIC Reg Addr Write */		_CAMiicMode      = CAMSETRDADDR;	_CAMiicPt        = 0;	_CAMiicData[0]   = (U8)addr;	_CAMiicDataCount = 1;	rIICDS   = slvAddr;	rIICSTAT = 0xf0;   //Master Tx, Start	rIICCON  = 0xef;                    //Resumes IIC operation.  	//Clearing the pending bit isn't needed because the pending bit has been cleared.	while(_CAMiicDataCount!=-1);    	_CAMiicMode      = CAMRDDATA;	_CAMiicPt        = 0;	_CAMiicDataCount = 1;    	rIICDS   = slvAddr;	rIICSTAT = 0xb0;                    //Master Rx,Start	rIICCON  = 0xef;                    //Resumes IIC operation.       	while(_CAMiicDataCount!=-1);	*data = _CAMiicData[1];}void __irq Cam_IICInt(void){	U32 iicSt,i;	ClearPending(BIT_IIC);	iicSt   = rIICSTAT; 	rINTMSK |= BIT_IIC;	if(iicSt & 0x8){}           //When bus arbitration is failed.	if(iicSt & 0x4){}           //When a slave address is matched with IICADD	if(iicSt & 0x2){}           //When a slave address is 0000000b	if(iicSt & 0x1){}           //When ACK isn't received	switch(_CAMiicMode) {		case CAMRDDATA:			if((_CAMiicDataCount--)==0) {				_CAMiicData[_CAMiicPt++] = rIICDS;            				rIICSTAT = 0x90;      //Stop MasRx condition 				rIICCON  = 0xef;      //Resumes IIC operation.				Delay(2);                 //Wait until stop condtion is in effect., Too long time...  # need the time 2440:Delay(1), 24A0: Delay(2)								//The pending bit will not be set after issuing stop condition.				break;    			}      			_CAMiicData[_CAMiicPt++] = rIICDS;     //The last data has to be read with no ack.			if((_CAMiicDataCount)==0)				rIICCON = 0x6f;                 //Resumes IIC operation with NOACK in case of S5X532 Cameara  			else 				rIICCON = 0xef;                 //Resumes IIC operation with ACK			break;		case CAMWRDATA:			if((_CAMiicDataCount--)==0) {				rIICSTAT = 0xd0;                //stop MasTx condition 				rIICCON  = 0xef;                //resumes IIC operation.				Delay(2);                       //wait until stop condtion is in effect. # need the time 2440:Delay(1), 24A0: Delay(2)									//The pending bit will not be set after issuing stop condition.				break;    			}			rIICDS = _CAMiicData[_CAMiicPt++];        //_iicData[0] has dummy.			for(i=0;i<50;i++);                  //for setup time until rising edge of IICSCL				rIICCON = 0xef;                     //resumes IIC operation.			break;		case CAMSETRDADDR:			if((_CAMiicDataCount--)==0) {				rIICSTAT = 0xd0;                //stop MasTx condition 				rIICCON  = 0xef;                //resumes IIC operation.				Delay(2);      //wait until stop condtion is in effect.				break;                  //IIC operation is stopped because of IICCON[4]    			}			rIICDS = _CAMiicData[_CAMiicPt++];			for(i=0;i<50;i++);          //for setup time until rising edge of IICSCL				rIICCON = 0xef;             //resumes IIC operation.			break;		default:			break;      	}	rINTMSK &= ~BIT_IIC;}void Camera_WriteBlock(void){   	U32 i;		pISR_IIC = (unsigned)Cam_IICInt; 	rINTMSK &= ~(BIT_IIC);	//Enable ACK, Prescaler IICCLK=PCLK/512, Enable interrupt, Transmit clock value Tx clock=IICCLK/16	rIICCON  = (1<<7) | (1<<6) | (1<<5) | (0xf);	rIICADD  = 0x10;                    //24A0 slave address = [7:1]	rIICSTAT = 0x10;                    //IIC bus data output enable(Rx/Tx)	rIICLC  = (1<<2)|(3); 			// SDAOUT has 5clock cycle delay	switch(CAMTYPE) {		case CAM_OV7620:			for(i=0; i<(sizeof(Ov7620_YCbCr8bit)/2); i++)				Wr_CamIIC(CAMIICID, Ov7620_YCbCr8bit[i][0], Ov7620_YCbCr8bit[i][1]);			break;		case CAM_OV7620_16:			for(i=0; i<(sizeof(Ov7620_Yuv16bit)/2); i++)				Wr_CamIIC(CAMIICID, Ov7620_Yuv16bit[i][0], Ov7620_Yuv16bit[i][1]);			break;					case CAM_S5X532:			for(i=0; i<(sizeof(S5X532_YCbCr8bit_TV)/2); i++)				Wr_CamIIC(CAMIICID, S5X532_YCbCr8bit_TV[i][0], S5X532_YCbCr8bit_TV[i][1]);			break;		default:			break;	}						       printf("\nBlock TX Ended...\n");		rINTMSK |= BIT_IIC;}void Camera_ReadBlock(void){	U32 i;	static U8 rdata[256];	pISR_IIC = (unsigned)Cam_IICInt; 	rINTMSK &= ~(BIT_IIC);	//Enable ACK, Prescaler IICCLK=PCLK/512, Enable interrupt, Transmit clock value Tx clock=IICCLK/16	rIICCON  = (1<<7) | (1<<6) | (1<<5) | (0xf);	rIICADD  = 0x10;                    //24A0 slave address = [7:1]	rIICSTAT = 0x10;                    //IIC bus data output enable(Rx/Tx)	rIICLC  = (1<<2)|(3); 			// SDAOUT has 5clock cycle delay	switch(CAMTYPE) {		case CAM_OV7620:			for(i=0; i<(sizeof(Ov7620_YCbCr8bit)/2);i++)				Rd_CamIIC(CAMIICID, Ov7620_YCbCr8bit[i][0], &rdata[i]); 			for(i=0; i<(sizeof(Ov7620_YCbCr8bit)/2);i++)				printf("Addr: 0x%2x, W: 0x%2x, R: 0x%2x\n", Ov7620_YCbCr8bit[i][0], Ov7620_YCbCr8bit[i][1], rdata[i]);			break;		case CAM_OV7620_16:			for(i=0; i<(sizeof(Ov7620_Yuv16bit)/2);i++)				Rd_CamIIC(CAMIICID, Ov7620_Yuv16bit[i][0], &rdata[i]); 			for(i=0; i<(sizeof(Ov7620_Yuv16bit)/2);i++)				printf("Addr: 0x%2x, W: 0x%2x, R: 0x%2x\n", Ov7620_Yuv16bit[i][0], Ov7620_Yuv16bit[i][1], rdata[i]);			break;		case CAM_S5X532:			for(i=0; i<(sizeof(S5X532_YCbCr8bit_TV)/2);i++) {				if(S5X532_YCbCr8bit_TV[i][0] == 0xec)					Wr_CamIIC(CAMIICID, S5X532_YCbCr8bit_TV[i][0], S5X532_YCbCr8bit_TV[i][1]);				else					Rd_CamIIC(CAMIICID, S5X532_YCbCr8bit_TV[i][0], &rdata[i]); 			}			for(i=0; i<(sizeof(S5X532_YCbCr8bit_TV)/2);i++) {				if(S5X532_YCbCr8bit_TV[i][0] == 0xec)					printf("Page: 0x%2x\n",  S5X532_YCbCr8bit_TV[i][1]);				else					printf("Addr: 0x%2x, W: 0x%2x, R: 0x%2x\n", S5X532_YCbCr8bit_TV[i][0], S5X532_YCbCr8bit_TV[i][1], rdata[i]);			}			break;		default:			break;	}		rINTMSK |= BIT_IIC;}void CameraModuleSetting(void){	U32 i;	pISR_IIC = (unsigned)Cam_IICInt; 	rINTMSK &= ~(BIT_IIC);	//Enable ACK, Prescaler IICCLK=PCLK/512, Enable interrupt, Transmit clock value Tx clock=IICCLK/16	rIICCON  = (1<<7) | (1<<6) | (1<<5) | (0xf);	rIICADD  = 0x10;                    //24A0 slave address = [7:1]	rIICSTAT = 0x10;                    //IIC bus data output enable(Rx/Tx)	rIICLC  = (1<<2)|(3); 			// SDAOUT has 5clock cycle delay	switch(CAMTYPE) {		case CAM_OV7620:			for(i=0; i<(sizeof(Ov7620_YCbCr8bit)/2); i++) 				Wr_CamIIC(CAMIICID, Ov7620_YCbCr8bit[i][0], Ov7620_YCbCr8bit[i][1]);			break;		case CAM_OV7620_16:			for(i=0; i<(sizeof(Ov7620_Yuv16bit)/2); i++) 				Wr_CamIIC(CAMIICID, Ov7620_Yuv16bit[i][0], Ov7620_Yuv16bit[i][1]);			break;					case CAM_S5X532:			for(i=0; i<(sizeof(S5X532_YCbCr8bit_TV)/2); i++)				Wr_CamIIC(CAMIICID, S5X532_YCbCr8bit_TV[i][0], S5X532_YCbCr8bit_TV[i][1]);			break;		default:			break;	}	printf("\nBlock TX Ended...\n");		rINTMSK |= BIT_IIC;}