?? main.lst
字號:
0433 9220010E STS rxd_flag,R2
0435 C002 RJMP 0x0438
(0459)
(0460) while(1)
(0461) {
(0462) Gun_set();
0436 DCE4 RCALL _Gun_set
(0463) Setup();
0437 DE0E RCALL _Setup
0438 CFFD RJMP 0x0436
0439 9508 RET
FILE: E:\TWINTI~1\adc.c
(0001)
(0002) /********************************************************************************/
(0003) //
(0004) // builder : 2007-04-10
(0005) // Target : ATMEAG 48V
(0006) // Crystal : 內部 8.00 MHz
(0007) //
(0008) // ADC 轉換模塊
(0009)
(0010) /********************************************************************************/
(0011)
(0012) #include <iom48v.h>
(0013) #include <macros.h>
(0014)
(0015) #define uchar unsigned char
(0016) #define uint unsigned int
(0017)
(0018) #define CH0 0x40
(0019) #define CH1 0x41
(0020) #define CH2 0x42
(0021) #define CH3 0x43
(0022) #define CH4 0x44
(0023) #define CH5 0x45
(0024) #define CH6 0x46
(0025) #define CH7 0x47
(0026)
(0027)
(0028) void adc_int(void)
(0029) {
(0030) ADMUX = 0x40; //set adc power avcc and the ref is Avref
_adc_int:
043A E480 LDI R24,0x40
043B 9380007C STS 0x7C,R24
(0031) ADCSRA = 0xC2; //enable adc and the div parame is 8
043D EC82 LDI R24,0xC2
043E 9380007A STS 0x7A,R24
0440 9508 RET
_adc_colect:
adh --> R20
ad_add --> R22
temp1 --> R12
i --> R10
temp --> R14
chanal --> R16
0441 D0DA RCALL push_gset5
(0032) }
(0033)
(0034)
(0035) /*---------------------------------------------------------------
(0036) ADC
(0037) ----------------------------------------------------------------*/
(0038)
(0039) uint adc_colect(uchar chanal)
(0040) {
(0041) uchar i;
(0042) uint ad_add;
(0043) uint temp,temp1;
(0044) uint adh;
(0045)
(0046) if(chanal==0) ADMUX = CH0;
0442 2300 TST R16
0443 F421 BNE 0x0448
0444 E480 LDI R24,0x40
0445 9380007C STS 0x7C,R24
0447 C029 RJMP 0x0471
(0047) else if(chanal==1) ADMUX = CH1;
0448 3001 CPI R16,1
0449 F421 BNE 0x044E
044A E481 LDI R24,0x41
044B 9380007C STS 0x7C,R24
044D C023 RJMP 0x0471
(0048) else if(chanal==2) ADMUX = CH2;
044E 3002 CPI R16,2
044F F421 BNE 0x0454
0450 E482 LDI R24,0x42
0451 9380007C STS 0x7C,R24
0453 C01D RJMP 0x0471
(0049) else if(chanal==3) ADMUX = CH3;
0454 3003 CPI R16,3
0455 F421 BNE 0x045A
0456 E483 LDI R24,0x43
0457 9380007C STS 0x7C,R24
0459 C017 RJMP 0x0471
(0050) else if(chanal==4) ADMUX = CH4;
045A 3004 CPI R16,4
045B F421 BNE 0x0460
045C E484 LDI R24,0x44
045D 9380007C STS 0x7C,R24
045F C011 RJMP 0x0471
(0051) else if(chanal==5) ADMUX = CH5;
0460 3005 CPI R16,5
0461 F421 BNE 0x0466
0462 E485 LDI R24,0x45
0463 9380007C STS 0x7C,R24
0465 C00B RJMP 0x0471
(0052) else if(chanal==6) ADMUX = CH6;
0466 3006 CPI R16,6
0467 F421 BNE 0x046C
0468 E486 LDI R24,0x46
0469 9380007C STS 0x7C,R24
046B C005 RJMP 0x0471
(0053) else if(chanal==7) ADMUX = CH7;
046C 3007 CPI R16,7
046D F419 BNE 0x0471
046E E487 LDI R24,0x47
046F 9380007C STS 0x7C,R24
(0054)
(0055) ad_add = 0;
0471 2766 CLR R22
0472 2777 CLR R23
(0056)
(0057) for(i=0;i<8;i++)
0473 24AA CLR R10
0474 C022 RJMP 0x0497
(0058) {
(0059) ADCSRA = ADCSRA|(1<<ADSC); //start the adc
0475 9180007A LDS R24,0x7A
0477 6480 ORI R24,0x40
0478 9380007A STS 0x7A,R24
(0060) while(ADCSRA&(1<<ADSC)); //wait for the adc finish
047A 9020007A LDS R2,0x7A
047C FC26 SBRC R2,6
047D CFFC RJMP 0x047A
(0061)
(0062) ADCSRA = ADCSRA|(1<<ADSC); //start the adc
047E 9180007A LDS R24,0x7A
0480 6480 ORI R24,0x40
0481 9380007A STS 0x7A,R24
(0063) while(ADCSRA&(1<<ADSC)); //wait for the adc finish
0483 9020007A LDS R2,0x7A
0485 FC26 SBRC R2,6
0486 CFFC RJMP 0x0483
(0064)
(0065) temp1 = ADCL;
0487 90C00078 LDS R12,0x78
0489 24DD CLR R13
(0066) temp = (ADCH&0x03)<<8;
048A 91800079 LDS R24,0x79
048C 2799 CLR R25
048D 7083 ANDI R24,3
048E 7090 ANDI R25,0
048F 017C MOVW R14,R24
0490 2CFE MOV R15,R14
0491 24EE CLR R14
(0067) temp += temp1;
0492 0CEC ADD R14,R12
0493 1CFD ADC R15,R13
(0068) ad_add += temp;
0494 0D6E ADD R22,R14
0495 1D7F ADC R23,R15
0496 94A3 INC R10
0497 2D8A MOV R24,R10
0498 3088 CPI R24,0x8
0499 F2D8 BCS 0x0475
(0069) }
(0070) adh = ad_add>>3;
049A 01AB MOVW R20,R22
049B 9556 LSR R21
049C 9547 ROR R20
049D 9556 LSR R21
049E 9547 ROR R20
049F 9556 LSR R21
04A0 9547 ROR R20
(0071) return(adh);
04A1 018A MOVW R16,R20
04A2 D077 RCALL pop_gset5
04A3 9508 RET
FILE: E:\TWINTI~1\eeprom.c
(0001)
(0002) //#include <avr/io.h>
(0003) //#include <avr/delay.h>
(0004) //#include <avr/signal.h>
(0005) //#include <avr/interrupt.h>
(0006)
(0007) #include <iom48v.h>
(0008) #include <macros.h>
(0009)
(0010) void init_eeprom(void)
(0011) {
(0012) EECR = 0x07;
_init_eeprom:
04A4 E087 LDI R24,7
04A5 BB8F OUT 0x1F,R24
04A6 9508 RET
(0013) }
(0014)
(0015) void EEPROM_write(unsigned char Address, unsigned char Datas)
(0016) {
(0017) while(EECR & (1<<EEWE));// 等待上一次寫操作結束
_EEPROM_write:
Datas --> R18
Address --> R16
04A7 99F9 SBIC 0x1F,1
04A8 CFFE RJMP _EEPROM_write
(0018)
(0019) EEARL= Address; // 設置地址和數據寄存器
04A9 BD01 OUT 0x21,R16
(0020) EEDR = Datas;
04AA BD20 OUT 0x20,R18
(0021) EECR |= (1<<EEMWE); // 置位EEMWE
04AB 9AFA SBI 0x1F,2
(0022) EECR |= (1<<EEWE); // 置位EEWE 以啟動寫操作E
04AC 9AF9 SBI 0x1F,1
04AD 9508 RET
(0023) }
(0024)
(0025)
(0026)
(0027) unsigned char EEPROM_read(unsigned char uiAddress)
(0028) {
(0029) while(EECR&(1<<EEWE)); //等待上一次寫操作結束
_EEPROM_read:
uiAddress --> R16
04AE 99F9 SBIC 0x1F,1
04AF CFFE RJMP _EEPROM_read
(0030) EEARL = uiAddress; // 設置地址寄存器
04B0 BD01 OUT 0x21,R16
(0031) EECR |= (1<<EERE); // 設置EERE 以啟動讀操作
04B1 9AF8 SBI 0x1F,0
(0032) return EEDR; // 自數據寄存器返回數據
04B2 B500 IN R16,0x20
04B3 9508 RET
FILE: E:\TWINTI~1\time2.c
(0001) /********************************************************************************/
(0002) //
(0003) // builder : 2007-04-10
(0004) // Target : ATMEAG 48V
(0005) // Crystal : 內部 8.00 MHz
(0006) //
(0007) // PWM 模塊
(0008)
(0009) /********************************************************************************/
(0010)
(0011)
(0012) #include <iom48v.h>
(0013) #include <macros.h>
(0014)
(0015) #define uchar unsigned char
(0016) #define uint unsigned int
(0017)
(0018) #define CLR_REV1 PORTD &= ~(1<<PD6)
(0019) #define SET_REV1 PORTD |= (1<<PD6)
(0020)
(0021) #define CLR_JUST1 PORTB &= ~(1<<PB4)
(0022) #define SET_JUST1 PORTB |= (1<<PB4)
(0023)
(0024)
(0025)
(0026) //TIMER0 initialize - prescale:8
(0027) // desired value: 1Hz
(0028) // actual value: Out of range
(0029) extern void timer2_init(void)
(0030) {
(0031) TCCR2B = 0x00; //stop
_timer2_init:
04B4 2422 CLR R2
04B5 922000B1 STS 0xB1,R2
(0032) ASSR = 0x00; //set async mode
04B7 922000B6 STS 0xB6,R2
(0033) TCNT2 = 0x01; //setup
04B9 E081 LDI R24,1
04BA 938000B2 STS 0xB2,R24
(0034) TCCR2A = 0xA1;
04BC EA81 LDI R24,0xA1
04BD 938000B0 STS 0xB0,R24
(0035) OCR2B = 0x00;
04BF 922000B4 STS 0xB4,R2
(0036) TCCR2B = 0x02;
04C1 E082 LDI R24,2
04C2 938000B1 STS 0xB1,R24
04C4 9508 RET
(0037) }
(0038)
(0039) /*---------------------------------------------------------------
(0040) PWM 占空比設置
(0041) ----------------------------------------------------------------*/
(0042)
(0043) extern void Pwm_set(uchar pwm,uchar rev)
(0044) {
(0045) if(rev==2)
_Pwm_set:
rev --> R18
pwm --> R16
04C5 3022 CPI R18,2
04C6 F441 BNE 0x04CF
(0046) {
(0047) OCR2A = 0;
04C7 2422 CLR R2
04C8 922000B3 STS 0xB3,R2
(0048) OCR2B = pwm;
04CA 930000B4 STS 0xB4,R16
(0049) CLR_REV1;
04CC 985E CBI 0x0B,6
(0050) SET_JUST1;
04CD 9A2C SBI 0x05,4
(0051) }
04CE C01A RJMP 0x04E9
(0052) else if(rev==1)
04CF 3021 CPI R18,1
04D0 F441 BNE 0x04D9
(0053) {
(0054) OCR2A = pwm;
04D1 930000B3 STS 0xB3,R16
(0055) OCR2B = 0;
04D3 2422 CLR R2
04D4 922000B4 STS 0xB4,R2
(0056) SET_REV1;
04D6 9A5E SBI 0x0B,6
(0057) CLR_JUST1;
04D7 982C CBI 0x05,4
(0058) }
04D8 C010 RJMP 0x04E9
(0059) else if(rev==3)
04D9 3023 CPI R18,3
04DA F439 BNE 0x04E2
(0060) {
(0061) OCR2A = pwm;
04DB 930000B3 STS 0xB3,R16
(0062) OCR2B = pwm;
04DD 930000B4 STS 0xB4,R16
(0063) CLR_REV1;
04DF 985E CBI 0x0B,6
(0064) CLR_JUST1;
04E0 982C CBI 0x05,4
(0065) }
04E1 C007 RJMP 0x04E9
(0066) else
(0067) {
(0068) OCR2A = 0;
04E2 2422 CLR R2
04E3 922000B3 STS 0xB3,R2
(0069) OCR2B = 0;
04E5 922000B4 STS 0xB4,R2
(0070) CLR_REV1;
04E7 985E CBI 0x0B,6
(0071) CLR_JUST1;
04E8 982C CBI 0x05,4
(0072) }
FILE: <library>
04E9 9508 RET
mod16u:
04EA 9468 BSET 6
04EB C001 RJMP xdiv16u
div16u:
04EC 94E8 BCLR 6
xdiv16u:
04ED 92EA ST R14,-Y
04EE 92FA ST R15,-Y
04EF 938A ST R24,-Y
04F0 24EE CLR R14
04F1 24FF CLR R15
04F2 E180 LDI R24,0x10
04F3 0F00 LSL R16
04F4 1F11 ROL R17
04F5 1CEE ROL R14
04F6 1CFF ROL R15
04F7 16E2 CP R14,R18
04F8 06F3 CPC R15,R19
04F9 F018 BCS 0x04FD
04FA 1AE2 SUB R14,R18
04FB 0AF3 SBC R15,R19
04FC 9503 INC R16
04FD 958A DEC R24
04FE F7A1 BNE 0x04F3
04FF F416 BRTC 0x0502
0500 2D0E MOV R16,R14
0501 2D1F MOV R17,R15
0502 9189 LD R24,Y+
0503 90F9 LD R15,Y+
0504 90E9 LD R14,Y+
0505 9508 RET
empy16s:
0506 920A ST R0,-Y
0507 921A ST R1,-Y
0508 938A ST R24,-Y
0509 939A ST R25,-Y
050A 9F02 MUL R16,R18
050B 01C0 MOVW R24,R0
050C 9F12 MUL R17,R18
050D 0D90 ADD R25,R0
050E 9F03 MUL R16,R19
050F 0D90 ADD R25,R0
0510 018C MOVW R16,R24
0511 9199 LD R25,Y+
0512 9189 LD R24,Y+
0513 9019 LD R1,Y+
0514 9009 LD R0,Y+
0515 9508 RET
pop_gset2:
0516 E0E2 LDI R30,2
0517 C010 RJMP pop
pop_gset3:
0518 E0E4 LDI R30,4
0519 C00E RJMP pop
pop_gset5:
051A 27EE CLR R30
051B C00C RJMP pop
push_gset5:
051C 92FA ST R15,-Y
051D 92EA ST R14,-Y
push_gset4:
051E 92DA ST R13,-Y
051F 92CA ST R12,-Y
push_gset3:
0520 92BA ST R11,-Y
0521 92AA ST R10,-Y
push_gset2:
0522 937A ST R23,-Y
0523 936A ST R22,-Y
push_gset1:
0524 935A ST R21,-Y
0525 934A ST R20,-Y
0526 9508 RET
pop_gset1:
0527 E0E1 LDI R30,1
pop:
0528 9149 LD R20,Y+
0529 9159 LD R21,Y+
052A FDE0 SBRC R30,0
052B 9508 RET
052C 9169 LD R22,Y+
052D 9179 LD R23,Y+
052E FDE1 SBRC R30,1
052F 9508 RET
0530 90A9 LD R10,Y+
0531 90B9 LD R11,Y+
0532 FDE2 SBRC R30,2
0533 9508 RET
0534 90C9 LD R12,Y+
0535 90D9 LD R13,Y+
0536 FDE3 SBRC R30,3
0537 9508 RET
0538 90E9 LD R14,Y+
0539 90F9 LD R15,Y+
053A 9508 RET
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