?? main.lst
字號:
__text_start:
__start:
0020 EFCF LDI R28,0xFF
0021 E0D2 LDI R29,2
0022 BFCD OUT 0x3D,R28
0023 BFDE OUT 0x3E,R29
0024 51C0 SUBI R28,0x10
0025 40D0 SBCI R29,0
0026 EA0A LDI R16,0xAA
0027 8308 STD Y+0,R16
0028 2400 CLR R0
0029 E0E2 LDI R30,2
002A E0F1 LDI R31,1
002B E011 LDI R17,1
002C 32E6 CPI R30,0x26
002D 07F1 CPC R31,R17
002E F011 BEQ 0x0031
002F 9201 ST R0,Z+
0030 CFFB RJMP 0x002C
0031 8300 STD Z+0,R16
0032 E3EE LDI R30,0x3E
0033 E0F0 LDI R31,0
0034 E0A0 LDI R26,0
0035 E0B1 LDI R27,1
0036 E010 LDI R17,0
0037 34E0 CPI R30,0x40
0038 07F1 CPC R31,R17
0039 F021 BEQ 0x003E
003A 95C8 LPM
003B 9631 ADIW R30,1
003C 920D ST R0,X+
003D CFF9 RJMP 0x0037
003E D42D RCALL _main
_exit:
003F CFFF RJMP _exit
FILE: E:\CHIYUA~1\LI_POT~1\adc.h
(0001)
(0002) /********************************************************************************/
(0003) //
(0004) // builder : 2007-04-10
(0005) // Target : ATMEAG 48V
(0006) // Crystal : 內(nèi)部 8.00 MHz
(0007) //
(0008) // ADC 轉(zhuǎn)換模塊
(0009)
(0010) /********************************************************************************/
(0011)
(0012)
(0013) #include <iom48v.h>
(0014) #include <macros.h>
(0015)
(0016)
(0017) extern void adc_int(void);
(0018) extern unsigned int AD_CH(unsigned char CHn);
(0019)
(0020)
(0021) void adc_int(void)
(0022) {
(0023) ADMUX = 0x40; // 0xC0 基準(zhǔn)電壓2.56V ;0x40 外部AVCC
_adc_int:
0040 E480 LDI R24,0x40
0041 9380007C STS 0x7C,R24
(0024) ADCSRA = 0xC7; //enable adc and the div parame is 8
0043 EC87 LDI R24,0xC7
0044 9380007A STS 0x7A,R24
0046 9508 RET
_AD_CH:
adh --> R20
ad_add --> R22
temp1 --> R12
i --> R10
temp --> R14
CHn --> R16
0047 D570 RCALL push_gset5
(0025) }
(0026)
(0027)
(0028) /*---------------------------------------------------------------
(0029) ADC
(0030) ----------------------------------------------------------------*/
(0031)
(0032) unsigned int AD_CH(unsigned char CHn)
(0033) {
(0034) unsigned char i;
(0035) unsigned int ad_add;
(0036) unsigned int temp,temp1;
(0037) unsigned int adh;
(0038)
(0039) ADMUX = (ADMUX & 0xF0) | CHn;
0048 9180007C LDS R24,0x7C
004A 7F80 ANDI R24,0xF0
004B 2B80 OR R24,R16
004C 9380007C STS 0x7C,R24
(0040)
(0041) ad_add = 0;
004E 2766 CLR R22
004F 2777 CLR R23
(0042)
(0043) for(i=0;i<4;i++)
0050 24AA CLR R10
0051 C022 RJMP 0x0074
(0044) {
(0045) ADCSRA = ADCSRA|(1<<ADSC); //start the adc
0052 9180007A LDS R24,0x7A
0054 6480 ORI R24,0x40
0055 9380007A STS 0x7A,R24
(0046) while(ADCSRA&(1<<ADSC)); //wait for the adc finish
0057 9020007A LDS R2,0x7A
0059 FC26 SBRC R2,6
005A CFFC RJMP 0x0057
(0047)
(0048) ADCSRA = ADCSRA|(1<<ADSC); //start the adc
005B 9180007A LDS R24,0x7A
005D 6480 ORI R24,0x40
005E 9380007A STS 0x7A,R24
(0049) while(ADCSRA&(1<<ADSC)); //wait for the adc finish
0060 9020007A LDS R2,0x7A
0062 FC26 SBRC R2,6
0063 CFFC RJMP 0x0060
(0050)
(0051) temp1 = ADCL;
0064 90C00078 LDS R12,0x78
0066 24DD CLR R13
(0052) temp = (ADCH&0x03)<<8;
0067 91800079 LDS R24,0x79
0069 2799 CLR R25
006A 7083 ANDI R24,3
006B 7090 ANDI R25,0
006C 017C MOVW R14,R24
006D 2CFE MOV R15,R14
006E 24EE CLR R14
(0053) temp += temp1;
006F 0CEC ADD R14,R12
0070 1CFD ADC R15,R13
(0054) ad_add += temp;
0071 0D6E ADD R22,R14
0072 1D7F ADC R23,R15
0073 94A3 INC R10
0074 2D8A MOV R24,R10
0075 3084 CPI R24,4
0076 F2D8 BCS 0x0052
(0055) }
(0056) adh = ad_add>>2;
0077 01AB MOVW R20,R22
0078 9556 LSR R21
0079 9547 ROR R20
007A 9556 LSR R21
007B 9547 ROR R20
(0057) return(adh);
007C 018A MOVW R16,R20
007D D538 RCALL pop_gset5
007E 9508 RET
FILE: E:\CHIYUA~1\LI_POT~1\main.c
(0001) /********************************************************************************/
(0002) //
(0003) // builder : 2007-04-10
(0004) // Target : ATMEAG 48V
(0005) // Crystal : 內(nèi)部 8.00 MHz
(0006) //
(0007) // 快速充電器
(0008)
(0009) /********************************************************************************/
(0010)
(0011) #include <iom48v.h>
(0012) #include <macros.h>
(0013)
(0014) #include "adc.h"
(0015)
(0016)
(0017) #define uchar unsigned char
(0018) #define uint unsigned int
(0019)
(0020)
(0021) #define SET_LED1 PORTD |= (1<<PD4)
(0022) #define CLR_LED1 PORTD &= ~(1<<PD4)
(0023)
(0024) #define SET_LED2 PORTD |= (1<<PD3)
(0025) #define CLR_LED2 PORTD &= ~(1<<PD3)
(0026)
(0027) #define SET_LED3 PORTD |= (1<<PD1)
(0028) #define CLR_LED3 PORTD &= ~(1<<PD1)
(0029)
(0030) #define SET_LED4 PORTD |= (1<<PD0)
(0031) #define CLR_LED4 PORTD &= ~(1<<PD0)
(0032)
(0033)
(0034) #define SET_COM1 PORTD |= (1<<PD7)
(0035) #define CLR_COM1 PORTD &= ~(1<<PD7)
(0036)
(0037) #define SET_COM2 PORTD |= (1<<PD6)
(0038) #define CLR_COM2 PORTD &= ~(1<<PD6)
(0039)
(0040) #define SET_COM3 PORTD |= (1<<PD5)
(0041) #define CLR_COM3 PORTD &= ~(1<<PD5)
(0042)
(0043) #define SET_OUT PORTD |= (1<<PD2)
(0044) #define CLR_OUT PORTD &= ~(1<<PD2)
(0045)
(0046)
(0047)
(0048) static const uchar Char_tab[10] ={0x7D,0x41,0xEC,0xE5,0xD1,0xB5,0xBD,0x61,0xFD,0xF5};
(0049)
(0050) union
(0051) { uint temp;
(0052) uchar data[2];
(0053) }CH;
(0054)
(0055) uint V[4];
(0056)
(0057) uchar flag_2ms;
(0058) uchar flag_20ms;
(0059)
(0060) uint ad_temp;
(0061) uchar adc_num,adc_ch=0;
(0062) uchar batt;
(0063)
(0064) uchar dip_bit;
(0065) uint batt_num;
(0066)
(0067) uchar mode,out_time;
(0068) uint key,key1,key2;
(0069) uchar pulse;
(0070)
(0071) uchar dp=0x02;
(0072) uchar down,delay;
(0073)
(0074) uchar led_time,led_flag;
(0075) uchar flas1,flas2,flas3,flas4;
(0076)
(0077)
(0078)
(0079)
(0080) /*---------------------------------------------------------------
(0081) 初始化
(0082) ----------------------------------------------------------------*/
(0083)
(0084) void timer0_init(void)
(0085) {
(0086) TCCR0B = 0x00; //stop
_timer0_init:
007F 2422 CLR R2
0080 BC25 OUT 0x25,R2
(0087) TCNT0 = 0x06; //set count
0081 E086 LDI R24,6
0082 BD86 OUT 0x26,R24
(0088) TCCR0A = 0x00;
0083 BC24 OUT 0x24,R2
(0089) TCCR0B = 0x03; //start timer
0084 E083 LDI R24,3
0085 BD85 OUT 0x25,R24
0086 9508 RET
(0090) }
(0091)
(0092)
(0093) void timer1_init(void)
(0094) {
(0095) TCCR1A = 0x00;
_timer1_init:
0087 2422 CLR R2
0088 92200080 STS 0x80,R2
(0096) TCCR1B = 0x00;
008A 92200081 STS 0x81,R2
008C 9508 RET
(0097) }
(0098)
(0099)
(0100)
(0101) void init_devices(void)
(0102) {
(0103) CLI();
_init_devices:
008D 94F8 BCLR 7
(0104)
(0105) DDRB = 0xFF;
008E EF8F LDI R24,0xFF
008F B984 OUT 0x04,R24
(0106) PORTB = 0x00;
0090 2422 CLR R2
0091 B825 OUT 0x05,R2
(0107)
(0108) DDRC = 0x00;
0092 B827 OUT 0x07,R2
(0109) PORTC = 0x0C;
0093 E08C LDI R24,0xC
0094 B988 OUT 0x08,R24
(0110)
(0111) DDRD = 0xFF;
0095 EF8F LDI R24,0xFF
0096 B98A OUT 0x0A,R24
(0112) PORTD = 0x00;
0097 B82B OUT 0x0B,R2
(0113)
(0114) adc_int();
0098 DFA7 RCALL _adc_int
(0115) timer0_init();
0099 DFE5 RCALL _timer0_init
(0116) timer1_init();
009A DFEC RCALL _timer1_init
(0117)
(0118) TIMSK0 = 0x01; //timer 0 interrupt sources
009B E081 LDI R24,1
009C 9380006E STS 0x6E,R24
(0119) TIMSK1 = 0x00; //timer 1 interrupt sources
009E 2422 CLR R2
009F 9220006F STS 0x6F,R2
(0120) TIMSK2 = 0x00; //timer 2 interrupt sources
00A1 92200070 STS 0x70,R2
(0121)
(0122) SEI();
00A3 9478 BSET 7
00A4 9508 RET
_bubble_sort:
j --> R20
change --> R22
temp --> R10
k --> R14
len --> R12
a --> Y+10
00A5 D4DD RCALL push_arg4
00A6 D511 RCALL push_gset5
00A7 2EC2 MOV R12,R18
(0123) }
(0124)
(0125)
(0126)
(0127)
(0128)
(0129)
(0130) void bubble_sort(uint *a,uchar len)
(0131) {
(0132) int j,k;
(0133) int temp;
(0134) int change=1;
00A8 E061 LDI R22,1
00A9 E070 LDI R23,0
(0135)
(0136) for (j=0;(j<len-1)&&change;j++)
00AA 2744 CLR R20
00AB 2755 CLR R21
00AC C052 RJMP 0x00FF
(0137) {
(0138) change=0;
00AD 2766 CLR R22
00AE 2777 CLR R23
(0139) for (k=j+1;k<len;k++)
00AF 01CA MOVW R24,R20
00B0 9601 ADIW R24,1
00B1 017C MOVW R14,R24
00B2 C044 RJMP 0x00F7
(0140) {
(0141) if (a[k-1]>a[k])
00B3 E002 LDI R16,2
00B4 E010 LDI R17,0
00B5 0197 MOVW R18,R14
00B6 D4ED RCALL empy16s
00B7 0118 MOVW R2,R16
00B8 01F1 MOVW R30,R2
00B9 840A LDD R0,Y+10
00BA 841B LDD R1,Y+11
00BB 0DE0 ADD R30,R0
00BC 1DF1 ADC R31,R1
00BD 8040 LDD R4,Z+0
00BE 8051 LDD R5,Z+1
00BF 01F1 MOVW R30,R2
00C0 9732 SBIW R30,2
00C1 0DE0 ADD R30,R0
00C2 1DF1 ADC R31,R1
00C3 8020 LDD R2,Z+0
00C4 8031 LDD R3,Z+1
00C5 1442 CP R4,R2
00C6 0453 CPC R5,R3
00C7 F008 BCS 0x00C9
00C8 C02B RJMP 0x00F4
(0142) {
(0143) change=1;
00C9 E061 LDI R22,1
00CA E070 LDI R23,0
(0144) temp=a[k-1];
00CB E002 LDI R16,2
00CC E010 LDI R17,0
00CD 0197 MOVW R18,R14
00CE D4D5 RCALL empy16s
00CF 01F8 MOVW R30,R16
00D0 9732 SBIW R30,2
00D1 840A LDD R0,Y+10
00D2 841B LDD R1,Y+11
00D3 0DE0 ADD R30,R0
00D4 1DF1 ADC R31,R1
00D5 80A0 LDD R10,Z+0
00D6 80B1 LDD R11,Z+1
(0145) a[k-1]=a[k];
00D7 E002 LDI R16,2
00D8 E010 LDI R17,0
00D9 0197 MOVW R18,R14
00DA D4C9 RCALL empy16s
00DB 0118 MOVW R2,R16
00DC 01F1 MOVW R30,R2
00DD 840A LDD R0,Y+10
00DE 841B LDD R1,Y+11
00DF 0DE0 ADD R30,R0
00E0 1DF1 ADC R31,R1
00E1 8040 LDD R4,Z+0
00E2 8051 LDD R5,Z+1
00E3 01F1 MOVW R30,R2
00E4 9732 SBIW R30,2
00E5 0DE0 ADD R30,R0
00E6 1DF1 ADC R31,R1
00E7 8251 STD Z+1,R5
00E8 8240 STD Z+0,R4
(0146) a[k]=temp;
00E9 E002 LDI R16,2
00EA E010 LDI R17,0
00EB 0197 MOVW R18,R14
00EC D4B7 RCALL empy16s
00ED 01F8 MOVW R30,R16
00EE 840A LDD R0,Y+10
00EF 841B LDD R1,Y+11
00F0 0DE0 ADD R30,R0
00F1 1DF1 ADC R31,R1
00F2 82B1 STD Z+1,R11
00F3 82A0 STD Z+0,R10
00F4 01C7 MOVW R24,R14
00F5 9601 ADIW R24,1
00F6 017C MOVW R14,R24
00F7 2C2C MOV R2,R12
00F8 2433 CLR R3
00F9 14E2 CP R14,R2
00FA 04F3 CPC R15,R3
00FB F40C BGE 0x00FD
00FC CFB6 RJMP 0x00B3
00FD 5F4F SUBI R20,0xFF
00FE 4F5F SBCI R21,0xFF
00FF 2D8C MOV R24,R12
0100 2799 CLR R25
0101 9701 SBIW R24,1
0102 1748 CP R20,R24
0103 0759 CPC R21,R25
0104 F424 BGE 0x0109
0105 3060 CPI R22,0
0106 0767 CPC R22,R23
0107 F009 BEQ 0x0109
0108 CFA4 RJMP 0x00AD
0109 D4AC RCALL pop_gset5
010A 9624 ADIW R28,4
010B 9508 RET
_abcd:
temp --> Y+0
010C 9728 SBIW R28,0x8
(0147) }
(0148) }
(0149) }
(0150) }
(0151)
(0152)
(0153)
(0154)
(0155) void abcd(void)
(0156) {
(0157) uint temp[4];
(0158)
(0159) if(batt==4)
010D 91800116 LDS R24,batt
010F 3084 CPI R24,4
0110 F539 BNE 0x0138
(0160) {
(0161) temp[0] = V[0];
0111 9020011C LDS R2,V
0113 9030011D LDS R3,V+1
0115 8239 STD Y+1,R3
0116 8228 STD Y+0,R2
(0162) temp[1] = V[1]-V[0];
0117 9040011E LDS R4,V+2
0119 9050011F LDS R5,V+3
011B 1842 SUB R4,R2
011C 0853 SBC R5,R3
011D 825B STD Y+3,R5
011E 824A STD Y+2,R4
(0163) temp[2] = V[2]-V[1];
011F 9020011E LDS R2,V+2
0121 9030011F LDS R3,V+3
0123 90400120 LDS R4,0x120
0125 90500121 LDS R5,0x121
0127 1842 SUB R4,R2
0128 0853 SBC R5,R3
0129 825D STD Y+5,R5
012A 824C STD Y+4,R4
(0164) temp[3] = V[3]-V[2];
012B 90200120 LDS R2,0x120
012D 90300121 LDS R3,0x121
012F 90400122 LDS R4,0x122
0131 90500123 LDS R5,0x123
0133 1842 SUB R4,R2
0134 0853 SBC R5,R3
0135 825F STD Y+7,R5
0136 824E STD Y+6,R4
(0165) }
0137 C03D RJMP 0x0175
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