?? main.sym
字號:
00000000 W __heap_end
00000000 a __tmp_reg__
00000000 W __vector_default
00000000 T __vectors
00000001 a __zero_reg__
00000016 T __ctors_end
00000016 T __ctors_start
00000016 T __dtors_end
00000016 T __dtors_start
00000016 W __init
0000001e T __do_copy_data
0000002a t .do_copy_data_loop
00000030 t .do_copy_data_start
00000036 T __do_clear_bss
0000003d a __SP_L__
0000003e t .do_clear_bss_loop
0000003e a __SP_H__
0000003f a __SREG__
00000040 t .do_clear_bss_start
00000048 T __bad_interrupt
00000048 W __vector_1
00000048 W __vector_10
00000048 W __vector_2
00000048 W __vector_3
00000048 W __vector_4
00000048 W __vector_5
00000048 W __vector_6
00000048 W __vector_8
0000004a T __vector_7
00000096 T __vector_9
000000da T IsRecvComplete
000000df W __stack
000000f0 T SendToUart
00000106 T RecvFromUart
0000011e T main
00000156 A __data_load_end
00000156 A __data_load_start
00000156 T _etext
00000156 t Letext
00800060 B __bss_start
00800060 D __data_end
00800060 D __data_start
00800060 D _edata
00800060 B g_bRxdLen
00800061 B g_bRxdPos
00800062 B g_bTxdLen
00800063 B g_bTxdPos
00800064 B g_aRecvBuf
00800074 B g_aSendBuf
00800084 B __bss_end
00800084 ? _end
00810000 ? __eeprom_end
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