/* ********************************************************************** *     8010.h *     Copyright 1999, 2000 Creative Labs, Inc. * ********************************************************************** * *     Date		    Author	    Summary of changes *     ----		    ------	    ------------------ *     October 20, 1999     Bertrand Lee    base code release *     November 2, 1999     Alan Cox	    Cleaned of 8bit chars, DOS *					    line endings *     December 8, 1999     Jon Taylor	    Added lots of new register info * ********************************************************************** * *     This program is free software; you can redistribute it and/or *     modify it under the terms of the GNU General Public License as *     published by the Free Software Foundation; either version 2 of *     the License, or (at your option) any later version. * *     This program is distributed in the hope that it will be useful, *     but WITHOUT ANY WARRANTY; without even the implied warranty of *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the *     GNU General Public License for more details. * *     You should have received a copy of the GNU General Public *     License along with this program; if not, write to the Free *     Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, *     USA. * * ********************************************************************** */#ifndef _8010_H#define _8010_H#include <linux/types.h>/************************************************************************************************//* PCI function 0 registers, address = <val> + PCIBASE0						*//************************************************************************************************/#define PTR			0x00		/* Indexed register set pointer register	*/						/* NOTE: The CHANNELNUM and ADDRESS words can	*/						/* be modified independently of each other.	*/#define PTR_CHANNELNUM_MASK	0x0000003f	/* For each per-channel register, indicates the	*/						/* channel number of the register to be		*/						/* accessed.  For non per-channel registers the	*/						/* value should be set to zero.			*/#define PTR_ADDRESS_MASK	0x07ff0000	/* Register index				*/#define DATA			0x04		/* Indexed register set data register		*/#define IPR			0x08		/* Global interrupt pending register		*/						/* Clear pending interrupts by writing a 1 to	*/						/* the relevant bits and zero to the other bits	*/#define IPR_SAMPLERATETRACKER	0x01000000	/* Sample rate tracker lock status change	*/#define IPR_FXDSP		0x00800000	/* Enable FX DSP interrupts			*/#define IPR_FORCEINT		0x00400000	/* Force Sound Blaster interrupt		*/#define IPR_PCIERROR		0x00200000	/* PCI bus error				*/#define IPR_VOLINCR		0x00100000	/* Volume increment button pressed		*/#define IPR_VOLDECR		0x00080000	/* Volume decrement button pressed		*/#define IPR_MUTE		0x00040000	/* Mute button pressed				*/#define IPR_MICBUFFULL		0x00020000	/* Microphone buffer full			*/#define IPR_MICBUFHALFFULL	0x00010000	/* Microphone buffer half full			*/#define IPR_ADCBUFFULL		0x00008000	/* ADC buffer full				*/#define IPR_ADCBUFHALFFULL	0x00004000	/* ADC buffer half full				*/#define IPR_EFXBUFFULL		0x00002000	/* Effects buffer full				*/#define IPR_EFXBUFHALFFULL	0x00001000	/* Effects buffer half full			*/#define IPR_GPSPDIFSTATUSCHANGE	0x00000800	/* GPSPDIF channel status change		*/#define IPR_CDROMSTATUSCHANGE	0x00000400	/* CD-ROM channel status change			*/#define IPR_INTERVALTIMER	0x00000200	/* Interval timer terminal count		*/#define IPR_MIDITRANSBUFEMPTY	0x00000100	/* MIDI UART transmit buffer empty		*/#define IPR_MIDIRECVBUFEMPTY	0x00000080	/* MIDI UART receive buffer empty		*/#define IPR_CHANNELLOOP		0x00000040	/* One or more channel loop interrupts pending	*/#define IPR_CHANNELNUMBERMASK	0x0000003f	/* When IPR_CHANNELLOOP is set, indicates the	*/						/* Highest set channel in CLIPL or CLIPH.  When	*/						/* IP is written with CL set, the bit in CLIPL	*/						/* or CLIPH corresponding to the CIN value 	*/						/* written will be cleared.			*/#define INTE			0x0c		/* Interrupt enable register			*/#define INTE_VIRTUALSB_MASK	0xc0000000	/* Virtual Soundblaster I/O port capture	*/#define INTE_VIRTUALSB_220	0x00000000	/* Capture at I/O base address 0x220-0x22f	*/#define INTE_VIRTUALSB_240	0x40000000	/* Capture at I/O base address 0x240		*/#define INTE_VIRTUALSB_260	0x80000000	/* Capture at I/O base address 0x260		*/#define INTE_VIRTUALSB_280	0xc0000000	/* Capture at I/O base address 0x280		*/#define INTE_VIRTUALMPU_MASK	0x30000000	/* Virtual MPU I/O port capture			*/#define INTE_VIRTUALMPU_300	0x00000000	/* Capture at I/O base address 0x300-0x301	*/#define INTE_VIRTUALMPU_310	0x10000000	/* Capture at I/O base address 0x310		*/#define INTE_VIRTUALMPU_320	0x20000000	/* Capture at I/O base address 0x320		*/#define INTE_VIRTUALMPU_330	0x30000000	/* Capture at I/O base address 0x330		*/#define INTE_MASTERDMAENABLE	0x08000000	/* Master DMA emulation at 0x000-0x00f		*/#define INTE_SLAVEDMAENABLE	0x04000000	/* Slave DMA emulation at 0x0c0-0x0df		*/#define INTE_MASTERPICENABLE	0x02000000	/* Master PIC emulation at 0x020-0x021		*/#define INTE_SLAVEPICENABLE	0x01000000	/* Slave PIC emulation at 0x0a0-0x0a1		*/#define INTE_VSBENABLE		0x00800000	/* Enable virtual Soundblaster			*/#define INTE_ADLIBENABLE	0x00400000	/* Enable AdLib emulation at 0x388-0x38b	*/#define INTE_MPUENABLE		0x00200000	/* Enable virtual MPU				*/#define INTE_FORCEINT		0x00100000	/* Continuously assert INTAN			*/#define INTE_MRHANDENABLE	0x00080000	/* Enable the "Mr. Hand" logic			*/						/* NOTE: There is no reason to use this under	*/						/* Linux, and it will cause odd hardware 	*/						/* behavior and possibly random segfaults and	*/						/* lockups if enabled.				*/#define INTE_SAMPLERATETRACKER	0x00002000	/* Enable sample rate tracker interrupts	*/						/* NOTE: This bit must always be enabled       	*/#define INTE_FXDSPENABLE	0x00001000	/* Enable FX DSP interrupts			*/#define INTE_PCIERRORENABLE	0x00000800	/* Enable PCI bus error interrupts		*/#define INTE_VOLINCRENABLE	0x00000400	/* Enable volume increment button interrupts	*/#define INTE_VOLDECRENABLE	0x00000200	/* Enable volume decrement button interrupts	*/#define INTE_MUTEENABLE		0x00000100	/* Enable mute button interrupts		*/#define INTE_MICBUFENABLE	0x00000080	/* Enable microphone buffer interrupts		*/#define INTE_ADCBUFENABLE	0x00000040	/* Enable ADC buffer interrupts			*/#define INTE_EFXBUFENABLE	0x00000020	/* Enable Effects buffer interrupts		*/#define INTE_GPSPDIFENABLE	0x00000010	/* Enable GPSPDIF status interrupts		*/#define INTE_CDSPDIFENABLE	0x00000008	/* Enable CDSPDIF status interrupts		*/#define INTE_INTERVALTIMERENB	0x00000004	/* Enable interval timer interrupts		*/#define INTE_MIDITXENABLE	0x00000002	/* Enable MIDI transmit-buffer-empty interrupts	*/#define INTE_MIDIRXENABLE	0x00000001	/* Enable MIDI receive-buffer-empty interrupts	*/#define WC			0x10		/* Wall Clock register				*/#define WC_SAMPLECOUNTER_MASK	0x03FFFFC0	/* Sample periods elapsed since reset		*/#define WC_SAMPLECOUNTER	0x14060010#define WC_CURRENTCHANNEL	0x0000003F	/* Channel [0..63] currently being serviced	*/						/* NOTE: Each channel takes 1/64th of a sample	*/						/* period to be serviced.			*/#define HCFG			0x14		/* Hardware config register			*/						/* NOTE: There is no reason to use the legacy	*/						/* SoundBlaster emulation stuff described below	*/						/* under Linux, and all kinds of weird hardware	*/						/* behavior can result if you try.  Don't.	*/#define HCFG_LEGACYFUNC_MASK	0xe0000000	/* Legacy function number 			*/#define HCFG_LEGACYFUNC_MPU	0x00000000	/* Legacy MPU	 				*/#define HCFG_LEGACYFUNC_SB	0x40000000	/* Legacy SB					*/#define HCFG_LEGACYFUNC_AD	0x60000000	/* Legacy AD					*/#define HCFG_LEGACYFUNC_MPIC	0x80000000	/* Legacy MPIC					*/#define HCFG_LEGACYFUNC_MDMA	0xa0000000	/* Legacy MDMA					*/#define HCFG_LEGACYFUNC_SPCI	0xc0000000	/* Legacy SPCI					*/#define HCFG_LEGACYFUNC_SDMA	0xe0000000	/* Legacy SDMA					*/#define HCFG_IOCAPTUREADDR	0x1f000000	/* The 4 LSBs of the captured I/O address.	*/#define HCFG_LEGACYWRITE	0x00800000	/* 1 = write, 0 = read 				*/#define HCFG_LEGACYWORD		0x00400000	/* 1 = word, 0 = byte 				*/#define HCFG_LEGACYINT		0x00200000	/* 1 = legacy event captured. Write 1 to clear.	*/						/* NOTE: The rest of the bits in this register	*/						/* _are_ relevant under Linux.			*/#define HCFG_CODECFORMAT_MASK	0x00070000	/* CODEC format					*/#define HCFG_CODECFORMAT_AC97	0x00000000	/* AC97 CODEC format -- Primary Output		*/#define HCFG_CODECFORMAT_I2S	0x00010000	/* I2S CODEC format -- Secondary (Rear) Output	*/#define HCFG_GPINPUT0		0x00004000	/* External pin112				*/#define HCFG_GPINPUT1		0x00002000	/* External pin110				*/#define HCFG_GPOUTPUT_MASK	0x00001c00	/* External pins which may be controlled	*/#define HCFG_GPOUT0		0x00001000	/* set to enable digital out on 5.1 cards	*/#define HCFG_JOYENABLE      	0x00000200	/* Internal joystick enable    			*/#define HCFG_PHASETRACKENABLE	0x00000100	/* Phase tracking enable			*/						/* 1 = Force all 3 async digital inputs to use	*/						/* the same async sample rate tracker (ZVIDEO)	*/#define HCFG_AC3ENABLE_MASK	0x0x0000e0	/* AC3 async input control - Not implemented	*/#define HCFG_AC3ENABLE_ZVIDEO	0x00000080	/* Channels 0 and 1 replace ZVIDEO		*/#define HCFG_AC3ENABLE_CDSPDIF	0x00000040	/* Channels 0 and 1 replace CDSPDIF		*/#define HCFG_AC3ENABLE_GPSPDIF  0x00000020      /* Channels 0 and 1 replace GPSPDIF             */#define HCFG_AUTOMUTE		0x00000010	/* When set, the async sample rate convertors	*/						/* will automatically mute their output when	*/						/* they are not rate-locked to the external	*/						/* async audio source  				*/#define HCFG_LOCKSOUNDCACHE	0x00000008	/* 1 = Cancel bustmaster accesses to soundcache */						/* NOTE: This should generally never be used.  	*/#define HCFG_LOCKTANKCACHE_MASK	0x00000004	/* 1 = Cancel bustmaster accesses to tankcache	*/						/* NOTE: This should generally never be used.  	*/#define HCFG_LOCKTANKCACHE	0x01020014#define HCFG_MUTEBUTTONENABLE	0x00000002	/* 1 = Master mute button sets AUDIOENABLE = 0.	*/						/* NOTE: This is a 'cheap' way to implement a	*/						/* master mute function on the mute button, and	*/						/* in general should not be used unless a more	*/						/* sophisticated master mute function has not	*/						/* been written.       				*/#define HCFG_AUDIOENABLE	0x00000001	/* 0 = CODECs transmit zero-valued samples	*/						/* Should be set to 1 when the EMU10K1 is	*/						/* completely initialized.			*/#define MUDATA			0x18		/* MPU401 data register (8 bits)       		*/#define MUCMD			0x19		/* MPU401 command register (8 bits)    		*/#define MUCMD_RESET		0xff		/* RESET command				*/#define MUCMD_ENTERUARTMODE	0x3f		/* Enter_UART_mode command			*/						/* NOTE: All other commands are ignored		*/#define MUSTAT			MUCMD		/* MPU401 status register (8 bits)     		*/#define MUSTAT_IRDYN		0x80		/* 0 = MIDI data or command ACK			*/#define MUSTAT_ORDYN		0x40		/* 0 = MUDATA can accept a command or data	*/#define TIMER			0x1a		/* Timer terminal count register		*/						/* NOTE: After the rate is changed, a maximum	*/						/* of 1024 sample periods should be allowed	*/						/* before the new rate is guaranteed accurate.	*/#define TIMER_RATE_MASK		0x000003ff	/* Timer interrupt rate in sample periods	*/						/* 0 == 1024 periods, [1..4] are not useful	*/#define TIMER_RATE		0x0a00001a#define AC97DATA		0x1c		/* AC97 register set data register (16 bit)	*/