}	chksum  = ((u32)s[4] << 24) | ((u32)s[5] << 16) | ((u32)s[ 6] <<  8) |  (u32)s[ 7];	rangenr = ((u32)s[8] << 24) | ((u32)s[9] << 16) | ((u32)s[10] <<  8) |  (u32)s[11];	s += 12; l -= 12;	hdr = s;	s += 8 * rangenr; l -= 8 * rangenr;	data = s;	/* validate bootstrap image */	h = hdr; s = data; chksum2 = 0;	for (i = 0; i < rangenr; i++) {		start  = ((u32)h[0] << 24) | ((u32)h[1] << 16) | ((u32)h[2] <<  8) |  (u32)h[3];		length = ((u32)h[4] << 24) | ((u32)h[5] << 16) | ((u32)h[6] <<  8) |  (u32)h[7];		h += 8;		/* too short */		if (l < length) {			printf("bootstrap image corrupted. (too short data)\n");			return -1;		}		l -= length;		j = (int)length / 4;		while (j-- > 0) {			chksum2 += ((u32)s[0] << 24) | ((u32)s[1] << 16) | ((u32)s[2] <<  8) |  (u32)s[3];			s += 4;		}	}	/* checksum must match */	if (chksum != chksum2) {		printf("bootstrap image corrupted. (checksum error)\n");		return -1;	}	/* nothing must be left */	if (l != 0) {		printf("bootstrap image corrupted. (garbage at the end)\n");		return -1;	}	/* write the image */	h = hdr;	s = data;	for (i = 0; i < rangenr; i++) {		start  = ((u32)h[0] << 24) | ((u32)h[1] << 16) | ((u32)h[2] <<  8) |  (u32)h[3];		length = ((u32)h[4] << 24) | ((u32)h[5] << 16) | ((u32)h[6] <<  8) |  (u32)h[7];		h += 8;		c62_write(start, (u32 *)s, length / 4);		s += length;	}	/* and now validate checksum */	h = hdr;	s = data;	chksum2 = 0;	for (i = 0; i < rangenr; i++) {		start  = ((u32)h[0] << 24) | ((u32)h[1] << 16) | ((u32)h[2] <<  8) |  (u32)h[3];		length = ((u32)h[4] << 24) | ((u32)h[5] << 16) | ((u32)h[6] <<  8) |  (u32)h[7];		h += 8;		chksum2 += c62_checksum(start, length / 4);		s += length;	}	/* checksum must match */	if (chksum != chksum2) {		printf("bootstrap in DSP memory is corrupted\n");		return -1;	}	return 0;}struct host_init {	u32 master_mode;	struct {		u8 port_id;		u8 slot_id;	} ch_serial_map[32];	u32 clk_divider[2];	/* pll */	u32 initmode;	u32 pllm;	u32 div[4];	u32 oscdiv1;	u32 unused[10];};const struct host_init hi_default = {	.master_mode	=#if !defined(CONFIG_NETTA_ISDN)		-1,#else		0,#endif	.ch_serial_map	= {		[ 0]	= { .port_id = 2, .slot_id = 16 },		[ 1]	= { .port_id = 2, .slot_id = 17 },		[ 2]	= { .port_id = 2, .slot_id = 18 },		[ 3]	= { .port_id = 2, .slot_id = 19 },		[ 4]	= { .port_id = 2, .slot_id = 20 },		[ 5]	= { .port_id = 2, .slot_id = 21 },		[ 6]	= { .port_id = 2, .slot_id = 22 },		[ 7]	= { .port_id = 2, .slot_id = 23 },		[ 8]	= { .port_id = 2, .slot_id = 24 },		[ 9]	= { .port_id = 2, .slot_id = 25 },		[10]	= { .port_id = 2, .slot_id = 26 },		[11]	= { .port_id = 2, .slot_id = 27 },		[12]	= { .port_id = 2, .slot_id = 28 },		[13]	= { .port_id = 2, .slot_id = 29 },		[14]	= { .port_id = 2, .slot_id = 30 },		[15]	= { .port_id = 2, .slot_id = 31 },	},	/*	   dsp_clk(xin, pllm)         = xin * pllm	   serial_clk(xin, pllm, div) = (dsp_clk(xin, pllm) / 2) / (div + 1)	 */	.clk_divider	= {		[0]	= 47,		/* must be 2048Hz */		[1]	= 47,	},	.initmode	= 1,	.pllm		=#if !defined(CONFIG_NETTA_ISDN)	8,		/* for =~ 25MHz 8 */#else	4,#endif	.div		= {		[0]	= 0x8000,		[1]	= 0x8000,	/* for =~ 25MHz 0x8000 */		[2]	= 0x8001,	/* for =~ 25MHz 0x8001 */		[3]	= 0x8001,	/* for =~ 25MHz 0x8001 */	},	.oscdiv1	= 0,};static void hi_write(const struct host_init *hi){	u32 hi_buf[1 + sizeof(*hi) / sizeof(u32)];	u32 *s;	u32 chksum;	int i;	memset(hi_buf, 0, sizeof(hi_buf));	s = hi_buf;	s++;	*s++ = hi->master_mode;	for (i = 0; i < (sizeof(hi->ch_serial_map) / sizeof(hi->ch_serial_map[0])) / 2; i++)		*s++ = ((u32)hi->ch_serial_map[i * 2 + 1].slot_id << 24) | ((u32)hi->ch_serial_map[i * 2 + 1].port_id << 16) |				((u32)hi->ch_serial_map[i * 2 + 0].slot_id << 8) | (u32)hi->ch_serial_map[i * 2 + 0].port_id;	for (i = 0; i < sizeof(hi->clk_divider)/sizeof(hi->clk_divider[0]); i++)		*s++ = hi->clk_divider[i];	*s++ = hi->initmode;	*s++ = hi->pllm;	for (i = 0; i < sizeof(hi->div)/sizeof(hi->div[0]); i++)		*s++ = hi->div[i];	*s++ = hi->oscdiv1;	chksum = 0;	for (i = 1; i < sizeof(hi_buf)/sizeof(hi_buf[0]); i++)		chksum += hi_buf[i];	hi_buf[0] = -chksum;	c62_write(0x1000, hi_buf, sizeof(hi_buf) / sizeof(hi_buf[0]));}static void run_bootstrap(void){	dsp_go_slow();	hi_write(&hi_default);	/* signal interrupt */	dsp_write_hpic(0x0002);	dsp_delay();	dsp_go_fast();}#endif/***********************************************************************************************************/int board_post_dsp(int flags){	u32 ramS, ramE;	u32 data, data2;	int i, j, k;#if !defined(CONFIG_NETTA_6412)	int r;#endif	dsp_reset();	dsp_init_hpic();#if !defined(CONFIG_NETTA_6412)	dsp_go_slow();#endif	data = 0x11223344;	dsp_write_hpic_word(DSP_HPIA, data);	data2 = dsp_read_hpic_word(DSP_HPIA);	if (data2 !=   0x11223344) {		printf("HPIA: ** ERROR; wrote 0x%08X read 0x%08X **\n", data, data2);		goto err;	}	data = 0xFFEEDDCC;	dsp_write_hpic_word(DSP_HPIA, data);	data2 = dsp_read_hpic_word(DSP_HPIA);	if (data2 != 0xFFEEDDCC) {		printf("HPIA: ** ERROR; wrote 0x%08X read 0x%08X **\n", data, data2);		goto err;	}#if defined(CONFIG_NETTA_6412)	dsp_dram_initialize();#else	r = load_bootstrap();	if (r < 0) {		printf("BOOTSTRAP: ** ERROR ** failed to load\n");		goto err;	}	run_bootstrap();	dsp_go_fast();#endif	printf("    ");	/* test RAMs */	for (k = 0; k < sizeof(ranges)/sizeof(ranges[0]); k++) {		ramS = ranges[k].start;		ramE = ranges[k].start + ranges[k].size;		for (j = 0; j < 3; j++) {			printf("\b\b\b\bR%d.%d", k, j);			for (i = ramS; i < ramE; i += 4) {				data = 0;				switch (j) {					case 0: data = 0xAA55AA55; break;					case 1: data = 0x55AA55AA; break;					case 2: data = (u32)i;     break;				}				c62_write_word(i, data);				data2 = c62_read_word(i);				if (data != data2) {					printf(" ** ERROR at 0x%08X; wrote 0x%08X read 0x%08X **\n", i, data, data2);					goto err;				}			}		}	}	printf("\b\b\b\b    \b\b\b\bOK\n");#if !defined(CONFIG_NETTA_6412)	/* XXX assume that this works */	load_bootstrap();	run_bootstrap();	dsp_go_fast();#endif	return 0;err:	return -1;}int board_dsp_reset(void){#if !defined(CONFIG_NETTA_6412)	int r;#endif	dsp_reset();	dsp_init_hpic();#if defined(CONFIG_NETTA_6412)	dsp_dram_initialize();#else	dsp_go_slow();	r = load_bootstrap();	if (r < 0)		return r;	run_bootstrap();	dsp_go_fast();#endif	return 0;}