; 78K0R Series C Compiler V1.00 Assembler Source
;                                                Date:16 Jul 2008 Time:11:52:18

; Command   : -cf1166a0 -yC:\Program Files\NEC Electronics Tools\DEV -_msgoff -
;             a -zpn -no System.c
; In-file   : System.c
; Asm-file  : System.asm
; Para-file : 

$PROCESSOR(F1166A0)
$DEBUG
$NODEBUGA
$KANJICODE NONE
$TOL_INF	03FH, 0100H, 00H, 04000H, 00H

$DGS	FIL_NAM, .file,		024H,	0FFFEH,	03FH,	067H,	01H,	00H
$DGS	AUX_FIL, System.c
$DGS	MOD_NAM, System,	00H,	0FFFEH,	00H,	077H,	00H,	00H
$DGS	SEC_NAM, @@BITS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CNST,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@R_INIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATA,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@R_INIS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INIS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CNSTL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@RLINIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INITL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATAL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CALT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CODE,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CODEL,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@BASE,	U,	U,	00H,	078H,	00H,	00H
$DGS	GLV_SYM, _Clock_Init,	U,	U,	01H,	026H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	024H,	01H,	00H
$DGS	BEG_FUN, ??bf_Clock_Init,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 03EH,		04H,	01AH
$DGS	AUT_VAR, _i,		02H,	0FFFFH,	0DH,	01H,	00H,	00H
$DGS	AUT_VAR, _temp_stabset,	01H,	0FFFFH,	0CH,	01H,	00H,	00H
$DGS	AUT_VAR, _temp_stabwait,	00H,	0FFFFH,	0CH,	01H,	00H,	00H
$DGS	BEG_BLK, ??bb00_Clock_Init,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 09H,		00H,	01EH
$DGS	END_BLK, ??eb00_Clock_Init,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 0CH
$DGS	BEG_BLK, ??bb01_Clock_Init,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 013H,		00H,	00H
$DGS	END_BLK, ??eb01_Clock_Init,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 015H
$DGS	END_FUN, ??ef_Clock_Init,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 01CH

	PUBLIC	_Clock_Init

@@BITS	BSEG

@@CNST	CSEG	MIRRORP

@@R_INIT	CSEG	UNIT64KP

@@INIT	DSEG	BASEP

@@DATA	DSEG	BASEP

@@R_INIS	CSEG	UNIT64KP

@@INIS	DSEG	SADDRP

@@DATS	DSEG	SADDRP

@@CNSTL	CSEG	PAGE64KP

@@RLINIT	CSEG	UNIT64KP

@@INITL	DSEG	UNIT64KP

@@DATAL	DSEG	UNIT64KP

@@CALT	CSEG	CALLT0

; line    48
; line    49
; line    50
; line    51
; line    52
; line   254
; line   255
; line    62

@@CODEL	CSEG
_Clock_Init:
$DGL	1,19
	push	hl						;[INF] 1, 1
	subw	sp,#04H						;[INF] 2, 1
	movw	hl,sp						;[INF] 3, 1
??bf_Clock_Init:
; line    66
$DGL	0,5
	mov	OSTS,#07H	; 7 				;[INF] 3, 1
; line    67
$DGL	0,6
	mov	CMC,#051H	; 81 				;[INF] 3, 1
; line    68
$DGL	0,7
	clr1	CSC.7						;[INF] 3, 2
; line    69
$DGL	0,8
	mov	a,#0FFH	; 255 					;[INF] 2, 1
	mov	[hl+1],a	; temp_stabset 			;[INF] 2, 1
; line    70
$DGL	0,9
?L0003:
??bb00_Clock_Init:
; line    71
$DGL	0,10
	mov	a,OSTC						;[INF] 2, 1
	mov	[hl],a	; temp_stabwait 			;[INF] 1, 1
; line    72
$DGL	0,11
	and	a,[hl+1]	; temp_stabset 			;[INF] 2, 1
	mov	[hl],a	; temp_stabwait 			;[INF] 1, 1
??eb00_Clock_Init:
; line    73
$DGL	0,12
	mov	a,[hl]	; temp_stabwait 			;[INF] 1, 1
	cmp	a,[hl+1]	; temp_stabset 			;[INF] 2, 1
	bnz	$?L0003						;[INF] 2, 4
; line    74
$DGL	0,13
	set1	CKC.4						;[INF] 3, 2
; line    76
$DGL	0,15
	set1	CSC.0						;[INF] 3, 2
; line    78
$DGL	0,17
	clr1	CSC.6						;[INF] 3, 2
; line    80
$DGL	0,19
	clrw	ax						;[INF] 1, 1
	movw	[hl+2],ax	; i 				;[INF] 2, 1
?L0006:
	movw	ax,[hl+2]	; i 				;[INF] 2, 1
	movw	bc,ax						;[INF] 1, 1
	movw	ax,#014H	; 20 				;[INF] 3, 1
	cmpw	ax,bc						;[INF] 1, 1
	bc	$?L0007						;[INF] 2, 4
??bb01_Clock_Init:
; line    81
$DGL	0,20
	nop							;[INF] 1, 1
??eb01_Clock_Init:
; line    82
$DGL	0,21
	movw	ax,[hl+2]	; i 				;[INF] 2, 1
	incw	ax						;[INF] 1, 1
	movw	[hl+2],ax	; i 				;[INF] 2, 1
	br	$?L0006						;[INF] 2, 4
?L0007:
; line    84
$DGL	0,23
	clr1	CKC.6						;[INF] 3, 2
; line    85
$DGL	0,24
	mov	a,CKC						;[INF] 2, 1
	and	a,#0F8H	; 248 					;[INF] 2, 1
	mov	CKC,a						;[INF] 2, 1
; line    86
$DGL	0,25
	mov	a,CKC						;[INF] 2, 1
	or	a,#01H	; 1 					;[INF] 2, 1
	mov	CKC,a						;[INF] 2, 1
; line    87
$DGL	0,26
	clrb	!OSMC						;[INF] 3, 1
; line    89
$DGL	0,28
??ef_Clock_Init:
	addw	sp,#04H						;[INF] 2, 1
	pop	hl						;[INF] 1, 1
	ret							;[INF] 1, 6
??ee_Clock_Init:

@@CODE	CSEG	BASE

@@BASE	CSEG	BASE
	END


; *** Code Information ***
;
; $FILE C:\NECTOOLS32\1166\System.c
;
; $FUNC Clock_Init(62)
;	void=(void)
;	CODE SIZE= 81 bytes, CLOCK_SIZE= 60 clocks, STACK_SIZE= 6 bytes

; Target chip : uPD78F1166_A0
; Device file : V1.00