?? dcac_averaged.mdl
字號:
}
BlockParameterDefaults {
Block {
BlockType Constant
}
Block {
BlockType Display
Format "short"
Decimation "10"
Floating off
SampleTime "-1"
}
Block {
BlockType Fcn
Expr "sin(u[1])"
SampleTime "-1"
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParameterDataTypeMode "Same as input"
ParameterDataType "sfix(16)"
ParameterScalingMode "Best Precision: Matrix-wise"
ParameterScaling "2^0"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Integrator
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
IgnoreLimit off
ZeroCross on
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Scope
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "-1"
}
Block {
BlockType Sin
SineType "Time based"
TimeSource "Use simulation time"
Amplitude "1"
Bias "0"
Frequency "1"
Phase "0"
Samples "10"
Offset "0"
SampleTime "-1"
VectorParams1D on
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Arial"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "dcac_averaged"
Location [432, 447, 1078, 842]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "cyan"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType SubSystem
Name "DC-AC"
Ports [2, 6]
Position [100, 46, 205, 199]
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
FunctionWithSeparateData off
MaskHideContents off
MaskDescription "Averaged model of a switched-mode DC-AC inverte"
"r for single-phase grid-connected systems. Output ac current is in phase with"
" the output ac line voltage, and has RMS value set by the reference input. Co"
"nduction losses are modeled by a series resistor RL at the output. Switching "
"and other losses are modeled by a current source Isw in parallel with the DC "
"input voltage."
MaskPromptString "AC line RMS voltage|AC line frequency|Output po"
"rt series resistance|Switching loss current"
MaskStyleString "edit,edit,edit,edit"
MaskTunableValueString "on,on,on,on"
MaskCallbackString "|||"
MaskEnableString "on,on,on,on"
MaskVisibilityString "on,on,on,on"
MaskToolTipString "on,on,on,on"
MaskVarAliasString ",,,"
MaskVariables "Vrms=@1;f=@2;RL=@3;IQ=@4;"
MaskDisplay "text(0.5,0.75,'DC-AC','horizontalAlignment', 'c"
"enter');\ntext(0.5,0.6,'inverter','horizontalAlignment', 'center');\ntext(0.5"
",0.45,'(averaged)','horizontalAlignment', 'center');"
MaskIconFrame on
MaskIconOpaque off
MaskIconRotate "none"
MaskIconUnits "normalized"
MaskValueString "120|60|0.8|0.05"
MaskTabNameString ",,,"
Port {
PortNumber 1
Name "vac"
PropagatedSignals "vac"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
Port {
PortNumber 2
Name "iac"
PropagatedSignals "iref"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
Port {
PortNumber 3
Name "iin"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
Port {
PortNumber 4
Name "Duty"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
Port {
PortNumber 5
Name "pin"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
Port {
PortNumber 6
Name "pout"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
System {
Name "DC-AC"
Location [287, 427, 1171, 768]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "Vdc"
Position [20, 118, 50, 132]
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "Iref"
Position [15, 248, 45, 262]
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Constant
Name "Constant"
Position [620, 95, 650, 125]
Value "IQ"
VectorParams1D on
SamplingMode "Sample based"
OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "sfix(16)"
ConRadixGroup "Use specified scaling"
OutScaling "2^0"
SampleTime "inf"
FramePeriod "inf"
}
Block {
BlockType Product
Name "Divide"
Ports [2, 1]
Position [475, 77, 505, 108]
Inputs "*/"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
RndMeth "Floor"
SaturateOnIntegerOverflow off
Port {
PortNumber 1
Name "2D-1"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Fcn
Name "Fcn"
Position [605, 45, 665, 75]
Expr "(u+1)/2"
}
Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [175, 232, 205, 263]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
Port {
PortNumber 1
Name "iref"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Product
Name "Product1"
Ports [2, 1]
Position [630, 152, 660, 183]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product2"
Ports [2, 1]
Position [745, 277, 775, 308]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product3"
Ports [2, 1]
Position [760, 87, 790, 118]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name "RL"
Position [270, 68, 335, 102]
Gain "RL"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sin
Name "Sine Wave"
Ports [0, 1]
Position [80, 15, 110, 45]
SineType "Time based"
Amplitude "1*sqrt(2)"
Frequency "2*pi*f"
SampleTime "0"
}
Block {
BlockType Sum
Name "Sum1"
Ports [2, 1]
Position [360, 75, 380, 95]
ShowName off
IconShape "round"
Inputs "++|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
Port {
PortNumber 1
Name "vac+RLiac"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Sum
Name "Sum2"
Ports [2, 1]
Position [685, 160, 705, 180]
ShowName off
IconShape "round"
Inputs "++|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name "Vrms"
Position [190, 13, 255, 47]
Gain "Vrms"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
Port {
PortNumber 1
Name "vac"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Outport
Name "vac"
Position [820, 23, 850, 37]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "iac"
Position [820, 243, 850, 257]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "iin"
Position [820, 163, 850, 177]
Port "3"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "D"
Position [820, 53, 850, 67]
Port "4"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "pin"
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