?? stm32f10x_fsmc.txt
字號:
; generated by ARM C/C++ Compiler with , RVCT4.0 [Build 524] for uVision
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\Obj\stm32f10x_fsmc.o --depend=.\Obj\stm32f10x_fsmc.d --device=DARMSTM --apcs=interwork -O0 -Otime -I..\..\Libraries\CMSIS\Core\CM3 -I..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\Source\inc -Id:\Keil\ARM\INC\ST\STM32F10x -D__MICROLIB -DSTM32F10X_HD -DUSE_STDPERIPH_DRIVER ..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c]
THUMB
AREA ||i.FSMC_ClearFlag||, CODE, READONLY, ALIGN=2
FSMC_ClearFlag PROC
;;;738 */
;;;739 void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG)
000000 2810 CMP r0,#0x10
;;;740 {
;;;741 /* Check the parameters */
;;;742 assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank));
;;;743 assert_param(IS_FSMC_CLEAR_FLAG(FSMC_FLAG)) ;
;;;744
;;;745 if(FSMC_Bank == FSMC_Bank2_NAND)
000002 d107 BNE |L1.20|
;;;746 {
;;;747 FSMC_Bank2->SR2 &= ~FSMC_FLAG;
000004 f04f4220 MOV r2,#0xa0000000
000008 6e52 LDR r2,[r2,#0x64]
00000a 438a BICS r2,r2,r1
00000c f04f4320 MOV r3,#0xa0000000
000010 665a STR r2,[r3,#0x64]
000012 e012 B |L1.58|
|L1.20|
;;;748 }
;;;749 else if(FSMC_Bank == FSMC_Bank3_NAND)
000014 f5b07f80 CMP r0,#0x100
000018 d107 BNE |L1.42|
;;;750 {
;;;751 FSMC_Bank3->SR3 &= ~FSMC_FLAG;
00001a 4a08 LDR r2,|L1.60|
00001c 6812 LDR r2,[r2,#0]
00001e 438a BICS r2,r2,r1
000020 f04f4320 MOV r3,#0xa0000000
000024 f8c32084 STR r2,[r3,#0x84]
000028 e007 B |L1.58|
|L1.42|
;;;752 }
;;;753 /* FSMC_Bank4_PCCARD*/
;;;754 else
;;;755 {
;;;756 FSMC_Bank4->SR4 &= ~FSMC_FLAG;
00002a 4a04 LDR r2,|L1.60|
00002c 3220 ADDS r2,r2,#0x20
00002e 6812 LDR r2,[r2,#0]
000030 438a BICS r2,r2,r1
000032 f04f4320 MOV r3,#0xa0000000
000036 f8c320a4 STR r2,[r3,#0xa4]
|L1.58|
;;;757 }
;;;758 }
00003a 4770 BX lr
;;;759
ENDP
|L1.60|
DCD 0xa0000084
AREA ||i.FSMC_ClearITPendingBit||, CODE, READONLY, ALIGN=2
FSMC_ClearITPendingBit PROC
;;;824 */
;;;825 void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT)
000000 2810 CMP r0,#0x10
;;;826 {
;;;827 /* Check the parameters */
;;;828 assert_param(IS_FSMC_IT_BANK(FSMC_Bank));
;;;829 assert_param(IS_FSMC_IT(FSMC_IT));
;;;830
;;;831 if(FSMC_Bank == FSMC_Bank2_NAND)
000002 d108 BNE |L2.22|
;;;832 {
;;;833 FSMC_Bank2->SR2 &= ~(FSMC_IT >> 3);
000004 f04f4220 MOV r2,#0xa0000000
000008 6e52 LDR r2,[r2,#0x64]
00000a ea2202d1 BIC r2,r2,r1,LSR #3
00000e f04f4320 MOV r3,#0xa0000000
000012 665a STR r2,[r3,#0x64]
000014 e014 B |L2.64|
|L2.22|
;;;834 }
;;;835 else if(FSMC_Bank == FSMC_Bank3_NAND)
000016 f5b07f80 CMP r0,#0x100
00001a d108 BNE |L2.46|
;;;836 {
;;;837 FSMC_Bank3->SR3 &= ~(FSMC_IT >> 3);
00001c 4a09 LDR r2,|L2.68|
00001e 6812 LDR r2,[r2,#0]
000020 ea2202d1 BIC r2,r2,r1,LSR #3
000024 f04f4320 MOV r3,#0xa0000000
000028 f8c32084 STR r2,[r3,#0x84]
00002c e008 B |L2.64|
|L2.46|
;;;838 }
;;;839 /* FSMC_Bank4_PCCARD*/
;;;840 else
;;;841 {
;;;842 FSMC_Bank4->SR4 &= ~(FSMC_IT >> 3);
00002e 4a05 LDR r2,|L2.68|
000030 3220 ADDS r2,r2,#0x20
000032 6812 LDR r2,[r2,#0]
000034 ea2202d1 BIC r2,r2,r1,LSR #3
000038 f04f4320 MOV r3,#0xa0000000
00003c f8c320a4 STR r2,[r3,#0xa4]
|L2.64|
;;;843 }
;;;844 }
000040 4770 BX lr
;;;845
ENDP
000042 0000 DCW 0x0000
|L2.68|
DCD 0xa0000084
AREA ||i.FSMC_GetECC||, CODE, READONLY, ALIGN=2
FSMC_GetECC PROC
;;;594 */
;;;595 uint32_t FSMC_GetECC(uint32_t FSMC_Bank)
000000 4601 MOV r1,r0
;;;596 {
;;;597 uint32_t eccval = 0x00000000;
000002 2000 MOVS r0,#0
;;;598
;;;599 if(FSMC_Bank == FSMC_Bank2_NAND)
000004 2910 CMP r1,#0x10
000006 d103 BNE |L3.16|
;;;600 {
;;;601 /* Get the ECCR2 register value */
;;;602 eccval = FSMC_Bank2->ECCR2;
000008 f04f4220 MOV r2,#0xa0000000
00000c 6f50 LDR r0,[r2,#0x74]
00000e e001 B |L3.20|
|L3.16|
;;;603 }
;;;604 else
;;;605 {
;;;606 /* Get the ECCR3 register value */
;;;607 eccval = FSMC_Bank3->ECCR3;
000010 4a01 LDR r2,|L3.24|
000012 6810 LDR r0,[r2,#0]
|L3.20|
;;;608 }
;;;609 /* Return the error correction code value */
;;;610 return(eccval);
;;;611 }
000014 4770 BX lr
;;;612
ENDP
000016 0000 DCW 0x0000
|L3.24|
DCD 0xa0000094
AREA ||i.FSMC_GetFlagStatus||, CODE, READONLY, ALIGN=2
FSMC_GetFlagStatus PROC
;;;688 */
;;;689 FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG)
000000 b510 PUSH {r4,lr}
;;;690 {
000002 4603 MOV r3,r0
;;;691 FlagStatus bitstatus = RESET;
000004 2000 MOVS r0,#0
;;;692 uint32_t tmpsr = 0x00000000;
000006 2200 MOVS r2,#0
;;;693
;;;694 /* Check the parameters */
;;;695 assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank));
;;;696 assert_param(IS_FSMC_GET_FLAG(FSMC_FLAG));
;;;697
;;;698 if(FSMC_Bank == FSMC_Bank2_NAND)
000008 2b10 CMP r3,#0x10
00000a d103 BNE |L4.20|
;;;699 {
;;;700 tmpsr = FSMC_Bank2->SR2;
00000c f04f4420 MOV r4,#0xa0000000
000010 6e62 LDR r2,[r4,#0x64]
000012 e008 B |L4.38|
|L4.20|
;;;701 }
;;;702 else if(FSMC_Bank == FSMC_Bank3_NAND)
000014 f5b37f80 CMP r3,#0x100
000018 d102 BNE |L4.32|
;;;703 {
;;;704 tmpsr = FSMC_Bank3->SR3;
00001a 4c06 LDR r4,|L4.52|
00001c 6822 LDR r2,[r4,#0]
00001e e002 B |L4.38|
|L4.32|
;;;705 }
;;;706 /* FSMC_Bank4_PCCARD*/
;;;707 else
;;;708 {
;;;709 tmpsr = FSMC_Bank4->SR4;
000020 4c04 LDR r4,|L4.52|
000022 3420 ADDS r4,r4,#0x20
000024 6822 LDR r2,[r4,#0]
|L4.38|
;;;710 }
;;;711
;;;712 /* Get the flag status */
;;;713 if ((tmpsr & FSMC_FLAG) != (uint16_t)RESET )
000026 420a TST r2,r1
000028 d001 BEQ |L4.46|
;;;714 {
;;;715 bitstatus = SET;
00002a 2001 MOVS r0,#1
00002c e000 B |L4.48|
|L4.46|
;;;716 }
;;;717 else
;;;718 {
;;;719 bitstatus = RESET;
00002e 2000 MOVS r0,#0
|L4.48|
;;;720 }
;;;721 /* Return the flag status */
;;;722 return bitstatus;
;;;723 }
000030 bd10 POP {r4,pc}
;;;724
ENDP
000032 0000 DCW 0x0000
|L4.52|
DCD 0xa0000084
AREA ||i.FSMC_GetITStatus||, CODE, READONLY, ALIGN=2
FSMC_GetITStatus PROC
;;;773 */
;;;774 ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT)
000000 b570 PUSH {r4-r6,lr}
;;;775 {
000002 4602 MOV r2,r0
;;;776 ITStatus bitstatus = RESET;
000004 2000 MOVS r0,#0
;;;777 uint32_t tmpsr = 0x0, itstatus = 0x0, itenable = 0x0;
000006 2300 MOVS r3,#0
000008 2400 MOVS r4,#0
00000a 2500 MOVS r5,#0
;;;778
;;;779 /* Check the parameters */
;;;780 assert_param(IS_FSMC_IT_BANK(FSMC_Bank));
;;;781 assert_param(IS_FSMC_GET_IT(FSMC_IT));
;;;782
;;;783 if(FSMC_Bank == FSMC_Bank2_NAND)
00000c 2a10 CMP r2,#0x10
00000e d103 BNE |L5.24|
;;;784 {
;;;785 tmpsr = FSMC_Bank2->SR2;
000010 f04f4620 MOV r6,#0xa0000000
000014 6e73 LDR r3,[r6,#0x64]
000016 e008 B |L5.42|
|L5.24|
;;;786 }
;;;787 else if(FSMC_Bank == FSMC_Bank3_NAND)
000018 f5b27f80 CMP r2,#0x100
00001c d102 BNE |L5.36|
;;;788 {
;;;789 tmpsr = FSMC_Bank3->SR3;
00001e 4e08 LDR r6,|L5.64|
000020 6833 LDR r3,[r6,#0]
000022 e002 B |L5.42|
|L5.36|
;;;790 }
;;;791 /* FSMC_Bank4_PCCARD*/
;;;792 else
;;;793 {
;;;794 tmpsr = FSMC_Bank4->SR4;
000024 4e06 LDR r6,|L5.64|
000026 3620 ADDS r6,r6,#0x20
000028 6833 LDR r3,[r6,#0]
|L5.42|
;;;795 }
;;;796