?? stm32f10x_tim.txt
字號:
TIM_GetCounter PROC
;;;2478 */
;;;2479 uint16_t TIM_GetCounter(TIM_TypeDef* TIMx)
000000 4601 MOV r1,r0
;;;2480 {
;;;2481 /* Check the parameters */
;;;2482 assert_param(IS_TIM_ALL_PERIPH(TIMx));
;;;2483 /* Get the Counter Register value */
;;;2484 return TIMx->CNT;
000002 8c88 LDRH r0,[r1,#0x24]
;;;2485 }
000004 4770 BX lr
;;;2486
ENDP
AREA ||i.TIM_GetFlagStatus||, CODE, READONLY, ALIGN=1
TIM_GetFlagStatus PROC
;;;2521 */
;;;2522 FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG)
000000 4602 MOV r2,r0
;;;2523 {
;;;2524 ITStatus bitstatus = RESET;
000002 2000 MOVS r0,#0
;;;2525 /* Check the parameters */
;;;2526 assert_param(IS_TIM_ALL_PERIPH(TIMx));
;;;2527 assert_param(IS_TIM_GET_FLAG(TIM_FLAG));
;;;2528
;;;2529 if ((TIMx->SR & TIM_FLAG) != (uint16_t)RESET)
000004 8a13 LDRH r3,[r2,#0x10]
000006 420b TST r3,r1
000008 d001 BEQ |L37.14|
;;;2530 {
;;;2531 bitstatus = SET;
00000a 2001 MOVS r0,#1
00000c e000 B |L37.16|
|L37.14|
;;;2532 }
;;;2533 else
;;;2534 {
;;;2535 bitstatus = RESET;
00000e 2000 MOVS r0,#0
|L37.16|
;;;2536 }
;;;2537 return bitstatus;
;;;2538 }
000010 4770 BX lr
;;;2539
ENDP
AREA ||i.TIM_GetITStatus||, CODE, READONLY, ALIGN=1
TIM_GetITStatus PROC
;;;2589 */
;;;2590 ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT)
000000 b530 PUSH {r4,r5,lr}
;;;2591 {
000002 4602 MOV r2,r0
;;;2592 ITStatus bitstatus = RESET;
000004 2000 MOVS r0,#0
;;;2593 uint16_t itstatus = 0x0, itenable = 0x0;
000006 2300 MOVS r3,#0
000008 2400 MOVS r4,#0
;;;2594 /* Check the parameters */
;;;2595 assert_param(IS_TIM_ALL_PERIPH(TIMx));
;;;2596 assert_param(IS_TIM_GET_IT(TIM_IT));
;;;2597
;;;2598 itstatus = TIMx->SR & TIM_IT;
00000a 8a15 LDRH r5,[r2,#0x10]
00000c ea050301 AND r3,r5,r1
;;;2599
;;;2600 itenable = TIMx->DIER & TIM_IT;
000010 8995 LDRH r5,[r2,#0xc]
000012 ea050401 AND r4,r5,r1
;;;2601 if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET))
000016 b113 CBZ r3,|L38.30|
000018 b10c CBZ r4,|L38.30|
;;;2602 {
;;;2603 bitstatus = SET;
00001a 2001 MOVS r0,#1
00001c e000 B |L38.32|
|L38.30|
;;;2604 }
;;;2605 else
;;;2606 {
;;;2607 bitstatus = RESET;
00001e 2000 MOVS r0,#0
|L38.32|
;;;2608 }
;;;2609 return bitstatus;
;;;2610 }
000020 bd30 POP {r4,r5,pc}
;;;2611
ENDP
AREA ||i.TIM_GetPrescaler||, CODE, READONLY, ALIGN=1
TIM_GetPrescaler PROC
;;;2491 */
;;;2492 uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx)
000000 4601 MOV r1,r0
;;;2493 {
;;;2494 /* Check the parameters */
;;;2495 assert_param(IS_TIM_ALL_PERIPH(TIMx));
;;;2496 /* Get the Prescaler Register value */
;;;2497 return TIMx->PSC;
000002 8d08 LDRH r0,[r1,#0x28]
;;;2498 }
000004 4770 BX lr
;;;2499
ENDP
AREA ||i.TIM_ICInit||, CODE, READONLY, ALIGN=1
TIM_ICInit PROC
;;;579 */
;;;580 void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
000000 b570 PUSH {r4-r6,lr}
;;;581 {
000002 4604 MOV r4,r0
000004 460d MOV r5,r1
;;;582 /* Check the parameters */
;;;583 assert_param(IS_TIM_123458_PERIPH(TIMx));
;;;584 assert_param(IS_TIM_CHANNEL(TIM_ICInitStruct->TIM_Channel));
;;;585 assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity));
;;;586 assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection));
;;;587 assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler));
;;;588 assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter));
;;;589
;;;590 if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
000006 8828 LDRH r0,[r5,#0]
000008 b950 CBNZ r0,|L40.32|
;;;591 {
;;;592 /* TI1 Configuration */
;;;593 TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
00000a 892b LDRH r3,[r5,#8]
00000c 88aa LDRH r2,[r5,#4]
00000e 8869 LDRH r1,[r5,#2]
000010 4620 MOV r0,r4
000012 f7fffffe BL TI1_Config
;;;594 TIM_ICInitStruct->TIM_ICSelection,
;;;595 TIM_ICInitStruct->TIM_ICFilter);
;;;596 /* Set the Input Capture Prescaler value */
;;;597 TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
000016 88e9 LDRH r1,[r5,#6]
000018 4620 MOV r0,r4
00001a f7fffffe BL TIM_SetIC1Prescaler
00001e e025 B |L40.108|
|L40.32|
;;;598 }
;;;599 else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2)
000020 8828 LDRH r0,[r5,#0]
000022 2804 CMP r0,#4
000024 d10a BNE |L40.60|
;;;600 {
;;;601 /* TI2 Configuration */
;;;602 TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
000026 892b LDRH r3,[r5,#8]
000028 88aa LDRH r2,[r5,#4]
00002a 8869 LDRH r1,[r5,#2]
00002c 4620 MOV r0,r4
00002e f7fffffe BL TI2_Config
;;;603 TIM_ICInitStruct->TIM_ICSelection,
;;;604 TIM_ICInitStruct->TIM_ICFilter);
;;;605 /* Set the Input Capture Prescaler value */
;;;606 TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
000032 88e9 LDRH r1,[r5,#6]
000034 4620 MOV r0,r4
000036 f7fffffe BL TIM_SetIC2Prescaler
00003a e017 B |L40.108|
|L40.60|
;;;607 }
;;;608 else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3)
00003c 8828 LDRH r0,[r5,#0]
00003e 2808 CMP r0,#8
000040 d10a BNE |L40.88|
;;;609 {
;;;610 /* TI3 Configuration */
;;;611 TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
000042 892b LDRH r3,[r5,#8]
000044 88aa LDRH r2,[r5,#4]
000046 8869 LDRH r1,[r5,#2]
000048 4620 MOV r0,r4
00004a f7fffffe BL TI3_Config
;;;612 TIM_ICInitStruct->TIM_ICSelection,
;;;613 TIM_ICInitStruct->TIM_ICFilter);
;;;614 /* Set the Input Capture Prescaler value */
;;;615 TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
00004e 88e9 LDRH r1,[r5,#6]
000050 4620 MOV r0,r4
000052 f7fffffe BL TIM_SetIC3Prescaler
000056 e009 B |L40.108|
|L40.88|
;;;616 }
;;;617 else
;;;618 {
;;;619 /* TI4 Configuration */
;;;620 TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
000058 892b LDRH r3,[r5,#8]
00005a 88aa LDRH r2,[r5,#4]
00005c 8869 LDRH r1,[r5,#2]
00005e 4620 MOV r0,r4
000060 f7fffffe BL TI4_Config
;;;621 TIM_ICInitStruct->TIM_ICSelection,
;;;622 TIM_ICInitStruct->TIM_ICFilter);
;;;623 /* Set the Input Capture Prescaler value */
;;;624 TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
000064 88e9 LDRH r1,[r5,#6]
000066 4620 MOV r0,r4
000068 f7fffffe BL TIM_SetIC4Prescaler
|L40.108|
;;;625 }
;;;626 }
00006c bd70 POP {r4-r6,pc}
;;;627
ENDP
AREA ||i.TIM_ICStructInit||, CODE, READONLY, ALIGN=1
TIM_ICStructInit PROC
;;;752 */
;;;753 void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct)
000000 2100 MOVS r1,#0
;;;754 {
;;;755 /* Set the default configuration */
;;;756 TIM_ICInitStruct->TIM_Channel = TIM_Channel_1;
000002 8001 STRH r1,[r0,#0]
;;;757 TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
000004 8041 STRH r1,[r0,#2]
;;;758 TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI;
000006 2101 MOVS r1,#1
000008 8081 STRH r1,[r0,#4]
;;;759 TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
00000a 2100 MOVS r1,#0
00000c 80c1 STRH r1,[r0,#6]
;;;760 TIM_ICInitStruct->TIM_ICFilter = 0x00;
00000e 8101 STRH r1,[r0,#8]
;;;761 }
000010 4770 BX lr
;;;762
ENDP
AREA ||i.TIM_ITConfig||, CODE, READONLY, ALIGN=1
TIM_ITConfig PROC
;;;849 */
;;;850 void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState)
000000 b510 PUSH {r4,lr}
;;;851 {
;;;852 /* Check the parameters */
;;;853 assert_param(IS_TIM_ALL_PERIPH(TIMx));
;;;854 assert_param(IS_TIM_IT(TIM_IT));
;;;855 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;856
;;;857 if (NewState != DISABLE)
000002 b11a CBZ r2,|L42.12|
;;;858 {
;;;859 /* Enable the Interrupt sources */
;;;860 TIMx->DIER |= TIM_IT;
000004 8983 LDRH r3,[r0,#0xc]
000006 430b ORRS r3,r3,r1
000008 8183 STRH r3,[r0,#0xc]
00000a e004 B |L42.22|
|L42.12|
;;;861 }
;;;862 else
;;;863 {
;;;864 /* Disable the Interrupt sources */
;;;865 TIMx->DIER &= (uint16_t)~TIM_IT;
00000c 8983 LDRH r3,[r0,#0xc]
00000e 43cc MVNS r4,r1
000010 b2a4 UXTH r4,r4
000012 4023 ANDS r3,r3,r4
000014 8183 STRH r3,[r0,#0xc]
|L42.22|
;;;866 }
;;;867 }
000016 bd10 POP {r4,pc}
;;;868
ENDP
AREA ||i.TIM_ITRxExternalClockConfig||, CODE, READONLY, ALIGN=1
TIM_ITRxExternalClockConfig PROC
;;;982 */
;;;983 void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource)
000000 b530 PUSH {r4,r5,lr}
;;;984 {
000002 4604 MOV r4,r0
000004 460d MOV r5,r1
;;;985 /* Check the parameters */
;;;986 assert_param(IS_TIM_123458_PERIPH(TIMx));
;;;987 assert_param(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource));
;;;988 /* Select the Internal Trigger */
;;;989 TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource);
000006 4629 MOV r1,r5
000008 4620 MOV r0,r4
00000a f7fffffe BL TIM_SelectInputTrigger
;;;990 /* Select the External clock mode1 */
;;;991 TIMx->SMCR |= TIM_SlaveMode_External1;
00000e 8920 LDRH r0,[r4,#8]
000010 f0400007 ORR r0,r0,#7
000014 8120 STRH r0,[r4,#8]
;;;992 }
000016 bd30 POP {r4,r5,pc}
;;;993
ENDP
AREA ||i.TIM_InternalClockConfig||, CODE, READONLY, ALIGN=1
TIM_InternalClockConfig PROC
;;;963 */
;;;964 void TIM_InternalClockConfig(TIM_TypeDef* TIMx)
000000 8901 LDRH r1,[r0,#8]
;;;965 {
;;;966 /* Check the parameters */
;;;967 assert_?? 快捷鍵說明
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