/*C**************************************************************************
* NAME:         clock.c
*----------------------------------------------------------------------------
* Copyright (c) 2003 Atmel.
*----------------------------------------------------------------------------
* RELEASE:      snd1c-refd-nf-4_0_3      
* REVISION:     1.7     
*----------------------------------------------------------------------------
* PURPOSE:
* This file contains the clock routines
*
* NOTES:
* Configuration:
*   - FOSC in config.h
*****************************************************************************/

/*_____ I N C L U D E S ____________________________________________________*/

#include "config.h"                         /* system configuration */
#include "lib_mcu\mp3\mp3_drv.h"            /* mp3 driver definition */
#include "lib_mcu\aud\aud_drv.h"            /* audio driver definition */
#include "lib_mcu\usb\usb_drv.h"            /* usb driver definition */
#include "clock.h"                          /* clock definition */


/*_____ M A C R O S ________________________________________________________*/


/*_____ D E F I N I T I O N ________________________________________________*/


#if FOSC == 16000             /* Fpll= 16 * (R+1) / (N+1) */
St_clock  code  clock_div[8] =
  { 541,  47, 3, 15, _256Fs,  /* Fs= 22.05 KHz, Fpll= 90.32 MHz, Fmp3= 22.58 MHz */
    143, 24, 3,  9, _384Fs,   /* Fs= 24 KHz,    Fpll= 92.16 MHz, Fmp3= 23.04 MHz */
    534,  94, 3, 21, _256Fs,  /* Fs= 16 KHz,    Fpll= 90.11 MHz, Fmp3= 22.53 MHz */
    143, 24, 0, 29, _384Fs,   /* Fs= 8 KHz,     Fpll= 92.16 MHz, voice only */
    541,  95, 3,  7, _256Fs,  /* Fs= 44.1 KHz,  Fpll= 90.32 MHz, Fmp3= 22.58 MHz */
    143, 24, 3,  4, _384Fs,   /* Fs= 48 KHz,    Fpll= 92.16 MHz, Fmp3= 23.04 MHz */
    534,  94, 3, 10, _256Fs,  /* Fs= 32 KHz,    Fpll= 90.11 MHz, Fmp3= 22.53 MHz */
     11,  1, 1,  0,      0    /* USB only,      Fpll= 96 MHz */
  };
#endif



/*_____ D E C L A R A T I O N ______________________________________________*/


/*F**************************************************************************
* NAME: clock_song_init
*----------------------------------------------------------------------------
* PARAMS:
*   freq: 0 -> 22.05 KHz
*         1 -> 24 KHz
*         2 -> 16 KHz
*         3 -> unused
*         4 -> 44.1 KHz
*         5 -> 48 KHz
*         6 -> 32 KHz
*         7 -> unused
*
* return:
*----------------------------------------------------------------------------
* PURPOSE:
*   Song clock initialization
*----------------------------------------------------------------------------
* EXAMPLE:
*----------------------------------------------------------------------------
* NOTE:
*   freq is an index in the table giving the divider values
*----------------------------------------------------------------------------
* REQUIREMENTS:
*****************************************************************************/
void clock_song_init ()//Byte freq)
{
  Pll_set_rdiv(440);
  Pll_set_ndiv(24);
  Pll_enable();
  Mp3_set_clock(10);
  Aud_set_clock(24);
 
  //Pll_set_ndiv(clock_div[freq].n_div);
  //Pll_set_rdiv(clock_div[freq].r_div);
  //Pll_enable();
  //Mp3_set_clock(clock_div[freq].mp3_div);
  //Aud_set_clock(clock_div[freq].aud_div);
 // Aud_set_oversamp(clock_div[freq].dac_over);           /* init HLR bit */
}


/*F**************************************************************************
* NAME: clock_voice_init
*----------------------------------------------------------------------------
* PARAMS:
*
* return:
*----------------------------------------------------------------------------
* PURPOSE: 
*   Voice clock initialization
*----------------------------------------------------------------------------
* EXAMPLE:
*----------------------------------------------------------------------------
* NOTE:
*----------------------------------------------------------------------------
* REQUIREMENTS:

*****************************************************************************/
void clock_voice_init (void)
{
  Pll_set_ndiv(clock_div[VOC_FREQ].n_div);
  Pll_set_rdiv(clock_div[VOC_FREQ].r_div);
  Pll_enable();
  Aud_set_clock(clock_div[VOC_FREQ].aud_div);
  Aud_set_oversamp(clock_div[VOC_FREQ].dac_over);           /* init HLR bit */
}


/*F**************************************************************************
* NAME: clock_usb_init
*----------------------------------------------------------------------------
* PARAMS:
*
* return:
*----------------------------------------------------------------------------
* PURPOSE: 
*   USB clock initialization
*----------------------------------------------------------------------------
* EXAMPLE:
*----------------------------------------------------------------------------
* NOTE:
*----------------------------------------------------------------------------
* REQUIREMENTS:

*****************************************************************************/
void clock_usb_init (void)
{
  Pll_set_ndiv(clock_div[USB_FREQ].n_div);
  Pll_set_rdiv(clock_div[USB_FREQ].r_div);
  Pll_enable();
  Usb_set_clock(clock_div[USB_FREQ].mp3_div);   /* mp3_div = usb_div */
}


/*F**************************************************************************
* NAME: clock_disable
*----------------------------------------------------------------------------
* PARAMS:
*
* return:
*----------------------------------------------------------------------------
* PURPOSE: 
*   Clocks stop
*----------------------------------------------------------------------------
* EXAMPLE:
*----------------------------------------------------------------------------
* NOTE:
*----------------------------------------------------------------------------
* REQUIREMENTS:
*****************************************************************************/
void clock_disable (void)
{
  Pll_stop();
  Mp3_set_clock(0);
  Aud_set_clock(0);
  Usb_set_clock(0);
}