?? lle_cpu.c
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/*******************************************************************************/
/**
Copyright (c) 2007 Freescale Semiconductor
\file lle_Cpu.c
\brief S12XE CPU initialization
\author Freescale Semiconductor
\author B05114
\version 0.3
\date February/ 2008
*/
/*******************************************************************************/
/** S12X derivative information */
#include <MC9S12XEP100.h>
/** Common defines and macros */
#include <hidef.h>
/** Variable types and common definitions */
#include "typedefs.h"
/** Function prototypes */
#include "lle_Cpu.h"
/** XGATE definitions */
#include "lle_XGATE.h"
/*******************************************************************************/
/**
* \brief CPU core initial settings
* \author B05114
* \param void
* \return void
*/
void lle_CPU_Init(void)
{
/* COP module configuration */
COPCTL = 0x00; /* COP disable */
MMCCTL1 = 1; /* Enables Flash in the memory map */
DIRECT = 0; /* Default location for direct page */
IVBR = 0xFF; /* Default vector base address */
/* Initialize the XGATE vector block and the XGVBR register */
XGVBR= (unsigned int)(void*__far)(XGATE_VectorTable - XGATE_VECTOR_OFFSET);
XGMCTL= 0xFBC1; /* Enable XGATE mode and interrupts */
ENABLE_STOP(); /* Enable stop mode by executing stop instruction */
}
/*******************************************************************************/
/**
* \brief GPIO settings
* \author B05114
* \param void
* \return void
*/
void lle_SetupPINS(void)
{
/* Port A */
DDRA = 0x00; /* Whole port is configured as input */
PUCR_PUPAE = 1; /* with pull-up enabled */
/* Port B */
PORTB = 0x31;
PUCR_PUPBE = 0; /* Pull-up disabled */
DDRB = 0xDF; /* only PB5 is input from SBC watchdog */
/* Port C */
PORTC = 0x0E;
PUCR_PUPCE = 0; /* Pull-up disabled */
DDRC = 0x3F; /* PC1 to PC3 are CS outputs for e-switches */
/* PC6 and PC7 are inputs for push-buttons S1 and S2 */
/* Port D */
PORTD = 0x30;
PUCR_PUPDE = 0; /* Pull-up disabled */
DDRD = 0xFF; /* Whole port is configured as output */
/* Port E */
PUCR_PUPEE = 1; /* Whole port as input with pull-ups enabled */
DDRE = 0; /* PE0 and PE1 are interrupt inputs, remaining pins are NC */
/* Port K */
PORTK = 0x00;
PUCR_PUPKE = 0; /* Pull-up disabled */
DDRK= 0xFF; /* Whole port is configured as output */
RDRIV = 0xFF; /* Reduced drive on ports A, B, C, D, E, K. */
/* Port T */
PTT = 0x00; /* Initial state for e-switches control inputs */
PERT = 0x00; /* Pull-up disabled */
RDRT = 0xFF; /* Reduced drive */
DDRT = 0xFF; /* All outputs with reduced drive */
/* Port S */
PTS = 0x8A;
PERS = 0x00; /* Pull-up disabled */
RDRS = 0xFF; /* Reduced drive */
DDRS = 0xEA;
/* Port M */
PTM = 0xAA;
RDRM = 0xFF; /* Reduced drive */
PERM = 0x00; /* Pull-up disabled */
DDRM = 0xAA;
/* Port P */
PTP = 0;
PERP = 0x00; /* Pull-up disabled */
RDRP = 0xFF; /* Reduced drive */
DDRP = 0xF6; /* PP4 and PP5 are outputs for H-Bridge control */
/* PP6 and PP7 are PWM outputs for COSS control */
/* Port H */
PTH = 0x0A;
RDRH = 0xFF; /* Reduced drive for all outputs */
PERH = 0x00; /* Pull-up disabled */
DDRH = 0x0A; /* PH1 and PH3 are outputs (LIN_Tx) */
/* Port J */
PTJ = 0xA2;
RDRJ = 0xFF; /* Reduced drive for all outputs */
PERJ = 0x00; /* Pull-up disabled */
DDRJ = 0xA2; /* PJ1, PJ5 and PJ7 are outputs */
/* Port AD0: PAD08 to PAD15 */
PT0AD0 = 0x00;
RDR0AD0 = 0xFF; /* Reduced drive */
PER0AD0 = 0x00; /* Pull-up disabled */
DDR0AD0 = 0xE0;
/* Port AD0: PAD00 to PAD07 */
PT1AD0 = 0x00;
RDR1AD0 = 0xFF; /* Reduced drive */
PER1AD0 = 0x00; /* Pull-up disabled */
DDR1AD0 = 0xC0;
/* Port AD1: PAD23 to PAD16 */
PT1AD1 = 0x00;
RDR1AD1 = 0xFF; /* Reduced drive */
PER1AD1 = 0x00; /* Pull-up disabled */
DDR1AD1 = 0xFF;
/* I/O ports not connected to external pins on 144-LQFP device */
/* Port AD1: PAD24 to PAD31 */
PER0AD1 = 0xFF; /* Pull-up enabled */
DDR0AD1 = 0x00; /* Port configured as input */
/* Port R */
DDRR = 0x00; /* All inputs with pull-up enabled */
PERR = 0xFF;
/* Port L */
DDRL = 0x00; /* All inputs with pull-up enabled */
PERL = 0xFF;
/* Port F */
DDRF = 0x00; /* All inputs with pull-up enabled */
PERF = 0xFF;
}
/*******************************************************************************/
/**
* \brief Interrupts configuration
* \author B05114
* \param void
* \return void
*/
void lle_Interrupts_Init(void)
{
IRQCR_IRQEN = 0; /* Disable IRQ detection */
XIRQ_ENABLE(); /* Enable XIRQ */
ENABLE_INTERRUPTS();
}
/*******************************************************************************/
/**
* \brief SCI 2 configured @9600 bauds for FreeMASTER communication
* \author B05114
* \param void
* \return void
*/
void lle_Init_SCI(void)
{
/* SBR = SCI Bus Clock / (16 * Baud Rate)
SBR = 40M/(16 * 9600) = 260.416 = 0x104 */
SCI2BD = 0x104;
SCI2CR1_SCISWAI = 1; /* SCI2 disabled in wait mode */
}
/*******************************************************************************/
/**
* \brief Set S12XEP in wait mode
* \author B05114
* \param void
* \return void
*/
void lle_MCU_Wait_Mode(void)
{
WAIT(); /* Execute wait macro */
}
/*******************************************************************************/
/**
* \brief Set S12XEP in pseudo-stop mode
* \author B05114
* \param void
* \return void
*/
void lle_MCU_PseudoStop_Mode(void)
{
SCI2CR2_RIE = 0; /* Disable the SCI2 Rx interrupt */
CLKSEL_PSTP = 1; /* Oscillator continues running in stop mode */
STOP(); /* execute stop macro */
}
/*******************************************************************************/
/**
* \brief Set S12XEP in full-stop mode
* \author B05114
* \param void
* \return void
*/
void lle_MCU_FullStop_Mode(void)
{
CLKSEL_PLLSEL = 0; // System Clock = OSCCLK
PLLCTL_PLLON = 0; // PLL is turned OFF
PLLCTL_CME = 0; // Clock monitor is disabled
SCI2CR2_RIE = 0; /* Disable the SCI2 Rx interrupt */
CLKSEL_PSTP = 0; /* Oscillator disabled in stop mode */
STOP(); /* execute stop macro */
}
/******************************************************************************/
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