/*******************************************************************************/
/**
Copyright (c) 2007 Freescale Semiconductor
Freescale Confidential Proprietary
\file       lle_TIME.c
\brief      Time base initialization and SW delay loop
\author     Freescale Semiconductor
\author     B05114
\version    1.2
\date       March /2008
*/
/*******************************************************************************/

/** S12X derivative information */ 
#include <MC9S12XEP100.h> 

/** Variable types and common definitions */
#include "typedefs.h" 

/** Definitions and function prototypes for timers */
#include "lle_TIME.h"

/*******************************************************************************/
/**
* \brief    PLL initialization
* \author   B05114
* \param    void
* \return   void
*/
void lle_Init_XOSC(void) 
{
    ECLKCTL_NECLK = 1;  /* Disable ECLK output */
    ECLKCTL_NCLKX2 = 1; /* Disable ECLKX2 output */
    PLLCTL_FSTWKP = 0;  /* Fast wake up enabled */   
    PLLCTL_CME = 0;     /* Clock monitor disabled */    
    PLLCTL_SCME = 0;    /* Self clock mode disabled */
    
        
    PLLCTL_PLLON = 0;           /* Disable the PLL */
    POSTDIV = PLL_POSTDIV;      /* Set CRG postdivider */
    SYNR_SYN = PLL_SYNDIV;      /* Set PLL synthesizer register */
    REFDV_REFDV = PLL_REFDIV;   /* Set PLL divider register */
       
    SYNR_VCOFRQ = PLL_VCOFRQ;   /* VCO frequency range */        
    REFDV_REFFRQ = PLL_REFFRQ;  /* Reference frequency range */ 
    
    PLLCTL_PLLON = 1;   /* PLL enabled */
    
        while(!CRGFLG_LOCK)
            ;       /* Wait until the PLL is within the desired frequency */
                
    CLKSEL_PLLSEL = 1;  /* Select clock source from PLL */  
    
    CLKSEL_PSTP = 0;    /* Oscillator disabled in stop mode */ 
    PLLCTL_PCE = 0;     /* COP stops in pseudo-stop mode */
}

/*******************************************************************************/
/**
* \brief    Real time interrupt initialization at 50ms
* \author   B05114
* \param    void
* \return   void
*/
void lle_Init_RTI(UINT8 u8RTI_period)
{       
    /* Access to configuration data registers for interrupts */ 
    INT_CFADDR = 0xF0;          /* Select page containing RTI interrupt */  
    INT_CFDATA0_PRIOLVL = 0x01; /* Real Time Interrupt, priority 1, */    
    INT_CFDATA0_RQST = 1;       /* assigned to XGATE */ 
    
    RTICTL_RTDEC = 1;           /* Decimal divider enabled*/                                                                      
    RTICTL_RTR = u8RTI_period;  /* Divider for 50ms period */                         
    
    CLKSEL_RTIWAI = 0;  /* RTI keeps running in wait mode */  
    PLLCTL_PRE = 0;     /* RTI stops in pseudo-stop mode */  
                
    CRGFLG_RTIF = 1;    /* Clear real time interrupt flag */    
    CRGINT_RTIE = 1;    /* Enable real time interrupt */                                 
}  

/*******************************************************************************/
/**
* \brief    Autonomous periodical interrupt initialization
* \author   B05114
* \param    void
* \return   void
*/
void lle_Init_API(UINT16 u16API_period)
{
    /* API interrupt disabled to allow writes to control bits */         
    VREGAPICL_APIFE = 0;   
    
    VREGAPICL_APICLK = 0;       /* API clock as source */  
    
    VREGAPIR = u16API_period;   /* 100 ms for interrupt period */   
                          
    VREGAPICL_APIF = 1;     /* Clear interrupt flag */    
    VREGAPICL_APIE = 1;     /* Enable interrupt */                                 
    
    VREGAPICL_APIFE = 1;    /* API enabled */
} 

/*******************************************************************************/
/**
* \brief    Software loop for time delay
* \author   B02785
* \param    void
* \return   void
*/
void lle_SW_Delay(UINT16 u16Delay)
{        
    UINT16 u16Counter;
        
    for(u16Counter=0; u16Counter < u16Delay; u16Counter++ )   
        NOP();
}

/*******************************************************************************/