//***********************************************************************
//      Init routine for the TigerSHARC EZ-Kit DSPA (ID 0)
//      Overlay example in C
//      Inita.c
//***********************************************************************
        
//************************* Includes ************************************
#include <sysreg.h>
#include <builtins.h>

#ifdef __ADSPTS201__
	#include <defTS201.h>
#endif
#ifdef __ADSPTS101__
	#include <defTS101.h>
	#include "TS101_EZ_KIT_Defines.h"
#endif

#include <signal.h>

//************************* Externs *************************************
extern void dma0_int();

//***********************************************************************
void inita(void)
{
    volatile int temp;

//------------------------- Init SYSCON and SDRCON ----------------------

#ifdef __ADSPTS201__
	__builtin_sysreg_write(__SYSCON, SYSCON_MP_WID64 |      
                                     SYSCON_MEM_WID64 | 
	                                 SYSCON_MSH_PIPE2 | 
                                     SYSCON_MSH_WT0 | 
                                     SYSCON_MSH_IDLE |
		                             SYSCON_MS1_PIPE1 | 
                                     SYSCON_MS1_WT0 | 
                                     SYSCON_MS1_IDLE |
		                             SYSCON_MS0_SLOW | 
                                     SYSCON_MS0_WT3 | 
                                     SYSCON_MS0_IDLE);

    __builtin_sysreg_write(__SDRCON, SDRCON_INIT | 
                                     SDRCON_RAS2PC5 | 
                                     SDRCON_PC2RAS2 | 
	                                 SDRCON_REF3700 | 
                                     SDRCON_PG256 | 
                                     SDRCON_CLAT2 | 
                                     SDRCON_ENBL);
#endif    

#ifdef __ADSPTS101__
	__builtin_sysreg_write(__SYSCON, SYSCON_MP_WID64 |      
                                     SYSCON_MEM_WID64 | 
	                                 SYSCON_MSH_SLOW | 
                                     SYSCON_MSH_WT3 | 
                                     SYSCON_MSH_IDLE |
		                             SYSCON_MS1_SLOW | 
                                     SYSCON_MS1_WT3 | 
                                     SYSCON_MS1_IDLE |
		                             SYSCON_MS0_SLOW | 
                                     SYSCON_MS0_WT3 | 
                                     SYSCON_MS0_IDLE);

	#ifdef REV1_3_EZKIT
		__builtin_sysreg_write(__SDRCON,SDRCON_INIT | SDRCON_RAS2PC5 | SDRCON_PC2RAS2 | 
	  						SDRCON_REF1200 | SDRCON_PG256 | SDRCON_CLAT2 | SDRCON_ENBL);
	#endif

	#ifdef REV1_2_EZKIT
		__builtin_sysreg_write(__SDRCON,SDRCON_INIT | SDRCON_RAS2PC5 | SDRCON_PC2RAS2 | 
	  						SDRCON_REF1200 | SDRCON_PG1K | SDRCON_CLAT2 | SDRCON_ENBL);
	#endif

#endif
                                    

//---------------------- Enable Interrupts ------------------------------

    temp = __builtin_sysreg_read(__IMASKL);
    temp = temp | INT_DMA0;
    __builtin_sysreg_write(__IMASKL, temp);

#ifdef __ADSPTS201__
	__builtin_sysreg_write(__SQCTLST, SQCTL_GIE);
#endif    
#ifdef __ADSPTS101__
    temp = __builtin_sysreg_read(__IMASKH);
    temp = temp | INT_GIE;
    __builtin_sysreg_write(__IMASKH, temp);
#endif


//------------------------ Setup Interrupt ISR --------------------------

    interrupt(SIGDMA0, dma0_int);
}

//***********************************************************************