/* * *  Support for the mpeg transport stream transfers *  PCI function #2 of the cx2388x. * *    (c) 2004 Jelle Foks <jelle@foks.8m.com> *    (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au> *    (c) 2004 Gerd Knorr <kraxel@bytesex.org> * *  This program is free software; you can redistribute it and/or modify *  it under the terms of the GNU General Public License as published by *  the Free Software Foundation; either version 2 of the License, or *  (at your option) any later version. * *  This program is distributed in the hope that it will be useful, *  but WITHOUT ANY WARRANTY; without even the implied warranty of *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the *  GNU General Public License for more details. * *  You should have received a copy of the GNU General Public License *  along with this program; if not, write to the Free Software *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */#include <linux/module.h>#include <linux/init.h>#include <linux/device.h>#include <linux/dma-mapping.h>#include <linux/interrupt.h>#include <asm/delay.h>#include "cx88.h"/* ------------------------------------------------------------------ */MODULE_DESCRIPTION("mpeg driver for cx2388x based TV cards");MODULE_AUTHOR("Jelle Foks <jelle@foks.8m.com>");MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");MODULE_LICENSE("GPL");static unsigned int debug;module_param(debug,int,0644);MODULE_PARM_DESC(debug,"enable debug messages [mpeg]");#define dprintk(level,fmt, arg...)	if (debug >= level) \	printk(KERN_DEBUG "%s/2-mpeg: " fmt, dev->core->name, ## arg)#define mpeg_dbg(level,fmt, arg...)	if (debug >= level) \	printk(KERN_DEBUG "%s/2-mpeg: " fmt, core->name, ## arg)#if defined(CONFIG_MODULES) && defined(MODULE)#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)static void request_module_async(void *ptr){	struct cx8802_dev *dev=(struct cx8802_dev*)ptr;#elsestatic void request_module_async(struct work_struct *work){	struct cx8802_dev *dev=container_of(work, struct cx8802_dev, request_module_wk);#endif	if (dev->core->board.mpeg & CX88_MPEG_DVB)		request_module("cx88-dvb");	if (dev->core->board.mpeg & CX88_MPEG_BLACKBIRD)		request_module("cx88-blackbird");}static void request_modules(struct cx8802_dev *dev){#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)	INIT_WORK(&dev->request_module_wk, request_module_async, (void*)dev);#else	INIT_WORK(&dev->request_module_wk, request_module_async);#endif	schedule_work(&dev->request_module_wk);}#else#define request_modules(dev)#endif /* CONFIG_MODULES */static LIST_HEAD(cx8802_devlist);/* ------------------------------------------------------------------ */static int cx8802_start_dma(struct cx8802_dev    *dev,			    struct cx88_dmaqueue *q,			    struct cx88_buffer   *buf){	struct cx88_core *core = dev->core;	dprintk(1, "cx8802_start_dma w: %d, h: %d, f: %d\n",		buf->vb.width, buf->vb.height, buf->vb.field);	/* setup fifo + format */	cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28],				dev->ts_packet_size, buf->risc.dma);#if 0	cx88_set_scale(core, dev->width, dev->height, buf->vb.field);#endif	/* write TS length to chip */	cx_write(MO_TS_LNGTH, buf->vb.width);	/* FIXME: this needs a review.	 * also: move to cx88-blackbird + cx88-dvb source files? */	dprintk( 1, "core->active_type_id = 0x%08x\n", core->active_type_id);	if ( (core->active_type_id == CX88_MPEG_DVB) &&		(core->board.mpeg & CX88_MPEG_DVB) ) {		dprintk( 1, "cx8802_start_dma doing .dvb\n");		/* negedge driven & software reset */		cx_write(TS_GEN_CNTRL, 0x0040 | dev->ts_gen_cntrl);		udelay(100);		cx_write(MO_PINMUX_IO, 0x00);		cx_write(TS_HW_SOP_CNTRL, 0x47<<16|188<<4|0x01);		switch (core->boardnr) {		case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:		case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:		case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:		case CX88_BOARD_PCHDTV_HD5500:			cx_write(TS_SOP_STAT, 1<<13);			break;		case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:		case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:			cx_write(MO_PINMUX_IO, 0x88); /* Enable MPEG parallel IO and video signal pins */			udelay(100);			break;		case CX88_BOARD_HAUPPAUGE_HVR1300:			break;		case CX88_BOARD_PINNACLE_PCTV_HD_800i:			/* Enable MPEG parallel IO and video signal pins */			cx_write(MO_PINMUX_IO, 0x88);			cx_write(TS_HW_SOP_CNTRL, (0x47 << 16) | (188 << 4));			dev->ts_gen_cntrl = 5;			cx_write(TS_SOP_STAT, 0);			cx_write(TS_VALERR_CNTRL, 0);			udelay(100);			break;		default:			cx_write(TS_SOP_STAT, 0x00);			break;		}		cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl);		udelay(100);	} else if ( (core->active_type_id == CX88_MPEG_BLACKBIRD) &&		(core->board.mpeg & CX88_MPEG_BLACKBIRD) ) {		dprintk( 1, "cx8802_start_dma doing .blackbird\n");		cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */#if 0		cx_write(TS_F2_CMD_STAT_MM, 0x2900106); /* F2_CMD_STAT_MM defaults + master + memory space */#endif		cx_write(TS_GEN_CNTRL, 0x46); /* punctured clock TS & posedge driven & software reset */		udelay(100);		cx_write(TS_HW_SOP_CNTRL, 0x408); /* mpeg start byte */#if 0		cx_write(TS_HW_SOP_CNTRL, 0x2F0BC0); /* mpeg start byte ts: 0x2F0BC0 ? */#endif		cx_write(TS_VALERR_CNTRL, 0x2000);		cx_write(TS_GEN_CNTRL, 0x06); /* punctured clock TS & posedge driven */		udelay(100);	} else {		printk( "%s() Failed. Unsupported value in .mpeg (0x%08x)\n", __func__,			core->board.mpeg );		return -EINVAL;	}	/* reset counter */	cx_write(MO_TS_GPCNTRL, GP_COUNT_CONTROL_RESET);	q->count = 1;	/* enable irqs */	dprintk( 1, "setting the interrupt mask\n" );	cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_TSINT);	cx_set(MO_TS_INTMSK,  0x1f0011);#if 0	cx_write(MO_TS_INTMSK,  0x0f0011);#endif	/* start dma */	cx_set(MO_DEV_CNTRL2, (1<<5));	cx_set(MO_TS_DMACNTRL, 0x11);	return 0;}static int cx8802_stop_dma(struct cx8802_dev *dev){	struct cx88_core *core = dev->core;	dprintk( 1, "cx8802_stop_dma\n" );	/* stop dma */	cx_clear(MO_TS_DMACNTRL, 0x11);	/* disable irqs */	cx_clear(MO_PCI_INTMSK, PCI_INT_TSINT);	cx_clear(MO_TS_INTMSK, 0x1f0011);	/* Reset the controller */	cx_write(TS_GEN_CNTRL, 0xcd);	return 0;}static int cx8802_restart_queue(struct cx8802_dev    *dev,				struct cx88_dmaqueue *q){	struct cx88_buffer *buf;	dprintk( 1, "cx8802_restart_queue\n" );	if (list_empty(&q->active))	{		struct cx88_buffer *prev;		prev = NULL;		dprintk(1, "cx8802_restart_queue: queue is empty\n" );		for (;;) {			if (list_empty(&q->queued))				return 0;			buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);			if (NULL == prev) {				list_del(&buf->vb.queue);				list_add_tail(&buf->vb.queue,&q->active);				cx8802_start_dma(dev, q, buf);				buf->vb.state = VIDEOBUF_ACTIVE;				buf->count    = q->count++;				mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);				dprintk(1,"[%p/%d] restart_queue - first active\n",					buf,buf->vb.i);			} else if (prev->vb.width  == buf->vb.width  &&				   prev->vb.height == buf->vb.height &&				   prev->fmt       == buf->fmt) {				list_del(&buf->vb.queue);				list_add_tail(&buf->vb.queue,&q->active);				buf->vb.state = VIDEOBUF_ACTIVE;				buf->count    = q->count++;				prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);				dprintk(1,"[%p/%d] restart_queue - move to active\n",					buf,buf->vb.i);			} else {				return 0;			}			prev = buf;		}		return 0;	}	buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);	dprintk(2,"restart_queue [%p/%d]: restart dma\n",		buf, buf->vb.i);	cx8802_start_dma(dev, q, buf);	list_for_each_entry(buf, &q->active, vb.queue)		buf->count = q->count++;	mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);	return 0;}/* ------------------------------------------------------------------ */int cx8802_buf_prepare(struct videobuf_queue *q, struct cx8802_dev *dev,			struct cx88_buffer *buf, enum v4l2_field field){	int size = dev->ts_packet_size * dev->ts_packet_count;	struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);	int rc;	dprintk(1, "%s: %p\n", __func__, buf);	if (0 != buf->vb.baddr  &&  buf->vb.bsize < size)		return -EINVAL;	if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {		buf->vb.width  = dev->ts_packet_size;		buf->vb.height = dev->ts_packet_count;		buf->vb.size   = size;		buf->vb.field  = field /*V4L2_FIELD_TOP*/;		if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))			goto fail;		cx88_risc_databuffer(dev->pci, &buf->risc,				     dma->sglist,				     buf->vb.width, buf->vb.height, 0);	}	buf->vb.state = VIDEOBUF_PREPARED;	return 0; fail:	cx88_free_buffer(q,buf);	return rc;}void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf){	struct cx88_buffer    *prev;	struct cx88_dmaqueue  *cx88q = &dev->mpegq;	dprintk( 1, "cx8802_buf_queue\n" );	/* add jump to stopper */	buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);	buf->risc.jmp[1] = cpu_to_le32(cx88q->stopper.dma);	if (list_empty(&cx88q->active)) {		dprintk( 1, "queue is empty - first active\n" );		list_add_tail(&buf->vb.queue,&cx88q->active);		cx8802_start_dma(dev, cx88q, buf);		buf->vb.state = VIDEOBUF_ACTIVE;		buf->count    = cx88q->count++;		mod_timer(&cx88q->timeout, jiffies+BUFFER_TIMEOUT);		dprintk(1,"[%p/%d] %s - first active\n",			buf, buf->vb.i, __func__);#if 0		udelay(100);#endif	} else {		dprintk( 1, "queue is not empty - append to active\n" );		prev = list_entry(cx88q->active.prev, struct cx88_buffer, vb.queue);		list_add_tail(&buf->vb.queue,&cx88q->active);		buf->vb.state = VIDEOBUF_ACTIVE;		buf->count    = cx88q->count++;		prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);		dprintk( 1, "[%p/%d] %s - append to active\n",			buf, buf->vb.i, __func__);#if 0		udelay(100);#endif	}}/* ----------------------------------------------------------- */static void do_cancel_buffers(struct cx8802_dev *dev, char *reason, int restart){	struct cx88_dmaqueue *q = &dev->mpegq;	struct cx88_buffer *buf;	unsigned long flags;	spin_lock_irqsave(&dev->slock,flags);	while (!list_empty(&q->active)) {		buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);		list_del(&buf->vb.queue);		buf->vb.state = VIDEOBUF_ERROR;		wake_up(&buf->vb.done);		dprintk(1,"[%p/%d] %s - dma=0x%08lx\n",			buf, buf->vb.i, reason, (unsigned long)buf->risc.dma);	}	if (restart)	{		dprintk(1, "restarting queue\n" );		cx8802_restart_queue(dev,q);	}	spin_unlock_irqrestore(&dev->slock,flags);}void cx8802_cancel_buffers(struct cx8802_dev *dev){	struct cx88_dmaqueue *q = &dev->mpegq;	dprintk( 1, "cx8802_cancel_buffers" );	del_timer_sync(&q->timeout);	cx8802_stop_dma(dev);	do_cancel_buffers(dev,"cancel",0);}static void cx8802_timeout(unsigned long data){	struct cx8802_dev *dev = (struct cx8802_dev*)data;	dprintk(1, "%s\n",__func__);	if (debug)		cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]);	cx8802_stop_dma(dev);	do_cancel_buffers(dev,"timeout",1);}static char *cx88_mpeg_irqs[32] = {	"ts_risci1", NULL, NULL, NULL,	"ts_risci2", NULL, NULL, NULL,	"ts_oflow",  NULL, NULL, NULL,	"ts_sync",   NULL, NULL, NULL,	"opc_err", "par_err", "rip_err", "pci_abort",	"ts_err?",};static void cx8802_mpeg_irq(struct cx8802_dev *dev){	struct cx88_core *core = dev->core;	u32 status, mask, count;	dprintk( 1, "cx8802_mpeg_irq\n" );	status = cx_read(MO_TS_INTSTAT);	mask   = cx_read(MO_TS_INTMSK);	if (0 == (status & mask))		return;	cx_write(MO_TS_INTSTAT, status);	if (debug || (status & mask & ~0xff))		cx88_print_irqbits(core->name, "irq mpeg ",				   cx88_mpeg_irqs, ARRAY_SIZE(cx88_mpeg_irqs),				   status, mask);	/* risc op code error */	if (status & (1 << 16)) {		printk(KERN_WARNING "%s: mpeg risc op code error\n",core->name);		cx_clear(MO_TS_DMACNTRL, 0x11);		cx88_sram_channel_dump(dev->core, &cx88_sram_channels[SRAM_CH28]);	}	/* risc1 y */	if (status & 0x01) {		dprintk( 1, "wake up\n" );		spin_lock(&dev->slock);		count = cx_read(MO_TS_GPCNT);		cx88_wakeup(dev->core, &dev->mpegq, count);		spin_unlock(&dev->slock);	}	/* risc2 y */	if (status & 0x10) {		spin_lock(&dev->slock);		cx8802_restart_queue(dev,&dev->mpegq);		spin_unlock(&dev->slock);	}	/* other general errors */	if (status & 0x1f0100) {		dprintk( 0, "general errors: 0x%08x\n", status & 0x1f0100 );		spin_lock(&dev->slock);		cx8802_stop_dma(dev);		cx8802_restart_queue(dev,&dev->mpegq);		spin_unlock(&dev->slock);	}}#define MAX_IRQ_LOOP 10#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)static irqreturn_t cx8802_irq(int irq, void *dev_id, struct pt_regs *regs)#elsestatic irqreturn_t cx8802_irq(int irq, void *dev_id)#endif{	struct cx8802_dev *dev = dev_id;	struct cx88_core *core = dev->core;	u32 status;	int loop, handled = 0;	for (loop = 0; loop < MAX_IRQ_LOOP; loop++) {		status = cx_read(MO_PCI_INTSTAT) &			(core->pci_irqmask | PCI_INT_TSINT);		if (0 == status)			goto out;		dprintk( 1, "cx8802_irq\n" );		dprintk( 1, "    loop: %d/%d\n", loop, MAX_IRQ_LOOP );		dprintk( 1, "    status: %d\n", status );		handled = 1;		cx_write(MO_PCI_INTSTAT, status);		if (status & core->pci_irqmask)			cx88_core_irq(core,status);		if (status & PCI_INT_TSINT)			cx8802_mpeg_irq(dev);	};	if (MAX_IRQ_LOOP == loop) {		dprintk( 0, "clearing mask\n" );		printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",		       core->name);		cx_write(MO_PCI_INTMSK,0);	} out:	return IRQ_RETVAL(handled);}static int cx8802_init_common(struct cx8802_dev *dev){	struct cx88_core *core = dev->core;	int err;	/* pci init */	if (pci_enable_device(dev->pci))