/*  * p06.h  * The DSS1 development board special parameters  * Changer:	Tony.He<zhonghua.he@mail.tcentel.com>  2005-05-08 */#ifndef BLOB_ARCH_MAINSTONE_H#define BLOB_ARCH_MAINSTONE_H/* Use FFUART *///#define USE_SERIAL1	1#define USE_SERIAL2	1#define TERMINAL_SPEED	baud_115200/* the base address were BLOB is loaded by the first stage loader */#define BLOB_ABS_BASE_ADDR	(0xa0300400)/* where do various parts live in RAM */#define IPL_RAM_BASE                    (0xa0200000)#define BLOB_RAM_BASE			(0xa0200800)#define KERNEL_RAM_BASE		(0xa0008000)#define PARAM_RAM_BASE		(0xa0210000)#define ROOTFS_RAM_BASE		(0xa0500000)#define USER_RAM_BASE			ROOTFS_RAM_BASE#define USER_FLASH_BASE	(ROOTFS_FLASH_BASE + ROOTFS_FLASH_LEN)#define USER_FLASH_LEN		(0x1400000)#define IPL_DOC_LEN             (0x800)#define BLOB_DOC_BASE           (0x00000000)#define BLOB_DOC_LEN            (0x40000)#define KERNEL_DOC_LEN          (0x0170000)#define ROOTFS_DOC_LEN          (0x2800000)#define USER_DOC_LEN            (0x1200000)#define DOC_BLOCK               (0x10000)#define DOC_PAGE                 512#define BLOB_SIGNATURE           "BIPO"#define KERNEL_SIGNATURE         "KERN"#define IPL_HANDLE              0                  #define BLOB_IRHANDLE           0#define KERNEL_IRHANDLE         0x10#define ROOTFS_IRHANDLE         0#define USER_IRHANDLE           0x10/*for sub_partition*/#define BDK1_SIGNATURE         "INFO"#define BDK1_LENGTH             (0x0180000)#define BDK_NUMBER              2#define BDTL_NUMBER             2/* GPIO settings */#define  xlli_GPSR0_value (0x00008004)   @ Set registers#define   xlli_GPSR1_value (0x00021300)#define    xlli_GPSR2_value (0x1A010000)#define    xlli_GPSR3_value (0x00116100)#define    xlli_GPCR0_value (0x0)          @ Clear registers#define    xlli_GPCR1_value (0x00000080)   @ FFUART related#define    xlli_GPCR2_value (0x0)#define    xlli_GPCR3_value (0x0)#define    xlli_GRER0_value (0x0)          @ Rising Edge Detect#define    xlli_GRER1_value (0x0)#define    xlli_GRER2_value (0x0)#define    xlli_GRER3_value (0x0)#define    xlli_GFER0_value (0x0)          @ Falling Edge Detect#define    xlli_GFER1_value (0x0)#define    xlli_GFER2_value (0x0)#define    xlli_GFER3_value (0x0)#define    xlli_GPLR0_value (0x0)          @ Pin Level Registers#define    xlli_GPLR1_value (0x0)#define   xlli_GPLR2_value (0x0)#define    xlli_GPLR3_value (0x0)#define   xlli_GEDR0_value (0x0)          @ Edge Detect Status#define    xlli_GEDR1_value (0x0)#define    xlli_GEDR2_value (0x0)#define    xlli_GEDR3_value (0x0)#define    xlli_GPDR0_value (0xDBC927E4)   @ Direction Registers#define    xlli_GPDR1_value (0x00FD3B81)#define    xlli_GPDR2_value (0x1EC23C00)#define    xlli_GPDR3_value (0x001FFF8F)#define  xlli_GAFR0_L_value (0x00800000)   @ Alternate function registers#define   xlli_GAFR0_U_value (0xA51A855A)#define   xlli_GAFR1_L_value (0x009A9558)#define   xlli_GAFR1_U_value (0xAAA07951)#define   xlli_GAFR2_L_value (0x02AAAAAA)#define   xlli_GAFR2_U_value (0x000FAF08)#define xlli_GAFR3_L_value (0x33000000)#define  xlli_GAFR3_U_value (0x00001809)#define Turbo_mode/*save reset value address*/#define SAVE_ADDRESS    0xa3000000     /* Memory configuration */#define MDREFR_VALUE	0x00000018#define MDCNFG_VALUE	0x00000AC9#define MDMRS_VALUE	0x00000000/* * #define MSC0_VALUE	0x39F2A7A3 */#define MSC1_VALUE	0x0000A691#define MSC2_VALUE	0x0000B884/* USB client Soft-connect bit */#define MST_USBC_SC     (0x1<<4)#endif