?? nand.c
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if(rNFSTAT&0x20) return FAIL;
NF_CMD(0x70); // Read status command
if (NF_RDDATA()&0x1) // Erase error
{
NF_nFCE_H();
rGPGDAT|=(1<<1);
printf("[ERASE_ERROR:block#=%d]\n",block);
// NF8_MarkBadBlock(block);
return FAIL;
}
else
{
NF_nFCE_H();
return OK;
}
}
void __irq NFCon_Int(void)
{
NFConDone=1;
// printf("Interrupt is occurred!!!\n");
//rINTMSK|=BIT_NFCON;
ClearPending(BIT_NFCON);
if(rNFSTAT&0x20) printf("Illegal Access is detected!!!\n");
else if(rNFSTAT&0x10)
{
rNFSTAT|=0x10;
// printf("RnB is Detected!!!\n");
}
else if(rNFSTAT&0x80)
{
NFECCEncDone=1;
rNFSTAT|=0x80;
printf("ECC encoding is completed!!!\n");
}
else if(rNFSTAT&0x40)
{
NFECCDecDone=1;
rNFSTAT|=0x40;
printf("ECC decoding is completed!!!\n");
}
}
static int NF8_IsBadBlock(U32 block)
{
int i;
unsigned int blockPage;
U8 data;
blockPage=(block<<5); // For 2'nd cycle I/O[7:5]
NF_nFCE_L();
NF_CLEAR_RB();
NF_CMD(0x50); // Spare array read command
NF_ADDR((512+5)&0xf); // Read the mark of bad block in spare array(M addr=5), A4-A7:Don't care
NF_ADDR(blockPage&0xff); // The mark of bad block is in 0 page
NF_ADDR((blockPage>>8)&0xff); // For block number A[24:17]
NF_ADDR((blockPage>>16)&0xff); // For block number A[25]
NF_DETECT_RB(); // Wait tR(max 12us)
data=NF_RDDATA();
NF_nFCE_H();
if(data!=0xff)
{
printf("[block %d has been marked as a bad block(%x)]\n",block,data);
return FAIL;
}
else
{
return OK;
}
}
static int Adv_NF8_IsBadBlock(U32 block)
{
int i;
unsigned int blockPage;
U8 data;
blockPage=(block<<6); // For 2'nd cycle I/O[7:5]
NF_nFCE_L();
NF_CLEAR_RB();
NF_CMD(0x00); // read command
NF_ADDR((2048+0)&0xff); // 2060 = 0x080c
NF_ADDR(((2048+0)>>8)&0xff); // A[10:8]
NF_ADDR((blockPage)&0xff); // A[11;18]
NF_ADDR((blockPage>>8)&0xff); // A[26:19]
NF_ADDR((blockPage>>16)&0xff); // A27
NF_CMD(0x30); // 2'nd command
NF_DETECT_RB(); // Wait tR(max 12us)
data=NF_RDDATA();
NF_nFCE_H();
if(data!=0xff)
{
printf("[block %d has been marked as a bad block(%x)]\n",block,data);
return FAIL;
}
else
{
return OK;
}
}
static int NF8_MarkBadBlock(U32 block)
{
int i;
U32 blockPage=(block<<5);
se8Buf[0]=0xff;
se8Buf[1]=0xff;
se8Buf[2]=0xff;
se8Buf[5]=0x44; // Bad blcok mark=44
NF_nFCE_L();
NF_CMD(0x50); //????
NF_CMD(0x80); // Write 1st command
NF_ADDR(0x0); // The mark of bad block is
NF_ADDR(blockPage&0xff); // marked 5th spare array
NF_ADDR((blockPage>>8)&0xff); // in the 1st page.
NF_ADDR((blockPage>>16)&0xff); //
for(i=0;i<16;i++)
{
NF_WRDATA(se8Buf[i]); // Write spare array
}
NF_CLEAR_RB();
NF_CMD(0x10); // Write 2nd command
NF_DETECT_RB();
NF_CMD(0x70);
for(i=0;i<3;i++); //twhr=60ns////??????
if (NF_RDDATA()&0x1) // Spare arrray write error
{
NF_nFCE_H();
printf("[Program error is occurred but ignored]\n");
}
else
{
NF_nFCE_H();
}
printf("[block #%d is marked as a bad block]\n",block);
return OK;
}
static int NF8_ReadPage(U32 block,U32 page,U8 *buffer)
{
U32 i, blockPage;
U32 Mecc, Secc;
U8 *bufPt=buffer;
U8 se[16], ecc0, ecc1, ecc2, ecc3;
blockPage=(block<<5)+page;
NF_RSTECC(); // Initialize ECC
NF_MECC_UnLock();
NF_nFCE_L();
NF_CLEAR_RB();
NF_CMD(0x00); // Read command
NF_ADDR(0); // Column = 0
NF_ADDR(blockPage&0xff); //
NF_ADDR((blockPage>>8)&0xff); // Block & Page num.
NF_ADDR((blockPage>>16)&0xff); //
NF_DETECT_RB();
#if TRANS_MODE==C_LANG
for(i=0;i<512;i++) {
*bufPt++=NF_RDDATA8(); // Read one page
}
#elif TRANS_MODE==DMA
// Nand to memory dma setting
rSRCPND=BIT_DMA; // Init DMA src pending.
rSUBSRCPND=BIT_SUB_DMA0;
rDISRC0=NFDATA; // Nand flash data register
rDISRCC0=(0<<1) | (1<<0); //arc=AHB,src_addr=fix
rDIDST0=(unsigned)bufPt;
rDIDSTC0=(0<<1) | (0<<0); //dst=AHB,dst_addr=inc;
rDCON0=(1<<31)|(1<<30)|(1<<29)|(1<<28)|(1<<27)|(0<<23)|(1<<22)|(2<<20)|(512/4/4);
//Handshake,AHB,interrupt,(4-burst),whole,S/W,no_autoreload,word,count=128;
// DMA on and start.
rDMASKTRIG0=(1<<1)|(1<<0);
while(!(rSUBSRCPND & BIT_SUB_DMA0)); // Wait until Dma transfer is done.
rSUBSRCPND=BIT_SUB_DMA0;
rSRCPND=BIT_DMA;
#endif
NF_MECC_Lock();
NF_SECC_UnLock();
Mecc=NF_RDDATA();
rNFMECCD0=((Mecc&0xff00)<<8)|(Mecc&0xff);
rNFMECCD1=((Mecc&0xff000000)>>8)|((Mecc&0xff0000)>>16);
NF_SECC_Lock();
NF8_Spare_Data[0]=Mecc&0xff;
NF8_Spare_Data[1]=(Mecc&0xff00)>>8;
NF8_Spare_Data[2]=(Mecc&0xff0000)>>16;
NF8_Spare_Data[3]=(Mecc&0xff000000)>>24;
Mecc=NF_RDDATA(); // read 4~7
NF8_Spare_Data[4]=Mecc&0xff;
NF8_Spare_Data[5]=(Mecc&0xff00)>>8;
NF8_Spare_Data[6]=(Mecc&0xff0000)>>16;
NF8_Spare_Data[7]=(Mecc&0xff000000)>>24;
Secc=NF_RDDATA();
rNFSECCD=((Secc&0xff00)<<8)|(Secc&0xff);
NF8_Spare_Data[8]=Secc&0xff;
NF8_Spare_Data[9]=(Secc&0xff00)>>8;
NF8_Spare_Data[10]=(Secc&0xff0000)>>16;
NF8_Spare_Data[11]=(Secc&0xff000000)>>24;
Secc=NF_RDDATA();
NF8_Spare_Data[12]=Secc&0xff;
NF8_Spare_Data[13]=(Secc&0xff00)>>8;
NF8_Spare_Data[14]=(Secc&0xff0000)>>16;
NF8_Spare_Data[15]=(Secc&0xff000000)>>24;
NF_nFCE_H();
if ((rNFECCERR0&0xf) == 0x0){
// printf("ECC OK!\n");
return OK;
}
else {
printf("ECC FAIL!\n");
printf("NFECCERR0: 0x%x\n", rNFECCERR0);
return FAIL;
}
}
///////////////Advanced nand flash //////////////////////
static int Adv_NF8_ReadPage(U32 block,U32 page,U8 *buffer)
{
int i;
unsigned int blockPage;
U32 Mecc, Secc;
U8 *bufPt=buffer;
U8 se[16], ecc0, ecc1, ecc2, ecc3,a,b,c,d,e;
blockPage=(block<<6)+page;
NF_RSTECC(); // Initialize ECC
NF_MECC_UnLock();
NF_nFCE_L();
NF_CLEAR_RB();
NF_CMD(0x00); // Read command
NF_ADDR(0); // Column (A[7:0]) = 0
NF_ADDR(0); // A[11:8]
NF_ADDR((blockPage)&0xff); // A[19:12]
NF_ADDR((blockPage>>8)&0xff); // A[27:20]
NF_ADDR((blockPage>>16)&0xff); // A[27:20]
NF_CMD(0x30); // 2'nd command
NF_DETECT_RB();
#if TRANS_MODE==C_LANG
for(i=0;i<2048;i++) {
*bufPt++=NF_RDDATA8(); // Read one page
}
#elif TRANS_MODE==DMA
// Nand to memory dma setting
rSRCPND=BIT_DMA; // Init DMA src pending.
rSUBSRCPND=BIT_SUB_DMA0;
rDISRC0=NFDATA; // Nand flash data register
rDISRCC0=(0<<1) | (1<<0); //arc=AHB,src_addr=fix
rDIDST0=(unsigned)bufPt;
rDIDSTC0=(0<<1) | (0<<0); //dst=AHB,dst_addr=inc;
rDCON0=(1<<31)|(1<<30)|(1<<29)|(1<<28)|(1<<27)|(0<<23)|(1<<22)|(2<<20)|(2048/4/4);
//Handshake,AHB,interrupt,(4-burst),whole,S/W,no_autoreload,word,count=128;
// DMA on and start.
rDMASKTRIG0=(1<<1)|(1<<0);
while(!(rSUBSRCPND & BIT_SUB_DMA0)); // Wait until Dma transfer is done.
rSUBSRCPND=BIT_SUB_DMA0;
rSRCPND=BIT_DMA;
#endif
// NF_MECC_Lock();
// rNFMECCD0=NF_RDDATA();
// NF_nFCE_H();
// if ((rNFESTAT0&0x3) == 0x0) return OK;
// else return FAIL;
NF_MECC_Lock();
NF_SECC_UnLock();
Adv_NF8_Spare_Data[0]=NF_RDDATA8();
Mecc=NF_RDDATA();
rNFMECCD0=((Mecc&0xff00)<<8)|(Mecc&0xff);
rNFMECCD1=((Mecc&0xff000000)>>8)|((Mecc&0xff0000)>>16);
Adv_NF8_Spare_Data[1]=Mecc&0xff;
Adv_NF8_Spare_Data[2]=(Mecc&0xff00)>>8;
Adv_NF8_Spare_Data[3]=(Mecc&0xff0000)>>16;
Adv_NF8_Spare_Data[4]=(Mecc&0xff000000)>>24;
Adv_NF8_Spare_Data[5]=NF_RDDATA8(); // read 5
Adv_NF8_Spare_Data[6]=NF_RDDATA8(); // read 6
Adv_NF8_Spare_Data[7]=NF_RDDATA8(); // read 7
NF_SECC_Lock();
Secc=NF_RDDATA();
rNFSECCD=((Secc&0xff00)<<8)|(Secc&0xff);
Adv_NF8_Spare_Data[8]=Secc&0xff;
Adv_NF8_Spare_Data[9]=(Secc&0xff00)>>8;
Adv_NF8_Spare_Data[10]=(Secc&0xff0000)>>16;
Adv_NF8_Spare_Data[11]=(Secc&0xff000000)>>24;
for(i=12;i<64;i++) {
Adv_NF8_Spare_Data[i]=NF_RDDATA8(); // Read spare array with 4byte width
}
NF_nFCE_H();
if ((rNFECCERR0&0xf) == 0x0){
printf("ECC OK!\n");
return OK;
}
else {
printf("ECC FAIL!\n");
return FAIL;
}
}
static int NF8_WritePage(U32 block,U32 page,U8 *buffer)
{
int i;
U32 blockPage, Mecc, Secc;
U8 *bufPt=buffer;
NFConDone=0;
rNFCONT|=(1<<9);
rNFCONT|=(1<<10);
pISR_NFCON= (unsigned)NFCon_Int;
rSRCPND=BIT_NFCON;
rINTMSK=~(BIT_NFCON);
NF_RSTECC(); // Initialize ECC
NF_MECC_UnLock();
blockPage=(block<<5)+page;
NF_nFCE_L();
// NF_CMD(0x0);//??????
NF_CMD(0x80); // Write 1st command
NF_ADDR(0); // Column 0
NF_ADDR(blockPage&0xff); //
NF_ADDR((blockPage>>8)&0xff); // Block & page num.
NF_ADDR((blockPage>>16)&0xff); //
#if TRANS_MODE==C_LANG
for(i=0;i<512;i++) {
{NF_WRDATA8(*bufPt++);} // Write one page to NFM from buffer
}
#elif TRANS_MODE==DMA
// Memory to Nand dma setting
rSUBSRCPND=BIT_SUB_DMA0;
rSRCPND=BIT_DMA; // Init DMA src pending.
rDISRC0=(unsigned)bufPt; // Nand flash data register
rDISRCC0=(0<<1) | (0<<0); //arc=AHB,src_addr=inc
rDIDST0=NFDATA;
rDIDSTC0=(0<<1) | (1<<0); //dst=AHB,dst_addr=fix;
rDCON0=(1<<31)|(1<<30)|(1<<29)|(0<<28)|(1<<27)|(0<<23)|(1<<22)|(2<<20)|(512/4);
// only unit transfer in writing!!!!
//Handshake,AHB,interrupt,(unit),whole,S/W,no_autoreload,word,count=128;
// DMA on and start.
rDMASKTRIG0=(1<<1)|(1<<0);
while(!(rSUBSRCPND & BIT_SUB_DMA0)); // Wait until Dma transfer is done.
rSUBSRCPND=BIT_SUB_DMA0;
rSRCPND=BIT_DMA;
#endif
/*
NF_MECC_Lock();
// Get ECC data.
// Spare data for 8bit
// byte 0 1 2 3 4 5
// ecc [0] [1] [2] [3] x [Bad marking]
Mecc = rNFMECC0;
se8Buf[0]=(U8)(Mecc&0xff);
se8Buf[1]=(U8)((Mecc>>8) & 0xff);
se8Buf[2]=(U8)((Mecc>>16) & 0xff);
se8Buf[3]=(U8)((Mecc>>24) & 0xff);
se8Buf[5]=0xffff; // Marking good block
//Write extra data(ECC, bad marking)
for(i=0;i<16;i++) {
NF_WRDATA8(se8Buf[i]); // Write spare array(ECC and Mark)
NF8_Spare_Data[i]=se8Buf[i];
}
NF_CLEAR_RB();
NF_CMD(0x10); // Write 2nd command
NF_DETECT_RB();
NF_CMD(0x70); // Read status command
for(i=0;i<3;i++); //twhr=60ns
if (NF_RDDATA()&0x1) {// Page write error
printf("[PROGRAM_ERROR:block#=%d]\n",block);
NF8_MarkBadBlock(block);
NF_nFCE_H();
return FAIL;
} else {
NF_nFCE_H();
return OK;
}
*/
NF_MECC_Lock();
// Get ECC data.
// Spare data for 8bit
// byte 0 1 2 3 4 5 6 7 8 9
// ecc [0] [1] [2] [3] x [Bad marking] SECC0 SECC1
Mecc = rNFMECC0;
se8Buf[0]=(U8)(Mecc&0xff);
se8Buf[1]=(U8)((Mecc>>8) & 0xff);
se8Buf[2]=(U8)((Mecc>>16) & 0xff);
se8Buf[3]=(U8)((Mecc>>24) & 0xff);
se8Buf[5]=0xff; // Marking good block
NF_SECC_UnLock();
//Write extra data(ECC, bad marking)
for(i=0;i<4;i++) {
NF_WRDATA8(se8Buf[i]); // Write spare array(Main ECC)
NF8_Spare_Data[i]=se8Buf[i];
}
NF_SECC_Lock();
Secc=rNFSECC;
se8Buf[8]=(U8)(Secc&0xff);
se8Buf[9]=(U8)((Secc>>8) & 0xff);
for(i=4;i<16;i++) {
NF_WRDATA8(se8Buf[i]); // Write spare array(Spare ECC and Mark)
NF8_Spare_Data[i]=se8Buf[i];
}
NF_CLEAR_RB();
NF_CMD(0x10); // Write 2nd command
// NF_DETECT_RB();
while(NFConDone==0);
rNFCONT&=~(1<<9);
rNFCONT&=~(1<<10); // Disable Illegal Access Interrupt
if(rNFSTAT&0x20) return FAIL;
NF_CMD(0x70); // Read status command
for(i=0;i<3;i++); //twhr=60ns
if (NF_RDDATA()&0x1) {// Page write error
NF_nFCE_H();
printf("[PROGRAM_ERROR:block#=%d]\n",block);
// NF8_MarkBadBlock(block);
return FAIL;
}
else {
NF_nFCE_H();
return OK;
}
}
//////////////// Advanced nand flash ////////////////////////////////
static int Adv_NF8_WritePage(U32 block,U32 page,U8 *buffer)
{
int i;
U32 blockPage, Mecc, Secc;
U8 *bufPt=buffer;
NFConDone=0;
rNFCONT|=(1<<9);
rNFCONT|=(1<<10);
pISR_NFCON= (unsigned)NFCon_Int;
rSRCPND=BIT_NFCON;
rINTMSK=~(BIT_NFCON);
NF_RSTECC(); // Initialize ECC
NF_MECC_UnLock();
blockPage=(block<<6)+page;
NF_nFCE_L();
NF_CMD(0x80); // Write 1st command
NF_ADDR(0); // Column (A[7:0]) = 0
NF_ADDR(0); // A[11:8]
NF_ADDR((blockPage)&0xff); // A[19:12]
NF_ADDR((blockPage>>8)&0xff); // A[27:20]
NF_ADDR((blockPage>>16)&0xff); // A[27:20]
#if TRANS_MODE==C_LANG
for(i=0;i<2048;i++) {
NF_WRDATA8(*bufPt++); // Write one page to NFM from buffer
}
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