/* fei82557End.h - Intel 82557 network interface header *//* Copyright 1990-2005 Wind River Systems, Inc. *//*modification history--------------------01r,16feb05,pmr  macrotized the 32-byte alignment used by device.01q,26jan05,pmr  SPR 102537: make CFD_SIZE a multiple of cache line size.01p,17may04,mdo  Add include file to fix compilation error when included in                 the wrSbc405gp BSP01o,26mar04,dlk  Fix incorrect usage of 'volatile' keyword.01n,28jan04,wap  Add checksum offload support01m,24feb03,rcs  added added definition of RFD_DESC_SIZE SPR#8635201l,23jan03,rcs  Added RBD_TAG struct 01k,20sep01,dat  Removing ANSI errors for diab compiler01j,28sep00,jgn  remove physical to virtual translations (SPR 34891)01i,13sep00,jkf  T3 SPR#33822 (aka T2 SPR's 33792, 33795, and 33796)01i,11jun00,ham  removed reference to etherLib.01h,06nov99,dat  Merge from tor3_x.bsp_drv_facility branch01g,12nov99,mas  added typecasting to non-PPC FEI_XXXX_RD macros (SPR 24474)01f,21mar99,jkf  Added PPC access routines needed for Yellowknife.01e,21jul98,cn   Moved here some redefineable macros01d,01apr98,cn   added vendor and device id definitions01c,11mar98,cn   checked-in01b,05mar98,cn   code clean-up after code review01a,07nov97,cn	 created from ../netif/if_fei.h, version 01c*/#ifndef __INCfei82557Endh#define __INCfei82557Endh/* includes */#include "netBufLib.h"#ifdef __cplusplusextern "C" {#endif#if ((CPU_FAMILY==I960) && (defined __GNUC__))#pragma align 1                 /* tell gcc960 not to optimize alignments */#endif	/* CPU_FAMILY==I960 *//* defines *//* * redefine the macro below in the bsp if you need to access the device * registers/descriptors in a more suitable way. */#if (CPU_FAMILY == PPC)#ifndef FEI_LONG_WR#define FEI_LONG_WR(addr, value) (sysOutLong ((ULONG) addr, (ULONG) value))#endif #ifndef FEI_WORD_WR#define FEI_WORD_WR(addr, value) (sysOutWord ((ULONG) addr, (USHORT) value))#endif #ifndef FEI_BYTE_WR#define FEI_BYTE_WR(addr, value) (sysOutByte ((ULONG) addr, (UCHAR) value))#endif #ifndef FEI_LONG_RD#define FEI_LONG_RD(addr, value) (value = sysInLong ((ULONG) addr))#endif #ifndef FEI_WORD_RD#define FEI_WORD_RD(addr, value) (value = sysInWord ((ULONG) addr))#endif #ifndef FEI_BYTE_RD#define FEI_BYTE_RD(addr, value) (value = sysInByte ((ULONG) addr))#endif #endif /* CPU_FAMILY == PPC */#ifndef FEI_LONG_WR#define FEI_LONG_WR(addr, value)                                        \    (* (volatile UINT32 *) (addr) = ((UINT32) FEI_SWAP_LONG (value) ))#endif /* FEI_LONG_WR */ #ifndef FEI_WORD_WR#define FEI_WORD_WR(addr, value)                                        \    (* (volatile UINT16 *) (addr) = ((UINT16) FEI_SWAP_WORD (value) ))#endif /* FEI_WORD_WR */ #ifndef FEI_BYTE_WR#define FEI_BYTE_WR(addr, value)                                        \    (* (volatile UINT8 *) (addr) = (UINT8) (value) )#endif /* FEI_BYTE_WR */ #ifndef FEI_LONG_RD#define FEI_LONG_RD(addr, value)                                        \    do  {								\	UINT32 _temp_ = *(volatile UINT32 *)(addr);			\	(value) = (UINT32) FEI_SWAP_LONG (_temp_);			\	} while (0)#endif /* FEI_LONG_RD */ #ifndef FEI_WORD_RD#define FEI_WORD_RD(addr, value)                                        \    do  {								\	UINT16 _temp_ = *(volatile UINT16 *)(addr);			\	(value) = (UINT16) FEI_SWAP_WORD (_temp_);			\	} while (0)#endif /* FEI_WORD_RD */ #ifndef FEI_BYTE_RD#define FEI_BYTE_RD(addr, value)                                        \    do  {								\	(value) = (UINT8) (*(volatile UINT8 *)(addr));			\	} while (0)#endif /* FEI_BYTE_RD */ /* * Default macro definitions for BSP interface. * These macros can be redefined in a wrapper file, to generate * a new module with an optimized interface. */ #ifndef SYS_INT_CONNECT#define SYS_INT_CONNECT(pDrvCtrl, pFunc, arg, pRet)                         \    {                                                                       \    /* SPR 33796/33822 - init SYS_INT_CONNECT's return value" to ERROR */   \    *pRet = ERROR;                                                          \                                                                            \    /* SPR 33792 - remove FEI_VECTOR checking from SYS_INT_CONNECT */       \    /* SPR 33795 - add feiEndIntConnect NULL checking in SYS_INT_CONNECT */ \    if (feiEndIntConnect != NULL)                                      \        {                                                                   \        *pRet = (feiEndIntConnect) ((VOIDFUNCPTR*)                     \                             INUM_TO_IVEC (FEI_VECTOR (pDrvCtrl)),          \                             (pFunc), (int) (arg));                         \        }                                                                   \    }#endif /* SYS_INT_CONNECT */ #ifndef SYS_INT_DISCONNECT#define SYS_INT_DISCONNECT(pDrvCtrl, pFunc, arg, pRet)                      \    {                                                                       \    /* SPR 33796 - initialize SYS_INT_DISCONNECT's return value to ERROR */ \    *pRet = ERROR;                                                          \                                                                            \    /* SPR 33792 - remove FEI_VECTOR checking from SYS_INT_DISCONNECT */    \    if (feiEndIntDisconnect != NULL)                                   \        {                                                                   \        *pRet = feiEndIntDisconnect ((VOIDFUNCPTR*)                    \                              INUM_TO_IVEC (FEI_VECTOR (pDrvCtrl)),         \                              (pFunc));                                     \        }                                                                   \    }#endif /* SYS_INT_DISCONNECT */ #ifndef SYS_INT_ENABLE#define SYS_INT_ENABLE(pDrvCtrl)                                            \if (FEI_INT_ENABLE (pDrvCtrl))                                              \    ((*(FUNCPTR) (FEI_INT_ENABLE (pDrvCtrl))) (pDrvCtrl->unit))#endif /*SYS_INT_ENABLE*/ #ifndef SYS_INT_DISABLE#define SYS_INT_DISABLE(pDrvCtrl)                                           \if (FEI_INT_DISABLE (pDrvCtrl))                                             \    ((*(FUNCPTR) (FEI_INT_DISABLE (pDrvCtrl))) (pDrvCtrl->unit))#endif /*SYS_INT_DISABLE*/ #ifndef SYS_INT_ACK#define SYS_INT_ACK(pDrvCtrl)                                               \if (FEI_INT_ACK (pDrvCtrl))                                                 \    ((*(FUNCPTR) (FEI_INT_ACK (pDrvCtrl))) (pDrvCtrl->unit))#endif /*SYS_INT_ACK*/ #ifndef LOCAL_TO_SYS_ADDR#define LOCAL_TO_SYS_ADDR(unit,localAddr)                                   \    ((int) pDrvCtrl->board.sysLocalToBus ?                                  \    (*pDrvCtrl->board.sysLocalToBus) (unit, localAddr) : localAddr)#endif /* LOCAL_TO_SYS_ADDR */ #ifndef SYS_TO_LOCAL_ADDR#define SYS_TO_LOCAL_ADDR(unit,sysAddr)                                     \    ((int) pDrvCtrl->board.sysBusToLocal ?                                  \    (*pDrvCtrl->board.sysBusToLocal)(unit, sysAddr) : sysAddr)#endif /* SYS_TO_LOCAL_ADDR */ /* Intel PRO-100B PCI specific definitions */ #define PRO100B_PCI_VENDOR_ID   0x8086  /* PCI vendor ID */#define PRO100B_PCI_DEVICE_ID   0x1229  /* PCI device ID */#define FEI82557_DEVICE_ID      0x1229  /* 82557 device ID */ #define FEI82550_DEVICE_ID	0x9999	/* 82550 pseudo device ID */ #define MC_FEI MC_EI  /* temp */#define DEV_NAME        "fme"#define DEV_NAME_LEN    4#define DEF_NUM_CFDS    64                      /* default number of CFDs */#define DEF_NUM_RFDS    128                      /* default number of RFDs */#define FEI_100MBS      100000000               /* bits per sec */#define FEI_10MBS       10000000                /* bits per sec */#define EADDR_LEN       6                       /* ethernet address length */#define FEI_ADDR_LEN    EADDR_LEN               /* ethernet address length */ #define FEI_ACTION_TMO          0x01    /* action command timeout in seconds */#define FEI_SCB_TMO             0x01    /* SCB command timeout in seconds */#define FEI_INIT_TMO            0x01    /* 557 init timeout in seconds */#define FEI_TX_RESTART_TMO      0x01    /* tx restart watchdog timeout */#define FEI_TCB_TX_THRESH       0x10    /* Tx threshold value *//* Cluster Size */ #define CLUSTER_SIZE	        1536	 /* RFD and CFD size */#define DESC_ALIGN		32#define RFD_SIZE_HDR            16        /* The RFD wants to be 32 byte aligned  so is rounded up to 32 */ #define RFD_SIZE_HDR            16#define RFD_SIZE_EXTHDR         16#define RFD_SIZE_PKT            (EH_SIZE + ETHERMTU + 2)#define RFD_SIZE_TRAIL          RFD_SIZE_PREV + RFD_SIZE_SW_NEXT#define RFD_SIZE_PREV           4#define RFD_SIZE_SW_NEXT        4#define RFD_SIZE                ROUND_UP ((RFD_SIZE_HDR +               \                                           RFD_SIZE_EXTHDR +            \                                           RFD_SIZE_PKT +               \                                           RFD_SIZE_TRAIL), 4)#define RFD_DESC_SIZE           DESC_ALIGN #define RFD_STATUS_NONE		0x00#define RFD_STATUS_START	0x01#define RFD_STATUS_EL		0x02#define FIRST_RFD		0x00#define LAST_RFD		0xff#define MID_RFD			0x12         /* The actual RBD size is 16 bytes but wants to be 32 byte aligned */ #define RBD_SIZE		DESC_ALIGN #define RBD_STATUS_FREE		0x00#define RBD_STATUS_DMA		0x01#define RBD_STATUS_MISSED	0x03#define RBD_STATUS_EL_SEEN	0x55#define RBD_STATUS_BAD		0xff#define RBD_FORCE_REQUEUE       0xff#define RBD_TAG_FREE		0x00#define RBD_TAG_DMA		0x01#define RBD_TAG_RING		0x02#define RBD_TAG_BAD		0xff#define CFD_SIZE_HDR            8#define CFD_SIZE_DUMP           4#define CFD_SIZE_MULTIC         (2 + (6 * N_MCAST))#define CFD_SIZE_IA             8#define CFD_SIZE_NOP            0#define CFD_SIZE_PKT            (EH_SIZE + ETHERMTU + 2)#define CFD_SIZE_TCB            (8 + CFD_SIZE_PKT)#define CFD_SIZE_PREV           4#define CFD_SIZE_SW_NEXT	4#define CFD_SIZE_ACTION         1#define CFD_SIZE_TRAIL          (CFD_SIZE_PREV +			\				 CFD_SIZE_SW_NEXT +			\				 CFD_SIZE_ACTION)#define CFD_SIZE_CORE           CFD_SIZE_TCB         /* The CFD wants to be 32 byte aligned  so is rounded up to 32 */ #define CFD_SIZE                ROUND_UP ((CFD_SIZE_HDR +               \                                           CFD_SIZE_CORE +              \                                           CFD_SIZE_TRAIL), DESC_ALIGN) /* frame descriptors definitions */ #define CFD_STAT_OFFSET         0x00                    /* status word */#define CFD_COMM_OFFSET         0x02                    /* command word */#define CFD_NEXT_OFFSET         0x04                    /* next frame */#define CFD_PREV_OFFSET         (CFD_SIZE - 4)          /* previous frame */#define CFD_TBD_ADDR_OFFSET     0x08                    /* buffer descriptor*/#define CFD_COUNT_OFFSET        0x0c                    /* count field */#define CFD_NUM_OFFSET          0x0f                    /* buffer num  field */#define CFD_THRESH_OFFSET       0x0e                    /* threshold field *//* * Extended CFD offsets (present in 82550 and 82551 only). These * are used when we issue an IPCB transmit command, which gives us * extra fields that allow the use of TX checksum offload. */#define CFD_SCHEDLO_OFFSET      0x10                    /* 16 bits */#define CFD_IPSCHED_OFFSET      0x12                    /* 8 bits */#define CFD_IPACTIVATEHI_OFFSET 0x13                    /* 8 bits */#define CFD_VLAN_OFFSET         0x14                    /* 16 bits */#define CFD_IPHDROFF_OFFSET     0x16                    /* 8 bits */#define CFD_TCPUDPHDROFF_OFFSET 0x17                    /* 8 bits */#define CFD_TBDZEROPTR_OFFSET   0x18                    /* 32 bits */#define CFD_TBDZEROSIZE_OFFSET  0x1C                    /* 16 bits */#define CFD_TOTALTCPLEN_OFFSET  0x1E                    /* 16 bits */#define CFD_ACTION_OFFSET       (CFD_SIZE - 9)          /* action/transmit */#define CFD_SW_NEXT_OFFSET	(CFD_SIZE - 8)		/* s/w next link */#define CFD_PKT_OFFSET          (CFD_SIZE_HDR + 8)      /* packet data */#define CFD_IA_OFFSET           CFD_SIZE_HDR            /* individual address */#define CFD_MCOUNT_OFFSET       CFD_SIZE_HDR            /* mcount field */#define CFD_MC_OFFSET           (CFD_SIZE_HDR + 2)      /* mcast list */ #define RFD_STAT_OFFSET         0x00                    /* status word */#define RFD_COMM_OFFSET         0x02                    /* command word */#define RFD_NEXT_OFFSET         0x04                    /* next frame field */#define RFD_PREV_OFFSET         (RFD_SIZE - 4)          /* previous frame */#define RFD_SW_NEXT_OFFSET      (RFD_SIZE - 8)          /* s/w next frame */#define RFD_RBD_OFFSET          0x08                    /* buffer descriptor */#define RFD_COUNT_OFFSET        0x0c                    /* count field */#define RFD_SIZE_OFFSET         0x0e                    /* data size *//* Extended RFD offsets (present in 82550 and 82551 only) */#define RFD_VLANID_OFFSET       0x10                    /* VLAN ID (16 bits) */#define RFD_RXPARSESTS_OFFSET   0x12                    /* 8 bits */#define RFD_RSVD0_OFFSET        0x13                    /* 8 bits */#define RFD_SECURITYSTS_OFFSET  0x14                    /* 16 bits */#define RFD_CSUMSTS_OFFSET      0x16                    /* 8 bits */#define RFD_ZEROCOPYSTS_OFFSET  0x17                    /* 8 bits */#define RFD_PAD_OFFSET          0x18                    /* 64 bits */#define RFD_PKT_OFFSET          (RFD_SIZE_HDR)          /* packet data*/#define RBD_STAT_OFFSET         0x00                    /* Count &  F flag */ #define RBD_EOF_OFFSET		0x02			/* End of Frame */#define RBD_NEXT_OFFSET         0x04			/* Next RBD in list */#define RBD_BUFFER_OFFSET	0x08			/* cluster pointer */#define RBD_CFG_OFFSET          0x0c			/* EL & size fields */	#define RBD_C_EL		0x8000#define RBD_EL_MASK             0x8000	#define RBD_SIZE_MASK		0x7fff#define RBD_COUNT_MASK          0x3fff#define TBD_NOT_USED            0xffffffff            /* use semplified mode */#define RBD_NULL_ADDR           0xffffffff            /* use flexible mode *//* TX-specific constants *//* Number of TX frags allowed per transmission. */#define TBD_MAX_FRAGS           32/* * We place the transmit buffer array immediately after * the CFD structure, when doing scatter/gather TX DMA. */#define CFD_TBD_OFFSET          0x10#define CFD_TBD_OFFSET_TxCB     0x20#define CFD_TBD_OFFSET_IPCB     0x20#define CFD_FRAG1_OFFSET        CFD_TBD_OFFSET#define CFD_FRAG1_OFFSET_TxCB   CFD_TBD_OFFSET#define CFD_FRAG1_OFFSET_IPCB   0x18/* A fragment address/length pair is 8 bytes long (two 32-bit words). */#define TBD_SIZE                8/* * A fragment addrees/length pair contains a 32-bit physical address * pointer, followed by a 32-bit length field. */