typedef struct
{
    uint8 cycle_counter_value;              // Defines the filter value for the MTS cycle count filter
    uint8 cycle_counter_mask;               // Defines the filter mask for the MTS cycle count filter
} Fr_MTS_config_type;

/* Structure of this type contains configuration
   information of the one low level parameters set */
typedef struct
{
    uint8   G_COLD_START_ATTEMPTS;
    uint8   GD_ACTION_POINT_OFFSET;
    uint8   GD_CAS_RX_LOW_MAX;
    uint8   GD_DYNAMIC_SLOT_IDLE_PHASE;
    uint8   GD_MINISLOT;
    uint8   GD_MINI_SLOT_ACTION_POINT_OFFSET;
    uint16  GD_STATIC_SLOT;
    uint8   GD_SYMBOL_WINDOW;
    uint8   GD_TSS_TRANSMITTER;
    uint8   GD_WAKEUP_SYMBOL_RX_IDLE;
    uint8   GD_WAKEUP_SYMBOL_RX_LOW;
    uint16  GD_WAKEUP_SYMBOL_RX_WINDOW;
    uint8   GD_WAKEUP_SYMBOL_TX_IDLE;
    uint8   GD_WAKEUP_SYMBOL_TX_LOW;
    uint8   G_LISTEN_NOISE;
    uint16  G_MACRO_PER_CYCLE;
    uint8   G_MAX_WITHOUT_CLOCK_CORRECTION_PASSIVE;
    uint8   G_MAX_WITHOUT_CLOCK_CORRECTION_FATAL;
    uint16  G_NUMBER_OF_MINISLOTS;
    uint16  G_NUMBER_OF_STATIC_SLOTS;
    uint16  G_OFFSET_CORRECTION_START;
    uint8   G_PAYLOAD_LENGTH_STATIC;
    uint8   G_SYNC_NODE_MAX;
    uint8   G_NETWORK_MANAGEMENT_VECTOR_LENGTH;
    boolean P_ALLOW_HALT_DUE_TO_CLOCK;
    uint8   P_ALLOW_PASSIVE_TO_ACTIVE;
    Fr_channel_type  P_CHANNELS;
    uint16  PD_ACCEPTED_STARTUP_RANGE;
    uint8   P_CLUSTER_DRIFT_DAMPING;
    uint8   P_DECODING_CORRECTION;
    uint8   P_DELAY_COMPENSATION_CHA;
    uint8   P_DELAY_COMPENSATION_CHB;
    uint32  PD_LISTEN_TIMEOUT;
    uint16  PD_MAX_DRIFT;
    uint8   P_EXTERN_OFFSET_CORRECTION;
    uint8   P_EXTERN_RATE_CORRECTION;
    uint16  P_KEY_SLOT_ID;
    boolean P_KEY_SLOT_USED_FOR_STARTUP;
    boolean P_KEY_SLOT_USED_FOR_SYNC;
    uint16  P_KEY_SLOT_HEADER_CRC;
    uint16  P_LATEST_TX;
    uint8   P_MACRO_INITIAL_OFFSET_A;
    uint8   P_MACRO_INITIAL_OFFSET_B;
    uint8   P_MICRO_INITIAL_OFFSET_A;
    uint8   P_MICRO_INITIAL_OFFSET_B;
    uint32  P_MICRO_PER_CYCLE;
    uint16  P_OFFSET_CORRECTION_OUT;
    uint16  P_RATE_CORRECTION_OUT;
    boolean P_SINGLE_SLOT_ENABLED;
    Fr_channel_type  P_WAKEUP_CHANNEL;
    uint8   P_WAKEUP_PATTERN;
    uint8   P_MICRO_PER_MACRO_NOM;
    uint8   P_PAYLOAD_LENGTH_DYN_MAX;
} Fr_low_level_config_type;

/* Type definition for the connected_HW field
   of the Fr_HW_config_type structure. 
   The values determine the type of used microcontroller */
typedef enum
{
    FR_MFR4300 = 0,
    FR_MC9S12XFR128,
    FR_MPC5567,          // MPC5567 FlexRay module Revision 0
    FR_MFR4310,
    FR_MPC5561,
    FR_MPC5516,
    FR_MC9S12XF,
    FR_MPC5567_REVA,     // MPC5567 FlexRay module Revision A
    FR_MPC5514
} Fr_connected_HW_type;

/* Type definition for the clock_source field
   of the Fr_HW_config_type structure. 
   The values determine the type of used oscillator */
typedef enum
{
    FR_EXTERNAL_OSCILLATOR = 0,     // Crystal oscillator is used
    FR_INTERNAL_SYSTEM_BUS_CLOCK    // Not used for the MFR4300 and MFR4310
} Fr_clock_source_type;

/* Type definition for the clock_source field
   of the Fr_HW_config_type structure. 
   The values determine the type of used oscillator */
typedef enum
{
    FR_DUAL_CHANNEL_MODE = 0,       // Dual channel mode
    FR_SINGLE_CHANNEL_MODE          // Single channel mode
} Fr_single_channel_mode_type;

/* Hardware configuration structure determines used hardware, 
   allocated memory addresses and configuration message buffer segments */
typedef struct
{
    uint32 CC_base_address;
    uint32 CC_FlexRay_memory_base_address;
    Fr_connected_HW_type connected_HW;            // Which type of Freescale FlexRay module is used
    boolean synchronization_filtering_enable;     // Synchronization frame filter enable
    Fr_clock_source_type clock_source;            // Protocol engine clock source select
    uint8 prescaler_value;                        // The value of the PRESCALE or BITRATE bit field in the MCR register
    uint8 MB_segment_1_data_size;                 // Data size - segment 1
    uint8 MB_segment_2_data_size;                 // Data size - segment 2
    uint8 last_MB_seg_1;                          // Last MB in segment 1, MBIDXEn with n = [0..last_MB_seg1]
    uint8 last_MB_util;                           // Last individual MB (Receive, Transmit, Receive Shadow) utilized
    // Total number of used MB including FIFO; in range [1..1024]
    // E.g. last_MB_util = 20 and FIFO A starts as the 21st MB and it's depth is 10; then
    // Number of individual MB = 1 + 20 = 21; Number of FIFO MBs = 10 and
    // total_MB_number = 31
    uint16 total_MB_number;
    boolean allow_cold_start_enable;
    // The value of the TIMEOUT bit field in the SYMATOR register - not implemented for MFR4300, MPC5567, MC9S12XFR128 and MFR4310
    uint8 timeout;                                // Stored only if the value is not equal to 0
    // Offset of the Sync Frame Table in the FlexRay memory
    uint16 sync_frame_table_offset;               // Stored only if the value is not equal to 0
    // TRUE - single channel mode, FALSE - dual channel mode
    Fr_single_channel_mode_type single_channel_mode;
} Fr_HW_config_type;

/* Structure of this type contains MB configuration parameters which are stored by driver for internal use */
typedef struct
{
    uint16 slot_number;             // Slot number - either 'transmit_frame_ID' or 'receive_frame_ID'
    //Fr_buffer_type buffer_type;     // TRANSMIT, RECEIVE MB - not necessary for the current version of the UNIFIED Driver
    Fr_transmit_MB_type transmission_mode;   // SINGLE or DOUBLE buffered MB
    Fr_transmission_type transmission_type;  // STATE or EVENT transmission mode
    void (* Fr_MB_function_ptr) (uint8 buffer_index_init);  // Callback function with index of MB (except FIFO)
} Fr_MB_information_internal_type;

/* Structure of this type contains slot status configuration parameters which are stored by driver for internal use */
typedef struct
{
    boolean registers_used;         // Slot Status registers are already configured
    uint16 SSSR0_slot_number;       // Static Slot number - the number of the slot whose status will be saved in the SSR0 and SSR1
    uint16 SSSR1_slot_number;       // Static Slot number - the number of the slot whose status will be saved in the SSR2 and SSR3
    uint16 SSSR2_slot_number;       // Static Slot number - the number of the slot whose status will be saved in the SSR4 and SSR5
    uint16 SSSR3_slot_number;       // Static Slot number - the number of the slot whose status will be saved in the SSR6 and SSR7
} Fr_slot_status_internal_type;

/* Structure of this type contains names of service callback functions which are stored by driver for internal use and 
    will be called by the Fr_interrupt_handler() function when an interrupt occurs. */
typedef struct
{
    void (* Fr_module_ptr) (void);      // Callback function for Module Interrupt Flag in the GIFER reg.
    void (* Fr_protocol_ptr) (void);    // Callback function for Protocol Interrupt Flag in the GIFER reg.
    void (* Fr_chi_ptr) (uint16 chi_error); // Callback function for CHI Interrupt Flag in the GIFER reg.
    void (* Fr_wakeup_ptr) (Fr_channel_type wakeup_channel); // Callback function for Wakeup Interrupt Flag in the GIFER reg.
    void (* Fr_fifo_B_ptr) (uint16 header_index);   // Callback function for FIFO B Interrupt Flag in the GIFER reg.
    void (* Fr_fifo_A_ptr) (uint16 header_index);   // Callback function for FIFO A Interrupt Flag in the GIFER reg.
    void (* Fr_fatal_protocol_error_ptr) (void);    // Callback function for FATL_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_internal_protocol_error_ptr) (void); // Callback function for INTL_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_illegal_protocol_conf_ptr) (void);   // Callback function for ILCF_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_coldstart_abort_ptr) (void);         // Callback function for CSA_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_missing_rate_corr_ptr) (void);       // Callback function for MRC_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_missing_offset_corr_ptr) (void);     // Callback function for MOC_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_clock_corr_limit_ptr) (void);        // Callback function for CCL_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_max_sync_frames_ptr) (void);         // Callback function for MXS_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_mts_received_ptr) (void);            // Callback function for MTX_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_violation_B_ptr) (void);             // Callback function for LTXB_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_violation_A_ptr) (void);             // Callback function for LTXA_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_trans_across_boundary_B_ptr) (void); // Callback function for TBVB_IF Interrupt Flag in the PIFR0 reg.
    void (* Fr_trans_across_boundary_A_ptr) (void); // Callback function for TBVA_IF Interrupt Flag in the PIFR0 reg.    
    void (* Fr_timer_2_expired_ptr) (void);         // Callback function for TI2_IF Interrupt Flag in the PIFR0 reg.    
    void (* Fr_timer_1_expired_ptr) (void);         // Callback function for TI1_IF Interrupt Flag in the PIFR0 reg.    
    void (* Fr_cycle_start_ptr) (void);             // Callback function for CYS_IF Interrupt Flag in the PIFR0 reg.    
    void (* Fr_error_mode_changed_ptr) (void);      // Callback function for EMC_IF Interrupt Flag in the PIFR1 reg.    
    void (* Fr_illegal_protocol_command_ptr) (void);    // Callback function for IPC_IF Interrupt Flag in the PIFR1 reg.
    void (* Fr_protocol_engine_comm_failure_ptr) (void); // Callback function for PECF_IF Interrupt Flag in the PIFR1 reg.
    void (* Fr_protocol_state_changed_ptr) (void);  // Callback function for PSC_IF Interrupt Flag in the PIFR1 reg. 
    void (* Fr_slot_status_counter_3_inc_ptr) (void);   // Callback function for SSI3_IF Interrupt Flag in the PIFR1 reg.
    void (* Fr_slot_status_counter_2_inc_ptr) (void);   // Callback function for SSI2_IF Interrupt Flag in the PIFR1 reg.
    void (* Fr_slot_status_counter_1_inc_ptr) (void);   // Callback function for SSI1_IF Interrupt Flag in the PIFR1 reg.
    void (* Fr_slot_status_counter_0_inc_ptr) (void);   // Callback function for SSI0_IF Interrupt Flag in the PIFR1 reg.
    void (* Fr_even_cycle_table_written_ptr) (void);    // Callback function for EVT_IF Interrupt Flag in the PIFR1 reg.
    void (* Fr_odd_cycle_table_written_ptr) (void);     // Callback function for ODT_IF Interrupt Flag in the PIFR1 reg.
} Fr_callback_functions_type;

/******************************************************************************
* Global variables
******************************************************************************/


/******************************************************************************
* Global functions
******************************************************************************/
extern Fr_return_type Fr_init(const Fr_HW_config_type *Fr_HW_config_temp_ptr, \
                            const Fr_low_level_config_type *Fr_low_level_config_temp_ptr);
extern void Fr_set_configuration(const Fr_HW_config_type *Fr_HW_config_temp_ptr, \
                            const Fr_low_level_config_type *Fr_low_level_config_temp_ptr);
extern Fr_return_type Fr_buffers_init(const Fr_buffer_info_type *Fr_buffers_config_temp_ptr, \
                            const Fr_index_selector_type *Fr_buffer_config_set_temp_ptr);
extern void Fr_timers_init(const Fr_timer_config_type ** Fr_timer_config_temp_ptr_ptr);
extern void Fr_slot_status_init(const Fr_slot_status_config_type *Fr_slot_status_config_temp_ptr);
extern void Fr_slot_status_counter_init(const Fr_slot_status_counter_config_type ** Fr_slot_status_counter_config_temp_ptr_ptr);
extern Fr_return_type Fr_leave_configuration_mode(void);
extern Fr_return_type Fr_start_communication(void);
extern Fr_return_type Fr_stop_communication(Fr_stop_communication_type Fr_stop_option);
extern Fr_return_type Fr_send_wakeup(void);
extern Fr_wakeup_state_type Fr_get_wakeup_state(void);
extern Fr_POC_state_type Fr_get_POC_state(void);
extern Fr_sync_state_type Fr_get_sync_state(void);
extern Fr_return_type Fr_enter_configuration_mode(void);
extern Fr_return_type Fr_reset_protocol_engine(void);
extern void Fr_get_global_time(uint8 * Fr_cycle_ptr, uint16 * Fr_macrotick_ptr);
extern Fr_return_type Fr_send_MTS(Fr_channel_type Fr_channel, const Fr_MTS_config_type *Fr_MTS_config_temp_ptr);
extern Fr_MTS_state_type Fr_get_MTS_state(Fr_channel_type Fr_channel);
extern void Fr_get_network_management_vector(uint16 * Fr_vector_ptr);
extern Fr_return_type Fr_get_slot_status_reg_value(uint16 Fr_slot_number, Fr_channel_type Fr_channel, \
                            Fr_slot_status_required_type Fr_slot_status_required, uint16 *Fr_status_vector_ptr);
extern void Fr_get_channel_status_error_counter_value(Fr_channel_type Fr_channel, uint16 *Fr_counter_value_ptr);
extern void Fr_get_slot_status_counter_value(Fr_slot_status_counter_ID_type Fr_counter_idx, uint16 *Fr_counter_value_ptr);
extern void Fr_reset_slot_status_counter(Fr_slot_status_counter_ID_type Fr_counter_idx);
extern Fr_tx_MB_status_type Fr_transmit_data(uint16 Fr_buffer_idx, const uint16 *Fr_data_ptr, uint8 Fr_data_length);
extern Fr_rx_MB_status_type Fr_receive_data(uint16 Fr_buffer_idx, uint16 *Fr_data_ptr, \
                            uint8 *Fr_data_length_ptr,uint16 *Fr_slot_status_ptr);
extern Fr_FIFO_status_type Fr_receive_fifo_data(uint16 Fr_buffer_read_idx, uint16 *Fr_data_ptr, \
                            uint8 *Fr_data_length_ptr, uint16 *Fr_slot_idx_ptr, uint16 *Fr_slot_status_ptr);
extern void Fr_enable_interrupts(uint16 Fr_global_interrupt, uint16 Fr_protocol_0_interrupt, uint16 Fr_protocol_1_interrupt);
extern void Fr_disable_interrupts(uint16 Fr_global_interrupt, uint16 Fr_protocol_0_interrupt, uint16 Fr_protocol_1_interrupt);
extern void Fr_interrupt_handler(void);
extern void Fr_set_MB_callback(void (* MB_callback_ptr)(uint8 Fr_int_buffer_idx), uint8 Fr_buffer_idx);
extern Fr_return_type Fr_set_global_IRQ_callback(void (* callback_ptr)(void), uint16 Fr_global_interrupt);
extern Fr_return_type Fr_set_protocol_0_IRQ_callback(void (* callback_ptr)(void), uint16 Fr_protocol_interrupt);
extern Fr_return_type Fr_set_protocol_1_IRQ_callback(void (* callback_ptr)(void), uint16 Fr_protocol_interrupt);
extern void Fr_set_wakeup_IRQ_callback(void (* callback_ptr)(Fr_channel_type wakeup_channel));
extern void Fr_set_chi_IRQ_callback(void (* callback_ptr)(uint16 chi_error));
extern Fr_return_type Fr_set_fifo_IRQ_callback(void (* callback_ptr)(uint16 header_index), uint16 Fr_global_interrupt);
extern void Fr_clear_MB_interrupt_flag(uint8 Fr_buffer_idx);
extern void Fr_start_timer(Fr_timer_ID_type timer_ID);
extern void Fr_stop_timer(Fr_timer_ID_type timer_ID);
extern Fr_tx_status_type Fr_check_tx_status(uint8 Fr_buffer_idx);
extern Fr_rx_status_type Fr_check_rx_status(uint8 Fr_buffer_idx);
extern Fr_CHI_error_type Fr_check_CHI_error(void);
extern boolean Fr_check_cycle_start(uint8 *Fr_cycle_ptr);
extern boolean Fr_check_transmission_across_boundary(Fr_channel_type Fr_channel);
extern boolean Fr_check_violation(Fr_channel_type Fr_channel);
extern boolean Fr_check_max_sync_frame(void);
extern boolean Fr_check_clock_correction_limit_reached(void);
extern boolean Fr_check_missing_offset_correction(void);
extern boolean Fr_check_missing_rate_correction(void);
extern boolean Fr_check_coldstart_abort(void);
extern boolean Fr_check_internal_protocol_error(void);
extern boolean Fr_check_fatal_protocol_error(void);
extern boolean Fr_check_protocol_state_changed(void);
extern boolean Fr_check_protocol_engine_com_failure(void);
extern uint16 Fr_low_level_access_read_reg(uint16 Fr_required_register);
extern void Fr_low_level_access_write_reg(uint16 Fr_required_register, uint16 Fr_value);
extern uint16 Fr_low_level_access_read_memory(uint16 Fr_memory_address);
extern void Fr_low_level_access_write_memory(uint16 Fr_memory_address, uint16 Fr_value);


/******************************************************************************
* Inline functions
******************************************************************************/

#endif /* FR_H */