?? s12xfr.h
字號:
#define SYMBADR _SYMBADR.Dword
/*** STBSCR - Strobe Signal Control Register; 0x00000408 ***/
typedef union {
word Word;
struct {
word STBPSEL :2;
word :2;
word ENB :1;
word :3;
word STBSSEL :7;
word WMD :1;
} Bits;
} STBSCRSTR;
extern volatile STBSCRSTR _STBSCR @(REG_BASE + 0x00000408);
#define STBSCR _STBSCR.Word
#define STBSCR_STBPSEL _STBSCR.Bits.STBPSEL
#define STBSCR_ENB _STBSCR.Bits.ENB
#define STBSCR_STBSSEL _STBSCR.Bits.STBSSEL
#define STBSCR_WMD _STBSCR.Bits.WMD
#define STBSCR_STBPSEL_MASK 0x0003
#define STBSCR_ENB_MASK 0x0010
#define STBSCR_STBSSEL_MASK 0x7F00
#define STBSCR_WMD_MASK 0x8000
/*** STBPCR - Strobe Port Control Register; 0x0000040A ***/
typedef union {
word Word;
struct {
word STB0EN :1; /* Strobe Port STB0 Enable */
word STB1EN :1; /* Strobe Port STB1 Enable */
word STB2EN :1; /* Strobe Port STB2 Enable */
word STB3EN :1; /* Strobe Port STB3 Enable */
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
} Bits;
} STBPCRSTR;
extern volatile STBPCRSTR _STBPCR @(REG_BASE + 0x0000040A);
#define STBPCR _STBPCR.Word
#define STBPCR_STB0EN _STBPCR.Bits.STB0EN
#define STBPCR_STB1EN _STBPCR.Bits.STB1EN
#define STBPCR_STB2EN _STBPCR.Bits.STB2EN
#define STBPCR_STB3EN _STBPCR.Bits.STB3EN
#define STBPCR_STB0EN_MASK 1
#define STBPCR_STB1EN_MASK 2
#define STBPCR_STB2EN_MASK 4
#define STBPCR_STB3EN_MASK 8
/*** MBDSR - Message Buffer Data Size Register; 0x0000040C ***/
typedef union {
word Word;
struct {
word MBSEG1DS :7; /* Message Buffer Segment 1 Data Size */
word :1;
word MBSEG2DS :7; /* Message Buffer Segment 2 Data Size */
word :1;
} Bits;
} MBDSRSTR;
extern volatile MBDSRSTR _MBDSR @(REG_BASE + 0x0000040C);
#define MBDSR _MBDSR.Word
#define MBDSR_MBSEG1DS _MBDSR.Bits.MBSEG1DS
#define MBDSR_MBSEG2DS _MBDSR.Bits.MBSEG2DS
#define MBDSR_MBSEG1DS_MASK 127
#define MBDSR_MBSEG1DS_BITNUM 0
#define MBDSR_MBSEG2DS_MASK 32512
#define MBDSR_MBSEG2DS_BITNUM 8
/*** MBSSUTR - Message Buffer Segment Size and Utilization Register; 0x0000040E ***/
typedef union {
word Word;
struct {
word LAST_MB_UTIL :5; /* Last Message Buffer Utilized */
word :1;
word :1;
word :1;
word LAST_MB_SEG1 :5; /* Last Message Buffer In Segment 1 */
word :1;
word :1;
word :1;
} Bits;
} MBSSUTRSTR;
extern volatile MBSSUTRSTR _MBSSUTR @(REG_BASE + 0x0000040E);
#define MBSSUTR _MBSSUTR.Word
#define MBSSUTR_LAST_MB_UTIL _MBSSUTR.Bits.LAST_MB_UTIL
#define MBSSUTR_LAST_MB_SEG1 _MBSSUTR.Bits.LAST_MB_SEG1
#define MBSSUTR_LAST_MB_UTIL_MASK 31
#define MBSSUTR_LAST_MB_UTIL_BITNUM 0
#define MBSSUTR_LAST_MB_SEG1_MASK 7936
#define MBSSUTR_LAST_MB_SEG1_BITNUM 8
/*
typedef union uPADR
{
tU16 word;
struct
{
tU16 drd :1; // debug read done
tU16 peaddr :15; // PE word address
}bit;
}tPADR;
#define DRD 0x0001 //bit masks
#define PEADDR 0xFFFE
*/
/*** POCR - Protocol Operation Control Register; 0x00000414 ***/
typedef union {
word Word;
struct {
word POCCMD :4; /* Protocol Command */
word :1;
word :1;
word :1;
word BSY_WMC :1; /* Protocol Command Write Busy, Write Mode Command */
word ERC_AP :2; /* External Rate Correction Application */
word EOC_AP :2; /* External Offset Correction Application */
word :1;
word :1;
word :1;
word WME :1; /* Write Mode External Correction */
} Bits;
} POCRSTR;
extern volatile POCRSTR _POCR @(REG_BASE + 0x00000414);
#define POCR _POCR.Word
#define POCR_POCCMD _POCR.Bits.POCCMD
#define POCR_BSY_WMC _POCR.Bits.BSY_WMC
#define POCR_ERC_AP _POCR.Bits.ERC_AP
#define POCR_EOC_AP _POCR.Bits.EOC_AP
#define POCR_WME _POCR.Bits.WME
#define POCR_POCCMD_MASK 15
#define POCR_POCCMD_BITNUM 0
#define POCR_BSY_WMC_MASK 128
#define POCR_ERC_AP_MASK 768
#define POCR_ERC_AP_BITNUM 8
#define POCR_EOC_AP_MASK 3072
#define POCR_EOC_AP_BITNUM 10
#define POCR_WME_MASK 32768
/*** GIFER - Global Interrupt Flag and Enable Register; 0x00000416 ***/
typedef union {
word Word;
struct {
word TBIE :1; /* Transmit Interrupt Enable */
word RBIE :1; /* Receive Buffer Interrupt Enable */
word FNEAIE :1; /* Receive FIFO channel A Not Empty Interrupt Enable */
word FNEBIE :1; /* Receive FIFO channel B Not Empty Interrupt Enable */
word WUPIE :1; /* Wakeup Interrupt Enable */
word CHIE :1; /* CHI Interrupt Enable */
word PRIE :1; /* Protocol Interrupt Enable */
word MIE :1; /* Module Interrupt Enable */
word TBIF :1; /* Transmit Buffer Interrupt Flag */
word RBIF :1; /* Receive Message Buffer Interrupt Flag */
word FNEAIF :1; /* Receive FIFO channel A Not Empty Interrupt Flag */
word FNEBIF :1; /* Receive FIFO channel B Not Empty Interrupt Flag */
word WUPIF :1; /* Wakeup Interrupt Flag */
word CHIF :1; /* CHI Interrupt Flag */
word PRIF :1; /* Protocol Interrupt Flag */
word MIF :1; /* Module Interrupt Flag */
} Bits;
} GIFERSTR;
extern volatile GIFERSTR _GIFER @(REG_BASE + 0x00000416);
#define GIFER _GIFER.Word
#define GIFER_TBIE _GIFER.Bits.TBIE
#define GIFER_RBIE _GIFER.Bits.RBIE
#define GIFER_FNEAIE _GIFER.Bits.FNEAIE
#define GIFER_FNEBIE _GIFER.Bits.FNEBIE
#define GIFER_WUPIE _GIFER.Bits.WUPIE
#define GIFER_CHIE _GIFER.Bits.CHIE
#define GIFER_PRIE _GIFER.Bits.PRIE
#define GIFER_MIE _GIFER.Bits.MIE
#define GIFER_TBIF _GIFER.Bits.TBIF
#define GIFER_RBIF _GIFER.Bits.RBIF
#define GIFER_FNEAIF _GIFER.Bits.FNEAIF
#define GIFER_FNEBIF _GIFER.Bits.FNEBIF
#define GIFER_WUPIF _GIFER.Bits.WUPIF
#define GIFER_CHIF _GIFER.Bits.CHIF
#define GIFER_PRIF _GIFER.Bits.PRIF
#define GIFER_MIF _GIFER.Bits.MIF
#define GIFER_TBIE_MASK 1
#define GIFER_RBIE_MASK 2
#define GIFER_FNEAIE_MASK 4
#define GIFER_FNEBIE_MASK 8
#define GIFER_WUPIE_MASK 16
#define GIFER_CHIE_MASK 32
#define GIFER_PRIE_MASK 64
#define GIFER_MIE_MASK 128
#define GIFER_TBIF_MASK 256
#define GIFER_RBIF_MASK 512
#define GIFER_FNEAIF_MASK 1024
#define GIFER_FNEBIF_MASK 2048
#define GIFER_WUPIF_MASK 4096
#define GIFER_CHIF_MASK 8192
#define GIFER_PRIF_MASK 16384
#define GIFER_MIF_MASK 32768
/*** PIFR0 - Protocol Interrupt Flag Register 0; 0x00000418 ***/
typedef union {
word Word;
struct {
word CYS_IF :1; /* Cycle Start Interrupt Flag */
word TI1_IF :1; /* Timer 1 Expired Interrupt Flag */
word TI2_IF :1; /* Timer 2 Expired Interrupt Flag */
word TBVA_IF :1; /* Transmission across boundary on channel A Interrupt Flag */
word TBVB_IF :1; /* Transmission across boundary on channel B Interrupt Flag */
word LTXA_IF :1; /* pdLatestTx Violation on Channel A Interrupt Flag */
word LTXB_IF :1; /* pdLatestTx Violation on Channel B Interrupt Flag */
word MTX_IF :1; /* Media Access Test Symbol Received Interrupt Flag */
word MXS_IF :1; /* Max Sync Frames Detected Interrupt Flag */
word CCL_IF :1; /* Clock Correction Limit Reached Interrupt Flag */
word MOC_IF :1; /* Missing Offset Correction Interrupt Flag */
word MRC_IF :1; /* Missing Rate Correction Interrupt Flag */
word CSA_IF :1; /* Cold Start Abort Interrupt Flag */
word ILCF_IF :1; /* Illegal Protocol Configuration Interrupt Flag */
word INTL_IF :1; /* Internal Protocol Error Interrupt Flag */
word FATL_IF :1; /* Fatal Protocol Error Interrupt Flag */
} Bits;
} PIFR0STR;
extern volatile PIFR0STR _PIFR0 @(REG_BASE + 0x00000418);
#define PIFR0 _PIFR0.Word
#define PIFR0_CYS_IF _PIFR0.Bits.CYS_IF
#define PIFR0_TI1_IF _PIFR0.Bits.TI1_IF
#define PIFR0_TI2_IF _PIFR0.Bits.TI2_IF
#define PIFR0_TBVA_IF _PIFR0.Bits.TBVA_IF
#define PIFR0_TBVB_IF _PIFR0.Bits.TBVB_IF
#define PIFR0_LTXA_IF _PIFR0.Bits.LTXA_IF
#define PIFR0_LTXB_IF _PIFR0.Bits.LTXB_IF
#define PIFR0_MTX_IF _PIFR0.Bits.MTX_IF
#define PIFR0_MXS_IF _PIFR0.Bits.MXS_IF
#define PIFR0_CCL_IF _PIFR0.Bits.CCL_IF
#define PIFR0_MOC_IF _PIFR0.Bits.MOC_IF
#define PIFR0_MRC_IF _PIFR0.Bits.MRC_IF
#define PIFR0_CSA_IF _PIFR0.Bits.CSA_IF
#define PIFR0_ILCF_IF _PIFR0.Bits.ILCF_IF
#define PIFR0_INTL_IF _PIFR0.Bits.INTL_IF
#define PIFR0_FATL_IF _PIFR0.Bits.FATL_IF
#define PIFR0_CYS_IF_MASK 1
?? 快捷鍵說明
復制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -