?? p&e_multilink_cyclonepro_linker.prm
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/* This is a linker parameter file for the MC9S12XFR128. */
/*
This parameter file is setup in a generic way to allow exploring most common features of both cores:
- S12X core
- XGATE code and constants in FLASH and/or RAM
- XGATE data and stack in RAM
It might be required to adapt some of the definitions to best match your application.
*/
NAMES
/* CodeWarrior will pass all the needed files to the linker by command line. But here you may add your additional files */
END
SEGMENTS /* here all RAM/ROM areas of the device are listed. Used in PLACEMENT below. All addresses are 'logical' */
/* Register space */
/* IO_SEG = PAGED 0x0000 TO 0x07FF; intentionally not defined */
/* non-paged EEPROM */
EEPROM = READ_ONLY 0x0800 TO 0x0FFF; /* also covers the bank range 0x0800..0x0BFF */
/* non-paged RAM */
RAM = READ_WRITE 0x2000 TO 0x3FFF ALIGN 2[1:1]; /* word align for XGATE accesses */
/* non-banked FLASH */
ROM_4000 = READ_ONLY 0x4000 TO 0x7FFF;
ROM_C000 = READ_ONLY 0xC000 TO 0xFEFF;
/* VECTORS = READ_ONLY 0xFF00 TO 0xFFFF; intentionally not defined: used for VECTOR commands below */
//OSVECTORS = READ_ONLY 0xFF10 TO 0xFFFF; /* OSEK interrupt vectors (use your vector.o) */
/* paged EEPROM 0x0800 TO 0x0BFF; addressed through EPAGE */
/* EEPROM_FE = READ_ONLY 0xFE0800 TO 0xFE0BFF; intentionally not defined: equivalent to EEPROM */
/* EEPROM_FF = READ_ONLY 0xFF0800 TO 0xFF0BFF; intentionally not defined: equivalent to EEPROM */
/* paged RAM: 0x1000 TO 0x1FFF; addressed through RPAGE */
RAM_XGATE_STK = READ_WRITE 0xFC1000 TO 0xFC10FF; /* The stack is set by the XGATE compiler option -Cstv=C100 */
RAM_FC = READ_WRITE 0xFC1100 TO 0xFC1FFF ALIGN 2[1:1]; /* is also mapped to XGATE: 0xC100..0xCFFF */
RAM_FD = READ_WRITE 0xFD1000 TO 0xFD1FFF ALIGN 2[1:1]; /* is also mapped to XGATE: 0xD000..0xDFFF */
/* RAM_FE = READ_WRITE 0xFE1000 TO 0xFE1FFF; intentionally not defined: equivalent to RAM: 0x2000..0x2FFF */
/* RAM_FF = READ_WRITE 0xFF1000 TO 0xFF1FFF; intentionally not defined: equivalent to RAM: 0x3000..0x3FFF */
/* paged FLASH: 0x8000 TO 0xBFFF; addressed through PPAGE */
PAGE_E0_0 = READ_ONLY 0xE08000 TO 0xE087FF; /* cannot be mapped to XGATE; XGATE sees registers here */
PAGE_E0 = READ_ONLY 0xE08800 TO 0xE0BFFF ALIGN 2[1:1]; /* is also mapped to XGATE: 0x0800..0x3FFF */
PAGE_E1 = READ_ONLY 0xE18000 TO 0xE1BFFF ALIGN 2[1:1]; /* is also mapped to XGATE: 0x4000..0x7FFF */
PAGE_E2 = READ_ONLY 0xE28000 TO 0xE2BFFF; /* This module should NOT be */
PAGE_E3 = READ_ONLY 0xE38000 TO 0xE3BFFF; /* used for HC12 code when also used for XGATE code */
/* since the HC12 will have priority over the XGATE */
/* accessing the FLASH modules resulting very poor */
/* performance of the XGATE: */
/* Check allocation of this ranges in PLACEMENT below! */
PAGE_FC = READ_ONLY 0xFC8000 TO 0xFCBFFF;
/* PAGE_FD = READ_ONLY 0xFD8000 TO 0xFDBFFF; intentionally not defined: equivalent to ROM_4000 */
PAGE_FE = READ_ONLY 0xFE8000 TO 0xFEBFFF;
/* PAGE_FF = READ_ONLY 0xFF8000 TO 0xFFBFFF; intentionally not defined: equivalent to ROM_C000 */
END
PLACEMENT /* here all predefined and user segments are placed into the SEGMENTS defined above. */
_PRESTART, /* Used in HIWARE format: jump to _Startup at the code start */
STARTUP, /* startup data structures */
ROM_VAR, /* constant variables */
STRINGS, /* string literals */
VIRTUAL_TABLE_SEGMENT, /* C++ virtual table segment */
//.ostext, /* eventually OSEK code */
NON_BANKED, /* runtime routines which must not be banked */
COPY /* copy down information: how to initialize variables */
/* in case you want to use ROM_4000 here as well, make sure
that all files (incl. library files) are compiled with the
option: -OnB=b */
INTO ROM_C000/*, ROM_4000*/;
DEFAULT_ROM INTO PAGE_FE, PAGE_FC,
/* use the following ranges only when same module is NOT used for XGATE code */
/* PAGE_E0, PAGE_E1, intentionally not listed: assigned to XGATE */
PAGE_E3, PAGE_E2, PAGE_E0_0;
XGATE_VECTORS, /* XGATE vector table is allocated in FLASH */
XGATE_STRING, /* XGATE string literals */
XGATE_CONST, /* XGATE constants */
XGATE_CODE, /* XGATE functions */
XGATE_STRING_FLASH, /* XGATE strings that should always go into flash */
XGATE_CONST_FLASH, /* XGATE constants what should always go into flash */
XGATE_CODE_FLASH /* XGATE code that should always run out of flash */
INTO PAGE_E0, PAGE_E1; /* FLASH accessible by XGATE */
SSTACK, /* allocate stack first to avoid overwriting variables */
SHARED_DATA, /* variables that are shared between CPU12 and XGATE */
DEFAULT_RAM /* all variables, the default RAM location */
INTO RAM;
XGATE_STRING_RAM, /* XGATE strings that should always go into RAM */
XGATE_CONST_RAM, /* XGATE constants what should always go into RAM */
XGATE_CODE_RAM, /* XGATE code that should always run out of RAM */
XGATE_DATA /* data that are accessed by XGATE only */
INTO RAM_FC /*, RAM_FD */;
PAGED_RAM /* paged data accessed by CPU12 only */
INTO /* when using banked addressing for variable data, make sure to specify
the option -D__FAR_DATA on the compiler command line */
RAM_FD /*, RAM_FC */;
//.vectors INTO OSVECTORS; /* OSEK vector table */
END
ENTRIES /* keep the following unreferenced variables */
END
STACKSIZE 0x100 /* size of the stack (will be allocated in DEFAULT_RAM) */
/* use these definitions in plane of the vector table ('vectors') above */
VECTOR 0 _Startup /* reset vector: this is the default entry point for a C/C++ application. */
//VECTOR 0 Entry /* reset vector: this is the default entry point for an Assembly application. */
//INIT Entry /* for assembly applications: that this is as well the initialization entry point */
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