//頭文件為c6xinterrupt.h 使能編程時相應的中斷

#include <c6x.h>
#include "c6211dsk.h"



/*  Interrupt_num is cpu interrupt number{4,5,6.....15}
   Interrupt_source is interrupt source {"#define"DSPINT,TINTO,TINT1......RINT1 }
*/
void enableSpecificINT(int Interrupt_num,unsigned int Interrupt_source)
{
 
 union 
    {
       struct
       {
        unsigned int INTSEL4:5;
        unsigned int INTSEL5:5;
        unsigned int INTSEL6:5;
        unsigned int rsvbit15:1;
        unsigned int INTSEL7:5;
        unsigned int INTSEL8:5;
		unsigned int INTSEL9:5;
		unsigned int rsvbit31:1;
       }evg;
    
      unsigned int reg; 
    
    }IMLvalue;



 union
    {
       struct
       {
        unsigned int INTSEL10:5;
        unsigned int INTSEL11:5;
        unsigned int INTSEL12:5;
        unsigned int rsvbit15:1;
        unsigned int INTSEL13:5;
        unsigned int INTSEL14:5;
		unsigned int INTSEL15:5;
		unsigned int rsvbit31:1;
       }evg;
    
      unsigned int reg; 
    
    }IMHvalue;

	IMLvalue.reg=*(volatile unsigned int*)IML;
	IMHvalue.reg=*(volatile unsigned int*)IMH;
  switch(Interrupt_num)
  { 
    case 4:  
             IMLvalue.evg.INTSEL4=Interrupt_source;
             IER|=0x12;
	         CSR|=1;
			 ICR=IFR|0x10;
			 break;
	case 5:   
	         IMLvalue.evg.INTSEL5 = Interrupt_source;
	         IER|=0x22;
	         CSR|=1;
			 ICR=IFR|0x20;
			 break;
	case 6:   
	         IMLvalue.evg.INTSEL6=Interrupt_source;
	         IER|=0x42;
	         CSR|=1;
			 ICR=IFR|0x40;
			 break;
	case 7:   
	         IMLvalue.evg.INTSEL7=Interrupt_source;
	         IER|=0x82;
	         CSR|=1;
			 ICR=IFR|0x80;
			 break;
	case 8:   IMLvalue.evg.INTSEL8=Interrupt_source;
	         IER|=0x102;
	         CSR|=1;
			 ICR=IFR|0x100;
			 break;
	case 9:   
	         IMLvalue.evg.INTSEL9=Interrupt_source;
	         IER|=0x202;
	         CSR|=1;
			 ICR=IFR|0x200;
			 break;
	case 10:  
	         IMHvalue.evg.INTSEL10=Interrupt_source;
	         IER|=0x402;
	         CSR|=1;
			 ICR=IFR|0x400;
			 break;
	case 11:  IMHvalue.evg.INTSEL11=Interrupt_source;
	         IER|=0x802;
	         CSR|=1;
			 ICR=IFR|0x800;
			 break;
	case 12:  
	         IMHvalue.evg.INTSEL12=Interrupt_source;
	         IER|=0x1002;
	         CSR|=1;
			 ICR=IFR|0x1000;
			 break;
	case 13: 
	         IMHvalue.evg.INTSEL13=Interrupt_source;
	         IER|=0x2002;
	         CSR|=1;
			 ICR=IFR|0x2000;
			 break;
	case 14: 
	         IMHvalue.evg.INTSEL14=Interrupt_source;
         	 IER|=0x4002;
	         CSR|=1;
			 ICR=IFR|0x4000;
			 break;
	case 15:  
	         IMHvalue.evg.INTSEL15=Interrupt_source;
	         IER|=0x8002;
	         CSR|=1;
			 ICR=IFR|0x8000;
			 break;
  
    default: break;
  
  }
   
    *(volatile unsigned int*)IML=IMLvalue.reg;
	*(volatile unsigned int*)IMH=IMHvalue.reg;

	return;
   
}