/*******************************************************************************
*							礐OS-II Blackfin port test example
*							Blackfin Applications Team, Analog Devices Inc.,
*								Norwood, MA, US
*
* File: 				os_cpu_a.asm
* Author: 				Deep Bodapati 
* Last Modified: 		10-10-2006
* Project:				礐OS-II Blackfin port
* Platform: 			Any (EZKit, custom boards etc.)
* Tools:				VisualDSP++ 4.5 (Updated September 2006)
* 礐OS-II Version: 		v2.83
*																			
* This file is part of the 礐OS-II port to the Blackfin processor. 
******************************************************************************/
/*
Copyright...

This code is placed in the public domain, and can be distributed freely with no restrictions provided that the heading
of each source module file is not modified to remove the credit to the original author.
  
Disclaimer...

This program code is provided "as is". There is no warranty, either expressed or implied as to its fitness for use in
any application. It is provided only as an example of porting the MicroC/OS operating system to the Blackfin processor.
Its use is strictly at the risk of the user. The author will not be liable for any damages direct or consequential related
to the use of this software including, but not limited to loss of profit.
*/

#include <def_LPBlackfin.h>
#include <os_cfg.h>
#include <os_cpu.h>

//------------------------------------------------------------------
//    Global variables
//------------------------------------------------------------------
.extern _OSTaskSwHook;
.extern _OSIntEnter;
.extern _OSIntExit;
.extern _OSTimeTick;
.extern _OSTimeTickHook;
.extern _OSIntNesting;
.extern _OSPrioCur;
.extern _OSPrioHighRdy;
.extern _OSRunning;
.extern _OSTCBCur;
.extern _OSTCBHighRdy;

//.section program;
/*
*********************************************************************************************************
*               				__uCOS_II_reentrant_interrupt_entry
*
* Description: __uCOS_II_reentrant_interrupt_entry serves as the interrupt entry function for ISRs chosen 
* as re-entrant (nested) The 'uCOS Interrupt Entry management' and 'CPU context save' operations are 
* common across all ISRs. Thus, these operations are encapsulated as a callable function to save L1 code space. 
*
* __uCOS_II_reentrant_interrupt_entry consists of 
* 1. 'uCOS Interrupt Entry management' - incremements OSIntNesting and saves SP in the TCB if
* OSIntNesting == 1. 
* 2. 'CPU context save' - After OSIntNesting is incremented, it is safe to re-enable interrupts - 
* so, first, RETI is pushed onto stack followed by the rest of the processor's context. 
* 
* Refer to VisualDSP++ C/C++ Compiler and Library Manual for Blackfin Processors 
* and ADSP-BF53x/BF56x Blackfin