//************************************************************************************************//*                                                                                                                 *//*  IME6400 Video Caputure Card General Purpose Bus driver                     *//*  Direct map memory//*  //***********************************************************************************************#include <linux/config.h>#ifndef __KERNEL__#  define __KERNEL__#endif#ifdef   MODULE#include <linux/version.h>#include <linux/module.h>#endif#include <linux/kernel.h>#include <linux/types.h>#include <linux/sched.h>#include <linux/mm.h>#include <linux/string.h>#include <linux/errno.h>#include <asm/uaccess.h>#include <asm/io.h>#include <asm/system.h>#include <linux/kmod.h>#include <linux/slab.h>   /* kmalloc() */#include <linux/fs.h>#include <linux/wait.h>#include <linux/ioctl.h>#include <linux/sched.h>//#include <linux/wait.h>#include <linux/init.h>#ifndef _MCF5249_#define _MCF5249_#endif//#ifndef _REVERSE_//#define _REVERSE_//#endif//#undef  _REVERSE_//#define _HHETH_#define HAVE_MAP#define DEVICEMAJOR 254#define MEDIAHEAD 20//***************************************************************//Data type define#define DWORD volatile unsigned long#define BYTE  volatile unsigned char#define WORD volatile unsigned short//***************************************************************//***  for debug **//#define DEBUG 1#ifdef DEBUG#define PDEBUG(fmt, args...) printf(fmt,##args)#define KDEBUG(fmt, args...) printk("KDEBUG: "fmt, ##args)#else#define PDEBUG(fmt, args...)#define KDEBUG(fmt, args...)#endif#ifdef _MCF5249_//Define base address#define IME_MBAR 0x30000000#define MCF_MBAR 0x10000000#define MCF_MBAR2 0x80000000//ime6400 Register define#define BaseAddress0 (0x12<<1)#define BaseAddress1 (0x14<<1)#define Status (0x1e<<1)#define Data (0x02<<1)#define Command 0x00#define User0 (0x04<<1)#define User4 (0x0c<<1)#define User3 (0x0a<<1)#define EncodedStream (0x10<<1)#ifdef _HHETH_#define IrqID  161#else#define IrqID  162#endif// Chip Select registers (in MBA)#define MCFSIM_CSAR0		0x80		/* CS 0 Address 0 reg (r/w) */#define MCFSIM_CSMR0		0x84		/* CS 0 Mask 0 reg (r/w) */#define MCFSIM_CSCR0		0x8a		/* CS 0 Control reg (r/w) */#define MCFSIM_CSAR1		0x8c		/* CS 1 Address reg (r/w) */#define MCFSIM_CSMR1		0x90		/* CS 1 Mask reg (r/w) */#define MCFSIM_CSCR1		0x96		/* CS 1 Control reg (r/w) *//* *	General purpose IO registers (in MBAR2). */#define	MCFSIM2_GPIOREAD	0x0		/* GPIO read values */#define	MCFSIM2_GPIOWRITE	0x4		/* GPIO write values */#define	MCFSIM2_GPIOENABLE	0x8		/* GPIO enabled */#define	MCFSIM2_GPIOFUNC	0xc		/* GPIO function */#define	MCFSIM2_GPIO1READ	0xb0		/* GPIO1 read values */#define	MCFSIM2_GPIO1WRITE	0xb4		/* GPIO1 write values */#define	MCFSIM2_GPIO1ENABLE	0xb8		/* GPIO1 enabled */#define	MCFSIM2_GPIO1FUNC	0xbc		/* GPIO1 function */#define	MCFSIM2_GPIOINTSTAT	0xc0		/* GPIO interrupt status */#define	MCFSIM2_GPIOINTCLEAR	0xc0		/* GPIO interrupt clear */#define	MCFSIM2_GPIOINTENABLE	0xc4		/* GPIO interrupt enable */#define	MCFSIM2_INTLEVEL1	0x140		/* Interrupt level reg 1 */#define	MCFSIM2_INTLEVEL2	0x144		/* Interrupt level reg 2 */#define	MCFSIM2_INTLEVEL3	0x148		/* Interrupt level reg 3 */#define	MCFSIM2_INTLEVEL4	0x14c		/* Interrupt level reg 4 */#define	MCFSIM2_INTLEVEL5	0x150		/* Interrupt level reg 5 */#define	MCFSIM2_INTLEVEL6	0x154		/* Interrupt level reg 6 */#define	MCFSIM2_INTLEVEL7	0x158		/* Interrupt level reg 7 */#define	MCFSIM2_INTLEVEL8	0x15c		/* Interrupt level reg 8 */#else //Define base address#define IME_MBAR 0x01000000#define MCF_MBAR 0x10000000//ime6400 Register define#define BaseAddress0 0x12#define BaseAddress1 0x14#define Status 0x1e#define Data 0x02#define Command 0x00#define User0 0x04#define User4 0x0c#define User3 0x0a#define EncodedStream 0x10#define IrqID  67#endif//****************************#define IOC_MAGIC ('k')//** video ioctl ***#define IOCVGSTATUE _IOR(IOC_MAGIC,0,int)//****************************//******************************************//***      Function                                            ****//******************************************// Big-endian <==> Little-endian#ifdef _REVERSE_#define Reverse16(r)	(((WORD)r<<8)|((WORD)r>>8))#else#define Reverse16(r) (r)#endif//***   pointer for mem space#define	mcf32p(r)	((DWORD *) (r))#define	mcf16p(r)	((WORD *) (r))#define	mcf8p(r)	((BYTE *) (r))//***   pointer for mbar register#define	mcfReg32p(r)	(mcf32p(MCF_MBAR + (r)))#define	mcfReg16p(r)	(mcf16p(MCF_MBAR + (r)))#define	mcfReg8p(r) 	(mcf8p(MCF_MBAR + (r)))#ifdef _MCF5249_//***   pointer for 5249 mbar2 register#define	mcf2Reg32p(r)	(mcf32p(MCF_MBAR2 + (r)))#define	mcf2Reg16p(r)	(mcf16p(MCF_MBAR2 + (r)))#define	mcf2Reg8p(r) 	(mcf8p(MCF_MBAR2 + (r)))#endif//***   pointer for ime6400 register#define	I6400Reg32p(r)	(mcf32p(IME_MBAR + (r)))#define	I6400Reg16p(r)	(mcf16p(IME_MBAR + (r)))#define	I6400Reg8p(r) 	(mcf8p(IME_MBAR + (r)))//******** the  old  functions//===========================mcf Access =====================#define M5272ReadMem(r) (*mcf32p(r))#define M5272ReadReg(r) (*mcfReg32p(r))#define M5272WriteReg(x, y) (mcf32Write(x,y))inline void  mcf32Write(DWORD dIndex,DWORD dValue){	*(mcfReg32p(dIndex))=dValue;		return;}//===========================IME 6400 Access =====================#define	I6400ReadReg(r) (Reverse16(*I6400Reg16p(r)))inline void I6400WriteReg(DWORD dIndex,WORD wValue){	*(I6400Reg16p(dIndex))=Reverse16(wValue);	return;}//*******  set cs wait length  *************static int ta_wait =3;#ifdef MODULEMODULE_PARM (ta_wait, "i");MODULE_PARM_DESC (ta_wait, "clocks to insert before internal /TA!!!");#endif#define WAITLENTH(x) (((WORD)x<<10)|0x0180)//*************************************/************ globel value **************/static DECLARE_WAIT_QUEUE_HEAD(wq);//wait_queue_head_t wq;DWORD dEncode=IME_MBAR + EncodedStream;WORD wLoop=0;#define LEAFLET 2   //1k#define BLOCK 2048  ////#define PACKSIZE 528#define PACKSIZE 532#define BUFFERINC(x,y,z)  ((x+y)%z)  //z: num of package  y: inc  x: indicate//#define NR_QUEUE   256  //(BLOCK/LEAFLET)unsigned char * StreamPool;  //buffer volatile int nRd=0;volatile int nWrt=0;//volatile int nBlock=0;DWORD mmstart=0;//volatile int activeMap = 0;//*******************************************static ssize_t driver_read(struct file *file,char *buf, size_t count, loff_t *ppos){	int nRet;	int slen;	//int flags;//	wait_queue_t wait;	//	init_waitqueue_entry(&wait, current);//	KDEBUG("S");//	add_wait_queue(&wq, &wait);//	while (1) {//   	 	set_current_state(TASK_INTERRUPTIBLE);//   		if (nRd != nWrt) /* whatever test your driver needs *///   	 	break;//   	 	schedule();//	}//	set_current_state(TASK_RUNNING);//	remove_wait_queue(&wq, &wait);//	KDEBUG("W");	/*       while(nRd==nWrt){       	if (file->f_flags & O_NONBLOCK) {			return -EAGAIN;		}	   		interruptible_sleep_on(&wq);	   		if (signal_pending(current)) {			KDEBUG("  interrupted\n");			return -ERESTARTSYS;		}	}*/	tryagain:	//printk("nw[%d] nr[%d]\n",nWrt,nRd);	slen = ((nWrt>=nRd)?(nWrt-nRd):(BLOCK-nRd));	if(slen<(count/PACKSIZE)){		if((BLOCK-nRd)<(count/PACKSIZE)){			KDEBUG("align error\n");			nRd = 0;		}		if (signal_pending(current))	  	  return (-ERESTARTSYS);		set_current_state(TASK_INTERRUPTIBLE);		schedule_timeout(1);		goto tryagain;				//return 0;	//	wait_event_interruptible(wq,(nRd!=nWrt));			}			//if(nRd==nWrt){	//	bufStatue = 0;	//	return 0;		//interruptible_sleep_on(&wq);	//}	  	   //************************************************************	#ifndef HAVE_MAP	//copy_to_user(buf,StreamPool+LEAFLET*PACKSIZE*nRd,LEAFLET*PACKSIZE);	copy_to_user(buf,StreamPool+PACKSIZE*nRd,LEAFLET*PACKSIZE);#endif	nRet = nRd;	//nRd = BUFFERINC(nRd, LEAFLET,BLOCK);	nRd = BUFFERINC(nRd, (count/PACKSIZE), BLOCK);	     	return nRet;}//****** mmap **************/*void driver_vma_open(struct vm_area_struct *vma){ 	MOD_INC_USE_COUNT; 	activeMap++;}void driver_vma_close(struct vm_area_struct *vma){ 	MOD_DEC_USE_COUNT; 	activeMap--;}struct vm_operations_struct driver_vm_ops = {    open:     driver_vma_open,    close:  	driver_vma_close,};*/int driver_mmap(struct file *filp, struct vm_area_struct *vma){	KDEBUG("vmmap()\n");	vma->vm_flags |= VM_RESERVED;	//if((driver_buf == NULL) || remap_page_range(vma->vm_start,__pa(driver_buf),BUFSIZE,PAGE_SHARED))	vma->vm_start = vma->vm_offset + mmstart;	//vma->vm_ops = driver_vm_ops;	//return -EAGAIN;	//activeMap++;	return 0;}//******** ioctl ********************int