?? stc12c2052.h
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/*STC12C2052 headfile*/
/*WANGBIN 2006-09-28*/
#ifndef __STC12C2052__
#define __STC12C2052__
//BIT ACCESSABLE
sfr P0 = 0x80; // xxxx 1111 -- -- -- -- P0_3 P0_2 P0_1 P0_0
sfr TCON = 0x88; // 0000 0000 TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
sfr P1 = 0x90; // 1111 1111 P1_7 P1_6 P1_5 P1_4 P1_3 P1_2 P1_1 P1_0
sfr SCON = 0x98; // 0000 0000 SM0 SM1 SM2 REN TB8 RB8 TI RI
sfr P2 = 0xA0; // 1111 1111 P2_7 P2_6 P2_5 P2_4 P2_3 P2_2 P2_1 P2_0
sfr IE = 0xA8; // 0000 0000 EA EPCA EADC ES ET1 EX1 ET0 EX0
sfr P3 = 0xB0; // 1x11 1111 P3_7 -- P3_5 P3_4 P3_3 P3_2 P3_1 P3_0
sfr IP = 0xB8; // x000 0000 -- PPCAL PADCL PSL PT1L PX1L PT0L PX0L
sfr PSW = 0xD0; // 0000 0000 CY AC F0 RS1 RS0 OV F1 P
sfr CCON = 0xD8; // 00xx 0000 CF CR -- -- CCF3 CCF2 CCF1 CCF0
sfr ACC = 0xE0; // 0000 0000 A_7 A_6 A_5 A_4 A_3 A_2 A_1 A_0
sfr B = 0xF0; // 0000 0000 B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
//NOT BIT ACCESSABLE
sfr SP = 0x81; // 0000 0111
sfr16 DPTR = 0x82; // 0000 0000 0000 0000
sfr DPL = 0x82; // 0000 0000
sfr DPH = 0x83; // 0000 0000
sfr SPSTAT = 0x84; // 00xx xxxx SPIF WCOL -- -- -- -- -- --
sfr SPCTL = 0x85; // 0000 0100
sfr SPDAT = 0x86; // 0000 0000
sfr PCON = 0x87; // 0011 0000 SMOD SMOD0 LVDF POF GF1 GF0 PD IDL
sfr TMOD = 0x89; // 0000 0000 GATE1 C/T1 M11 M10 GATE0 C/T0 M01 M00
sfr TL0 = 0x8A; // 0000 0000
sfr TL1 = 0x8B; // 0000 0000
sfr TH0 = 0x8C; // 0000 0000
sfr TH1 = 0x8D; // 0000 0000
sfr AUXR = 0x8E; // 0000 00xx T0x12 T1x12 M0x6 EADCI ESPI ELVDI -- --
sfr P1M0 = 0x91; // 0000 0000
sfr P1M1 = 0x92; // 0000 0000
sfr P0M0 = 0x93; // 0000 0000
sfr P0M1 = 0x94; // 0000 0000
sfr P2M0 = 0x95; // 0000 0000
sfr P2M1 = 0x96; // 0000 0000
sfr SBUF = 0x99; // xxxx xxxx
sfr SADDR = 0xA9; // 0000 0000
sfr TEST_WDT = 0xA7; //
sfr P3M0 = 0xB1; // 0000 0000
sfr P3M1 = 0xB2; // 0000 0000
sfr IPH = 0xB7; // x000 0000
sfr SADEN = 0xB9; //
sfr ADC_LOW2 = 0xBE; // 0000 0000
sfr ADC_CONTR = 0xC5; // 0000 0000
sfr ADC_DATA = 0xC6; // 0000 0000
sfr CLK_DIV = 0xC7; // xxxx x000 -- -- -- -- -- CLKS2 CLKS1 CLKS0
sfr CMOD = 0xD9; // 0xxx x000
sfr CCAPM0 = 0xDA; // x000 0000
sfr CCAPM1 = 0xDB; // x000 0000
sfr CCAPM2 = 0xDC; // x000 0000
sfr CCAPM3 = 0xDD; // x000 0000
sfr WDT_CONTR = 0xE1; // 0x00 0000 WDTF -- ENW CLRW IDLEW PS2 PS1 PS0
sfr ISP_DATA = 0xE2; // 1111 1111
sfr ISP_ADDRH = 0xE3; // 0000 0000
sfr ISP_ADDRL = 0xE4; // 0000 0000
sfr ISP_CMD = 0xE5; // xxxx xx00 00 Standby 待機模式，無ISP；01 讀字節；10 寫字節； 11 扇區擦除
sfr ISP_TRIG = 0xE6; // xxxx xxxx 觸發：先送 #0x46 (01000110) 再送 #0xB9 (11001001)
sfr ISP_CONTR = 0xE7; // 0000 1000 ISPEN SWBS SWRST FAIL 1 WT2 WT1 WT0
sfr CL = 0xE9; // 0000 0000
sfr CCAP0L = 0xEA; // 0000 0000
sfr CCAP1L = 0xEB; // 0000 0000
sfr CCAP2L = 0xEC; // 0000 0000
sfr CCAP3L = 0xED; // 0000 0000
sfr PCA_PWM0 = 0xF2; // xxxx xx00
sfr PCA_PWM1 = 0xF3; // xxxx xx00
sfr PCA_PWM2 = 0xF4; // xxxx xx00
sfr PCA_PWM3 = 0xF5; // xxxx xx00
sfr CH = 0xF9; // 0000 0000
sfr CCAP0H = 0xFA; // 0000 0000
sfr CCAP1H = 0xFB; // 0000 0000
sfr CCAP2H = 0xFC; // 0000 0000
sfr CCAP3H = 0xFD; // 0000 0000
//BIT ADDRESS DEFINE
sbit P0_3 = P0^3;
sbit P0_2 = P0^2;
sbit P0_1 = P0^1;
sbit P0_0 = P0^0;
//TCON: Timer CONtrol byte
//TF:Time overFlow 溢出時置位，查詢方式時軟件清0，中斷方式時硬件清0
//TR:Timer Run 定時器啟動位
//IE:Interrupt Execute 中斷正在執行位，硬件清0
//IT:Interrupt Trigger mode set 1:下降沿觸發；0：低電平觸發
//TCON: 0x88 TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
sbit TCON_TF1 = TCON^7;
sbit TCON_TR1 = TCON^6;
sbit TCON_TF0 = TCON^5;
sbit TCON_TR0 = TCON^4;
sbit TCON_IE1 = TCON^3;
sbit TCON_IT1 = TCON^2;
sbit TCON_IE0 = TCON^1;
sbit TCON_IT0 = TCON^0;
sbit P1_7 = P1^7;
sbit P1_6 = P1^6;
sbit P1_5 = P1^5;
sbit P1_4 = P1^4;
sbit P1_3 = P1^3;
sbit P1_2 = P1^2;
sbit P1_1 = P1^1;
sbit P1_0 = P1^0;
//SCON: Serial CONtrol byte
//SM:Serial Mode SM0,SM1 00方式0，01方式1，10方式2，11方式3 SM2：多機通訊位
//SM2用于方式2、3， SM2=1，則只有第9位數據RB8=1時，才將接收的8位DATA送入SBUF，并置位RI，否則丟棄8位DATA
// SM2=0，不考慮RB8，將接受數據送入SBUF，產生中斷
//REN:Receive ENable bit 接收使能位，置位使能
//TB8:Transmit Bit8 RB8:Receive Bit8
//TI:Transmit Interrupt flag bit RI:Receive Interrupt flag bit 接收完、發送完標志位，軟件清0
//SCON: 0x98 SM0 SM1 SM2 REN TB8 RB8 TI RI
sbit SCON_SM0 = SCON^7;
sbit SCON_SM1 = SCON^6;
sbit SCON_SM2 = SCON^5;
sbit SCON_REN = SCON^4;
sbit SCON_TB8 = SCON^3;
sbit SCON_RB8 = SCON^2;
sbit SCON_TI = SCON^1;
sbit SCON_RI = SCON^0;
sbit P2_7 = P2^7;
sbit P2_6 = P2^6;
sbit P2_5 = P2^5;
sbit P2_4 = P2^4;
sbit P2_3 = P2^3;
sbit P2_2 = P2^2;
sbit P2_1 = P2^1;
sbit P2_0 = P2^0;
//IE: Interrupt Enable byte
//EA:Enable All ES:Enable Serial ET:Enable Timer EX:Enable eXtern int
//IE: 0xA8 EA EPCA EADC ES ET1 EX1 ET0 EX0
sbit IE_EA = IE^7;
sbit IE_EPCA = IE^6;
sbit IE_EADC = IE^5;
sbit IE_ES = IE^4;
sbit IE_ET1 = IE^3;
sbit IE_EX1 = IE^2;
sbit IE_ET0 = IE^1;
sbit IE_EX0 = IE^0;
sbit P3_7 = P3^7;
sbit P3_6 = P3^6;
sbit P3_5 = P3^5;
sbit P3_4 = P3^4;
sbit P3_3 = P3^3;
sbit P3_2 = P3^2;
sbit P3_1 = P3^1;
sbit P3_0 = P3^0;
//IP: Interrupt Priority
//PS: Priority of Serial port PT:Priority of timer PX:Priority of eXternal interrupt
//IP: 0xB8 -- PPCA PADC PS PT1 PX1 PT0 PX0
sbit IP_PPCA = IP^6;
sbit IP_PADC = IP^5;
sbit IP_PS = IP^4;
sbit IP_PT1 = IP^3;
sbit IP_PX1 = IP^2;
sbit IP_PT0 = IP^1;
sbit IP_PX0 = IP^0;
//PSW: Program Status Word
//C:Carry bit H:Half carry bit F:user Flag bit RS:Register select bit
//OV:OVerflow bit P:Parity Check bit
//PSW: 0xD0 C H F0 RS1 RS0 OV F1 P
sbit PSW_C = PSW^7;
sbit PSW_H = PSW^6;
sbit PSW_F0 = PSW^5;
sbit PSW_RS1 = PSW^4;
sbit PSW_RS0 = PSW^3;
sbit PSW_OV = PSW^2;
sbit PSW_F1 = PSW^1;
sbit PSW_P = PSW^0;
//CCON: pCa COntrol Register
sbit CCON_CF = CCON^7;
sbit CCON_CR = CCON^6;
sbit CCON_CCF3 = CCON^3;
sbit CCON_CCF2 = CCON^2;
sbit CCON_CCF1 = CCON^1;
sbit CCON_CCF0 = CCON^0;
//ACC: ACCumulator
sbit ACC_7 = ACC^7;
sbit ACC_6 = ACC^6;
sbit ACC_5 = ACC^5;
sbit ACC_4 = ACC^4;
sbit ACC_3 = ACC^3;
sbit ACC_2 = ACC^2;
sbit ACC_1 = ACC^1;
sbit ACC_0 = ACC^0;
//B:
sbit B_7 = B^7;
sbit B_6 = B^6;
sbit B_5 = B^5;
sbit B_4 = B^4;
sbit B_3 = B^3;
sbit B_2 = B^2;
sbit B_1 = B^1;
sbit B_0 = B^0;
//cannot bit access registers ******************************************
//PCON:Power CONtrol byte 0x87 0xxx 0000
// PCON: SMOD -- -- -- GF1 GF0 PD IDL
// SMOD:波特率倍增位 GF:general flag bit
// PD:Power Down PD=0，停止振蕩，只有RAM和SFR中的值保留，唯一解除方法即硬件復位
// IDL：IDLe mode IDL=0，閑置模式，CPU被除能，硬件復位和中斷可解除
//TMOD:Timer MODe set byte 0x89 0000 0000
// TMOD: GATE1 C/T1 M11 M10 GATE0 C/T0 M01 M00
// GATE:GATE=0 不加INT0端影響，GATE=1 加INT0端影響
// CT：CT=0 timer,CT=1 Counter. M1 M0: 00模式0 01模式1 10模式2 11模式3
//BaudRate Expression(formula)******************************************
// SMOD
// 2 * fosc
//BaudRate = ----------------- (fosc為晶振頻率，12為12T模式下)
// 32*12*(256-TH)
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