REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_INT_CLK_THRESH,	      IX_ETH_ACC_MAC_INT_CLK_THRESH_DEFAULT);    REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_CORE_CNTRL,	      IX_ETH_ACC_CORE_MDC_EN);    return IX_ETH_ACC_SUCCESS;}IxEthAccStatusixEthAccPortLoopbackEnable(IxEthAccPortId portId){    UINT32 regval;    /* Turn off promiscuous mode */    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable loopback.\n",(INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /* read register */    REG_READ(ixEthAccMacBase[portId],	     IX_ETH_ACC_MAC_RX_CNTRL1,	     regval);    /* update register */    REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_RX_CNTRL1,	      regval | IX_ETH_ACC_RX_CNTRL1_LOOP_EN);    return IX_ETH_ACC_SUCCESS;}PRIVATE voidixEthAccNpeLoopbackMessageCallback (IxNpeMhNpeId npeId,				    IxNpeMhMessage msg){    IxEthAccPortId portId = IX_ETH_ACC_NPE_TO_PORT_ID(npeId);#ifndef NDEBUG    /* Prudent to at least check the port is within range */    if (portId >= IX_ETH_ACC_NUMBER_OF_PORTS)    {	IX_ETH_ACC_FATAL_LOG("IXETHACC:ixEthAccPortDisableMessageCallback: Illegal port: %u\n",            (UINT32) portId, 0, 0, 0, 0, 0);	return;    }#endif    /* unlock message reception mutex */    ixOsalMutexUnlock(&ixEthAccMacState[portId].npeLoopbackMessageLock);}IxEthAccStatusixEthAccNpeLoopbackEnablePriv(IxEthAccPortId portId){    IX_STATUS npeMhStatus;    IxNpeMhMessage message;    IxEthAccStatus status = IX_ETH_ACC_SUCCESS;    /* Turn off promiscuous mode */    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable NPE loopback.\n",(INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /* enable NPE loopback (lsb of the message contains the value 1) */    message.data[0] = (IX_ETHNPE_SETLOOPBACK_MODE << IX_ETH_ACC_MAC_MSGID_SHL)	| 0x01;    message.data[1] = 0;    npeMhStatus = ixNpeMhMessageWithResponseSend(IX_ETH_ACC_PORT_TO_NPE_ID(portId),		message,		IX_ETHNPE_SETLOOPBACK_MODE_ACK,		ixEthAccNpeLoopbackMessageCallback,		IX_NPEMH_SEND_RETRIES_DEFAULT);    if (npeMhStatus != IX_SUCCESS)    {        status = IX_ETH_ACC_FAIL;    }    else    {	/* wait for NPE loopbackEnable response */        if (ixOsalMutexLock(&ixEthAccMacState[portId]. npeLoopbackMessageLock,			    IX_ETH_ACC_PORT_DISABLE_DELAY_MSECS)	    != IX_SUCCESS)        {            status = IX_ETH_ACC_FAIL;        }    }    return status;}IxEthAccStatusixEthAccPortTxEnablePriv(IxEthAccPortId portId){    UINT32 regval;    /* Turn off promiscuous mode */    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable TX.\n",(INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /* read register */    REG_READ(ixEthAccMacBase[portId],	     IX_ETH_ACC_MAC_TX_CNTRL1,	     regval);    /* update register */    REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_TX_CNTRL1,	      regval | IX_ETH_ACC_TX_CNTRL1_TX_EN);    return IX_ETH_ACC_SUCCESS;}IxEthAccStatusixEthAccPortRxEnablePriv(IxEthAccPortId portId){    UINT32 regval;    /* Turn off promiscuous mode */    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable RX.\n",(INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /* read register */    REG_READ(ixEthAccMacBase[portId],	     IX_ETH_ACC_MAC_RX_CNTRL1,	     regval);    /* update register */    REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_RX_CNTRL1,	      regval | IX_ETH_ACC_RX_CNTRL1_RX_EN);    return IX_ETH_ACC_SUCCESS;}IxEthAccStatusixEthAccPortLoopbackDisable(IxEthAccPortId portId){    UINT32 regval;    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot disable loopback.\n",(INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /*disable MAC loopabck */    REG_READ(ixEthAccMacBase[portId],	     IX_ETH_ACC_MAC_RX_CNTRL1,	     regval);    REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_RX_CNTRL1,	      (regval & ~IX_ETH_ACC_RX_CNTRL1_LOOP_EN));    return IX_ETH_ACC_SUCCESS;}IxEthAccStatusixEthAccNpeLoopbackDisablePriv(IxEthAccPortId portId){    IX_STATUS npeMhStatus;    IxNpeMhMessage message;    IxEthAccStatus status = IX_ETH_ACC_SUCCESS;    /* Turn off promiscuous mode */    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable NPE loopback.\n",(INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /* disable NPE loopback (lsb of the message contains the value 0) */    message.data[0] = (IX_ETHNPE_SETLOOPBACK_MODE << IX_ETH_ACC_MAC_MSGID_SHL);    message.data[1] = 0;    npeMhStatus = ixNpeMhMessageWithResponseSend(IX_ETH_ACC_PORT_TO_NPE_ID(portId),		message,		IX_ETHNPE_SETLOOPBACK_MODE_ACK,		ixEthAccNpeLoopbackMessageCallback,		IX_NPEMH_SEND_RETRIES_DEFAULT);    if (npeMhStatus != IX_SUCCESS)    {        status = IX_ETH_ACC_FAIL;    }    else    {	/* wait for NPE loopbackEnable response */        if (ixOsalMutexLock(&ixEthAccMacState[portId].npeLoopbackMessageLock,			    IX_ETH_ACC_PORT_DISABLE_DELAY_MSECS)	    != IX_SUCCESS)        {            status = IX_ETH_ACC_FAIL;        }    }    return status;}IxEthAccStatusixEthAccPortTxDisablePriv(IxEthAccPortId portId){    UINT32 regval;    /* Turn off promiscuous mode */    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot disable TX.\n", (INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /* read register */    REG_READ(ixEthAccMacBase[portId],	     IX_ETH_ACC_MAC_TX_CNTRL1,	     regval);    /* update register */    REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_TX_CNTRL1,	      (regval & ~IX_ETH_ACC_TX_CNTRL1_TX_EN));    return IX_ETH_ACC_SUCCESS;}IxEthAccStatusixEthAccPortRxDisablePriv(IxEthAccPortId portId){    UINT32 regval;    /* Turn off promiscuous mode */    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot disable RX.\n", (INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /* read register */    REG_READ(ixEthAccMacBase[portId],	     IX_ETH_ACC_MAC_RX_CNTRL1,	     regval);    /* update register */    REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_RX_CNTRL1,	      (regval & ~IX_ETH_ACC_RX_CNTRL1_RX_EN));    return IX_ETH_ACC_SUCCESS;}IxEthAccStatusixEthAccPortPromiscuousModeClearPriv(IxEthAccPortId portId){    UINT32 regval;    /* Turn off promiscuous mode */    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot clear promiscuous mode.\n",(INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /*set bit 5 of Rx control 1 - enable address filtering*/    REG_READ(ixEthAccMacBase[portId],	     IX_ETH_ACC_MAC_RX_CNTRL1,	     regval);    REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_RX_CNTRL1,	      regval | IX_ETH_ACC_RX_CNTRL1_ADDR_FLTR_EN);    ixEthAccMacState[portId].promiscuous = FALSE;    ixEthAccMulticastAddressSet(portId);    return IX_ETH_ACC_SUCCESS;}IxEthAccStatusixEthAccPortPromiscuousModeSetPriv(IxEthAccPortId portId){    UINT32 regval;    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot set promiscuous mode.\n",(INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    /*     * Set bit 5 of Rx control 1 - We enable address filtering even in     * promiscuous mode because we want the MAC to set the appropriate     * bits in m_flags which doesn't happen if we turn off filtering.     */    REG_READ(ixEthAccMacBase[portId],	     IX_ETH_ACC_MAC_RX_CNTRL1,	     regval);    REG_WRITE(ixEthAccMacBase[portId],	      IX_ETH_ACC_MAC_RX_CNTRL1,	      regval | IX_ETH_ACC_RX_CNTRL1_ADDR_FLTR_EN);    ixEthAccMacState[portId].promiscuous = TRUE;    ixEthAccMulticastAddressSet(portId);    return IX_ETH_ACC_SUCCESS;}IxEthAccStatusixEthAccPortUnicastMacAddressSetPriv (IxEthAccPortId portId,				  IxEthAccMacAddr *macAddr){    UINT32 i;    IX_ETH_ACC_VALIDATE_PORT_ID(portId);    if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))    {        IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot set Unicast Mac Address.\n",(INT32)portId,0,0,0,0,0);        return IX_ETH_ACC_SUCCESS ;    }    if (!IX_ETH_IS_PORT_INITIALIZED(portId))    {	return (IX_ETH_ACC_PORT_UNINITIALIZED);    }    if (macAddr == NULL)    {	return IX_ETH_ACC_FAIL;    }    if ( macAddr->macAddress[0] & IX_ETH_ACC_ETH_MAC_BCAST_MCAST_BIT )    {	/* This is a multicast/broadcast address cant set it ! */	return IX_ETH_ACC_FAIL;    }    if ( macAddr->macAddress[0] == 0 &&	 macAddr->macAddress[1] == 0 &&	 macAddr->macAddress[2] == 0 &&	 macAddr->macAddress[3] == 0 &&	 macAddr->macAddress[4] == 0 &&	 macAddr->macAddress[5] == 0  )    {	/* This is an invalid mac address cant set it ! */	return IX_ETH_ACC_FAIL;    }#ifdef CONFIG_IXP425_COMPONENT_ETHDB    /* update the MAC address in the ethernet database */    if (ixEthDBPortAddressSet(portId, (IxEthDBMacAddr *) macAddr) != IX_ETH_DB_SUCCESS)    {        return IX_ETH_ACC_FAIL;    }#endif    /*Set the Unicast MAC to the specified value*/    for(i=0;i<IX_IEEE803_MAC_ADDRESS_SIZE;i++)    {	REG_WRITE(ixEthAccMacBase[portId],		  IX_ETH_ACC_MAC_UNI_ADDR_1 + i*sizeof(UINT32),		  macAddr->macAddress[i]);    }    ixEthAccMacState[portId].initDone = TRUE;    return IX_ETH_ACC_SUCCESS;}