?? cfw.c
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s2440INT->rINTSUBMSK &= ~INTSUB_RXD2;
s2440INT->rINTSUBMSK &= ~INTSUB_TXD2;
s2440INT->rINTSUBMSK &= ~INTSUB_ERR2;
s2440INT->rSRCPND = BIT_UART2;
// S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
if (s2440INT->rINTPND & BIT_UART2) s2440INT->rINTPND = BIT_UART2;
s2440INT->rINTMSK &= ~BIT_UART2;
break;
// update audio old ;;; SHL
// case SYSINTR_AUDIO: // Audio controller (the controller uses both DMA1 and DMA2 interrupts).
// // DMA1 (input).
// //
// s2440INT->rSRCPND = BIT_DMA1;
// // S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
// if (s2440INT->rINTPND & BIT_DMA1) s2440INT->rINTPND = BIT_DMA1;
// s2440INT->rINTMSK &= ~BIT_DMA1;
// // DMA2 (output).
// //
// s2440INT->rSRCPND = BIT_DMA2;
// // S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
// if (s2440INT->rINTPND & BIT_DMA2) s2440INT->rINTPND = BIT_DMA2;
// s2440INT->rINTMSK &= ~BIT_DMA2;
// break;
// update audio bug.
case SYSINTR_AUDIO: // Audio controller (the controller uses both DMA1 and DMA2 interrupts).
// DMA1 (input).
//
s2440INT->rINTMSK &= ~BIT_DMA1;
// DMA2 (output).
s2440INT->rINTMSK &= ~BIT_DMA2;
break;
case SYSINTR_ADC:
//return(FALSE);
break;
case SYSINTR_PCMCIA_LEVEL: // PCMCIA data on EINT8.
s2440INT->rINTMSK &= ~BIT_EINT8_23;
//s2440INT->rSRCPND = BIT_EINT8_23;
//s2440INT->rINTPND = BIT_EINT8_23;
s2440IOP->rEINTMASK &= ~0x100;
//s2440IOP->rEINTPEND = 0x100;
//RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_LEVEL OEMInterruptEnable\r\n")));
break;
case SYSINTR_PCMCIA_EDGE:
//return(FALSE);
break;
case SYSINTR_PCMCIA_STATE: // PCMCIA insertion interrupt.
s2440INT->rSRCPND = BIT_EINT3; // to clear the previous pending states
// S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
if (s2440INT->rINTPND & BIT_EINT3) s2440INT->rINTPND = BIT_EINT3;
s2440INT->rINTMSK &= ~BIT_EINT3;
//RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_STATE OEMInterruptEnable\r\n")));
break;
case SYSINTR_TIMING:
//return(FALSE);
break;
case SYSINTR_ETHER: // Ethernet on EINT9.
s2440IOP->rEINTPEND = 0x80;
s2440IOP->rEINTMASK &= ~0x80;
//s2440INT->rSRCPND = BIT_EINT8_23; // by shim
// S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
if (s2440INT->rINTPND & BIT_EINT4_7) s2440INT->rINTPND = BIT_EINT4_7;
s2440INT->rINTMSK &= ~BIT_EINT4_7;
//RETAILMSG(1,(TEXT("::: SYSINTR_ETHER OEMInterruptEnable\r\n")));
break;
#if 0
case SYSINTR_USB:
// USB host interrupt enable bit. by hjcho
s2440INT->rINTMSK &= ~BIT_USBH;
break;
case SYSINTR_USBD:
s2440INT->rINTMSK &= ~BIT_USBD;
//RETAILMSG(1,(TEXT("::: SYSINTR_USBD OEMInterruptEnable\r\n")));
break;
#else
case SYSINTR_USB: // USB host.
s2440INT->rSRCPND = BIT_USBH;
// S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
if (s2440INT->rINTPND & BIT_USBH) s2440INT->rINTPND = BIT_USBH;
s2440INT->rINTMSK &= ~BIT_USBH;
break;
case SYSINTR_USBD:
s2440INT->rSRCPND = BIT_USBD;
// S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
if (s2440INT->rINTPND & BIT_USBD) s2440INT->rINTPND = BIT_USBD;
s2440INT->rINTMSK &= ~BIT_USBD;
RETAILMSG(1, (TEXT("USB enable interrutp\r\n")));
break;
#endif
case SYSINTR_POWER:
s2440INT->rSRCPND = BIT_EINT0;
// S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
if (s2440INT->rINTPND & BIT_EINT0) s2440INT->rINTPND = BIT_EINT0;
s2440INT->rINTMSK &= ~BIT_EINT0;
s2440INT->rSRCPND = BIT_EINT2;
// S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
if (s2440INT->rINTPND & BIT_EINT2) s2440INT->rINTPND = BIT_EINT2;
s2440INT->rINTMSK &= ~BIT_EINT2;
break;
case SYSINTR_CAM:
s2440INT->rINTSUBMSK &= ~(BIT_SUB_CAM_P | BIT_SUB_CAM_C);
s2440INT->rINTMSK &= ~BIT_CAM;
break;
case SYSINTR_IIC:
s2440INT->rINTMSK &= ~BIT_IIC;
break;
default:
bRet = FALSE; /* unsupported interrupt value */
//return(FALSE);
break;
}
INTERRUPTS_ON();
return bRet;
//return(TRUE);
}
//------------------------------------------------------------------------------
//
// @func BOOL | OEMInterruptDisable | Disable a hardware interrupt
// @rdesc none
// @comm OEMInterruptDisable is called by the Kernel when a device driver
// calls <f InterruptDisable>. The system is not preemtible when this
// function is called.
// @xref <l Overview.Windows CE Kernel OEM Interface> <f InterruptDisable>
//
//------------------------------------------------------------------------------
void
OEMInterruptDisable(DWORD idInt) // @parm Interrupt ID to be disabled. See <t Interrupt ID's>
// for the list of possible values.
{
volatile INTreg *s2440INT = (INTreg *)INT_BASE;
volatile IOPreg *s2440IOP = (IOPreg *)IOP_BASE;
volatile MMCreg *s2440SDIO = (MMCreg *)MMC_BACE;
INTERRUPTS_OFF();
switch (idInt)
{
case SYSINTR_BREAK: // There is no halt button on P2.
break;
case SYSINTR_DMA0:
s2440INT->rINTMSK |= BIT_DMA0; // SDIO DMA interrupt
//RETAILMSG(1,(TEXT("::: SYSINTR_DMA0 OEMInterruptDisable\r\n")));
break;
case SYSINTR_SDMMC:
s2440INT->rINTMSK |= BIT_MMC;
//RETAILMSG(1,(TEXT("::: SYSINTR_SDMMC OEMInterruptDisable\r\n")));
break;
case SYSINTR_SDMMC_SDIO_INTERRUPT:
s2440INT->rINTMSK |= BIT_MMC;
s2440SDIO->rSDIINTMSK &= ~(0x1<<12); // interrupt from SDIO card
//RETAILMSG(1,(TEXT("::: SYSINTR_SDMMC_SDIO_INTERRUPT OEMInterruptDisable\r\n")));
break;
case SYSINTR_SDMMC_CARD_DETECT:
#if SDIO_FOR_100BD // for b'd revision 1.00
s2440IOP->rEINTMASK |= (1 << 18);
#else // for b'd revision 0.17
s2440IOP->rEINTMASK |= (1 << 16);
#endif
s2440INT->rINTMSK |= BIT_EINT8_23;
//RETAILMSG(1,(TEXT("::: SYSINTR_SDMMC_CARD_DETECT OEMInterruptDisable\r\n")));
break;
case SYSINTR_TOUCH:
break;
case SYSINTR_TOUCH_CHANGED:
s2440INT->rINTMSK |= BIT_ADC;
s2440INT->rINTSUBMSK |= INTSUB_TC;
break;
case SYSINTR_KEYBOARD:
s2440INT->rINTMSK |= BIT_EINT1;
break;
case SYSINTR_SERIAL:
s2440INT->rINTMSK |= BIT_UART0;
s2440INT->rINTSUBMSK |= INTSUB_RXD0;
s2440INT->rINTSUBMSK |= INTSUB_TXD0;
s2440INT->rINTSUBMSK |= INTSUB_ERR0;
break;
case SYSINTR_SERIAL2:
s2440INT->rINTMSK |= BIT_UART1;
s2440INT->rINTSUBMSK |= INTSUB_RXD1;
s2440INT->rINTSUBMSK |= INTSUB_TXD1;
s2440INT->rINTSUBMSK |= INTSUB_ERR1;
break;
case SYSINTR_SERIAL3:
s2440INT->rINTMSK |= BIT_UART2;
s2440INT->rINTSUBMSK |= INTSUB_RXD2;
s2440INT->rINTSUBMSK |= INTSUB_TXD2;
s2440INT->rINTSUBMSK |= INTSUB_ERR2;
break;
case SYSINTR_AUDIO:
s2440INT->rINTMSK |= BIT_DMA1; // Audio input DMA.
s2440INT->rINTMSK |= BIT_DMA2; // Audio output DMA.
break;
case SYSINTR_ADC:
break;
case SYSINTR_PCMCIA_LEVEL:
s2440IOP->rEINTMASK |= 0x100;
s2440INT->rINTMSK |= BIT_EINT8_23;
//RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_LEVEL OEMInterruptDisable\r\n")));
break;
case SYSINTR_PCMCIA_EDGE:
break;
case SYSINTR_PCMCIA_STATE:
s2440INT->rINTMSK |= BIT_EINT3;
//RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_STATE OEMInterruptDisable\r\n")));
break;
case SYSINTR_ETHER:
s2440INT->rINTMSK |= BIT_EINT4_7;
s2440IOP->rEINTMASK |= 0x80;
//RETAILMSG(1,(TEXT("::: SYSINTR_ETHER OEMInterruptDisable\r\n")));
break;
case SYSINTR_USB:
s2440INT->rINTMSK |= BIT_USBH;
break;
case SYSINTR_USBD:
s2440INT->rINTMSK |= BIT_USBD;
//RETAILMSG(1,(TEXT("::: SYSINTR_USBD OEMInterruptDisable\r\n")));
break;
case SYSINTR_POWER:
s2440INT->rINTMSK |= BIT_EINT0;
s2440INT->rINTMSK |= BIT_EINT2;
break;
case SYSINTR_CAM:
s2440INT->rINTMSK |= BIT_CAM;
s2440INT->rINTSUBMSK |= (INTSUB_CAM_P | INTSUB_CAM_C);
break;
case SYSINTR_IIC:
s2440INT->rINTMSK |= BIT_IIC;
break;
default:
break;
}
INTERRUPTS_ON();
}
//------------------------------------------------------------------------------
//
// @func BOOL | OEMInterruptDone | Signal completion of interrupt processing
// @rdesc none
// @comm OEMInterruptDone is called by the Kernel when a device driver
// calls <f InterruptDone>. The system is not preemtible when this
// function is called.
// @xref <l Overview.Kernel Interrupt Support> <f InterruptDone>
//
//------------------------------------------------------------------------------
void
OEMInterruptDone(DWORD idInt) // @parm Interrupt ID. See <t Interrupt ID's>
// for the list of possible values.
{
volatile INTreg *s2440INT = (INTreg *)INT_BASE;
volatile IOPreg *s2440IOP = (IOPreg *)IOP_BASE;
INTERRUPTS_OFF();
switch (idInt)
{
case SYSINTR_DMA0:
s2440INT->rINTMSK &= ~BIT_DMA0; // SDIO DMA interrupt
//RETAILMSG(1,(TEXT("::: SYSINTR_DMA0 OEMInterruptDone\r\n")));
break;
case SYSINTR_SDMMC:
s2440INT->rINTMSK &= ~BIT_MMC;
//RETAILMSG(1,(TEXT("::: SYSINTR_SDMMC OEMInterruptDone\r\n")));
break;
case SYSINTR_SDMMC_SDIO_INTERRUPT:
s2440INT->rINTMSK &= ~BIT_MMC;
//RETAILMSG(1,(TEXT("::: SYSINTR_SDMMC_SDIO_INTERRUPT OEMInterruptDone\r\n")));
break;
case SYSINTR_SDMMC_CARD_DETECT:
#if SDIO_FOR_100BD // for b'd revision 1.00
s2440IOP->rEINTPEND = (1<<18);
s2440IOP->rEINTMASK &= ~(1 << 18);
//RETAILMSG(1,(TEXT("::: SYSINTR_SDMMC_CARD_DETECT OEMInterruptDone\r\n")));
#else // for b'd revision 0.17
s2440IOP->rEINTPEND = (1<<16);
s2440IOP->rEINTMASK &= ~(1 << 16);
#endif
s2440INT->rINTMSK &= ~BIT_EINT8_23;
break;
case SYSINTR_TOUCH:
/*
* Nothing has to be done here as interrupts are masked and unmasked by the touch
* handler in the HAL.
*/
s2440INT->rINTMSK &= ~BIT_TIMER1;
break;
case SYSINTR_TOUCH_CHANGED:
/*
* Nothing has to be done here as interrupts are masked and unmasked by the touch
* handler in the HAL.
*/
s2440INT->rINTMSK &= ~BIT_ADC;
s2440INT->rINTSUBMSK &= ~INTSUB_TC;
//RETAILMSG(0,(TEXT("OEMInterruptDone:TOUCH CHANGED\n\r\n")));
break;
case SYSINTR_KEYBOARD:
s2440INT->rINTMSK &= ~BIT_EINT1;
break;
case SYSINTR_SERIAL:
s2440INT->rINTMSK &= ~BIT_UART0;
s2440INT->rINTSUBMSK &= ~INTSUB_RXD0;
break;
case SYSINTR_SERIAL2:
s2440INT->rINTMSK &= ~BIT_UART1;
s2440INT->rINTSUBMSK &= ~INTSUB_RXD1;
break;
case SYSINTR_SERIAL3:
s2440INT->rINTMSK &= ~BIT_UART2;
s2440INT->rINTSUBMSK &= ~INTSUB_RXD2;
break;
case SYSINTR_AUDIO:
// DMA1 is for audio input.
// DMA2 is for audio output.
s2440INT->rSRCPND = (BIT_DMA1 | BIT_DMA2);
if (s2440INT->rINTPND & BIT_DMA1) s2440INT->rINTPND = BIT_DMA1;
if (s2440INT->rINTPND & BIT_DMA2) s2440INT->rINTPND = BIT_DMA2;
s2440INT->rINTMSK &= ~BIT_DMA1;
s2440INT->rINTMSK &= ~BIT_DMA2;
break;
case SYSINTR_ADC:
break;
case SYSINTR_PCMCIA_LEVEL:
s2440INT->rSRCPND = BIT_EINT8_23;
if (s2440INT->rINTPND & BIT_EINT8_23) s2440INT->rINTPND = BIT_EINT8_23;
s2440INT->rINTMSK &= ~BIT_EINT8_23;
s2440IOP->rEINTMASK &= ~(1<<8);
//RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_LEVEL OEMInterruptDone\r\n")));
break;
case SYSINTR_PCMCIA_EDGE:
//RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_EDGE OEMInterruptDone\r\n")));
break;
case SYSINTR_PCMCIA_STATE:
s2440INT->rINTMSK &= ~BIT_EINT3;
//RETAILMSG(1,(TEXT("::: SYSINTR_PCMCIA_STATE OEMInterruptDone\r\n")));
break;
case SYSINTR_ETHER:
s2440INT->rINTMSK &= ~BIT_EINT4_7;
s2440IOP->rEINTMASK &= ~0x80;
//RETAILMSG(1, (TEXT("::: SYSINTR_USBD OEMInterruptDone\r\n")));
break;
case SYSINTR_USB:
s2440INT->rINTMSK &= ~BIT_USBH;
break;
case SYSINTR_USBD:
s2440INT->rINTMSK &= ~BIT_USBD;
//RETAILMSG(1,(TEXT("::: SYSINTR_USBD OEMInterruptDone\r\n")));
break;
case SYSINTR_POWER:
s2440INT->rSRCPND = BIT_EINT0;
// S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
if (s2440INT->rINTPND & BIT_EINT0) s2440INT->rINTPND = BIT_EINT0;
s2440INT->rINTMSK &= ~BIT_EINT0;
s2440INT->rSRCPND = BIT_EINT2;
// S3C2440X Developer Notice (page 4) warns against writing a 1 to a 0 bit in the INTPND register.
if (s2440INT->rINTPND & BIT_EINT2) s2440INT->rINTPND = BIT_EINT2;
s2440INT->rINTMSK &= ~BIT_EINT2;
break;
case SYSINTR_CAM:
s2440INT->rSUBSRCPND = INTSUB_CAM_P;
s2440INT->rSUBSRCPND = INTSUB_CAM_C;
s2440INT->rSRCPND = BIT_CAM;
if (s2440INT->rINTPND & BIT_CAM)
{
s2440INT->rINTPND = BIT_CAM;
}
s2440INT->rINTSUBMSK &= ~(INTSUB_CAM_P | INTSUB_CAM_C);
s2440INT->rINTMSK &= ~BIT_CAM;
break;
case SYSINTR_IIC:
s2440INT->rINTMSK &= ~BIT_IIC;
break;
}
INTERRUPTS_ON();
}
//------------------------------------------------------------------------------
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