//###########################################################################
//
// FILE:	main.c
//
//###########################################################################
//
// Ver | dd mmm yyyy | Who  | Description of changes
// 
//
//###########################################################################
#include "registers.h"

#define BOOLEAN 	unsigned char  			
#define INT8U   	unsigned char  			
#define INT8S   	  signed char  			
#define INTOS		unsigned int				/* the smallest unit int the cpu	*/
#define INT16U  	unsigned int			
#define INT16S  	  signed int 			
#define INT32U  	unsigned long  			
#define INT32S  	  signed long    

extern void sInitialDSP(void);

#define RunInFlash

const struct PIE_VECT_TABLE PieVectTableInit = {

      PIE_RESERVED,  // Reserved space
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   


// Non-Peripheral Interrupts
      PIE_RESERVED,     // XINT13 or CPU-Timer 1
      PIE_RESERVED,     // CPU-Timer2
      PIE_RESERVED,   // Datalogging interrupt
      PIE_RESERVED,   // RTOS interrupt
      PIE_RESERVED,    // Emulation interrupt
      PIE_RESERVED,       // Non-maskable interrupt
      PIE_RESERVED,   // Illegal operation TRAP
      PIE_RESERVED,     // User Defined trap 0
      PIE_RESERVED,     // User Defined trap 1
      PIE_RESERVED,     // User Defined trap 2
      PIE_RESERVED,     // User Defined trap 3
      PIE_RESERVED,     // User Defined trap 4
      PIE_RESERVED,     // User Defined trap 5
      PIE_RESERVED,     // User Defined trap 6
      PIE_RESERVED,     // User Defined trap 7
      PIE_RESERVED,     // User Defined trap 8
      PIE_RESERVED,     // User Defined trap 9
      PIE_RESERVED,    // User Defined trap 10
      PIE_RESERVED,    // User Defined trap 11
      //lg/030905 OSCtxSw,       // lg/030801 use trap #31 for OS task switch

// Group 1 PIE Vectors
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,
      PIE_RESERVED,     
      PIE_RESERVED,
      PIE_RESERVED,    // ADC
      PIE_RESERVED,     // Timer 0
      PIE_RESERVED,   // WD

// Group 2 PIE Vectors
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,    // EV-A
      PIE_RESERVED,    // EV-A
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,
      
// Group 3 PIE Vectors
      PIE_RESERVED,    // EV-A
      PIE_RESERVED,    // EV-A
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,   // EV-A
      PIE_RESERVED,
      
// Group 4 PIE Vectors
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,    // EV-B
      PIE_RESERVED,    // EV-B
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,      
     
// Group 5 PIE Vectors
      PIE_RESERVED,    // EV-B
      PIE_RESERVED,    // EV-B
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,   // EV-B
      PIE_RESERVED,      

// Group 6 PIE Vectors
      PIE_RESERVED,   // SPI-A
      PIE_RESERVED,   // SPI-A
      PIE_RESERVED,
      PIE_RESERVED,
      PIE_RESERVED,    // McBSP-A
      PIE_RESERVED,    // McBSP-A
      PIE_RESERVED,
      PIE_RESERVED,
      
// Group 7 PIE Vectors
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   

// Group 8 PIE Vectors
      PIE_RESERVED,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      
// Group 9 PIE Vectors     
      PIE_RESERVED, // SCI-A
      PIE_RESERVED, // SCI-A
      PIE_RESERVED, // SCI-B
      PIE_RESERVED, // SCI-B
      PIE_RESERVED, // eCAN
      PIE_RESERVED, // eCAN
      rsvd_ISR,   
      rsvd_ISR,   
      
// Group 10 PIE Vectors
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
            
// Group 11 PIE Vectors
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   

// Group 12 PIE Vectors
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
};

INT16U wInputModule;
INT16U wOutputModule;

// Functions that will be run from RAM need to be assigned to 
// a different section.  This section will then be mapped using
// the linker cmd file.
#pragma CODE_SECTION(sInitFlash, "ramfuncs");

// Information on the location of functions that are going
// to be relocated to RAM
#define RAM_FUNC_LOAD   0x3EC000    // Source location in Flash
#define RAM_FUNC_LENGTH 0x001000    // Number of 32-bit values to copy 2000(1000*2)
#define RAM_FUNC_RUN	0x008000

void	sInitSysCtrl(void);
void	sInitFlash(void);
void	sInitAdc(void);
void	sInitGpio(void);
void	sInitPieCtrl(void);
void	sInitPieVectTable(void);
void	sInitEV(void);	
void	sInitSCI(void);
void	sInitSPI(void);
void	sInitEXINTF(void);
//void	sInitCAN(void);
void    sADCalibration(void);
void    DelayUs(volatile unsigned int);			//function prototype
//void	sInitEXTIO(void);
INT16S swGetwADCOffsetA();
INT16S swGetwADCCoefA();
INT16S swGetwREF125A();
INT16S swGetwREF250A();
INT16S 	wREF125A;
INT16S 	wREF250A;

interrupt void PIE_RESERVED(void)  // Reserved space.  For test.
{
  asm ("      ESTOP0");
  for(;;);
}

interrupt void rsvd_ISR(void)          // for test
{
  asm ("      ESTOP0");
  for(;;);
}

void	sInitialDSP(void)
{
    unsigned long * pSourceAddr;
    unsigned long * pDestAddr;
    unsigned int i;
	
// Step 1. Initialize System Control registers, PLL, WatchDog, Clocks to default state:
        
	sInitSysCtrl();

	// Disable and clear all CPU interrupts:
	DINT;
	IER = 0x0000;
	IFR = 0x0000;

	// Initialize Pie Control Registers To Default State:
        // This function is found in the DSP28_PieCtrl.c file.
	sInitPieCtrl();

	// Initialize the PIE Vector Table To a Known State:
        // This function is found in DSP28_PieVect.c.
	// This function populates the PIE vector table with pointers
        // to the shell ISR functions found in DSP28_DefaultIsr.c.
	sInitPieVectTable();	

	//=======================Run in Flash=======================
#ifdef RunInFlash
	pSourceAddr = (unsigned long *)RAM_FUNC_LOAD;
	pDestAddr = (unsigned long *)RAM_FUNC_RUN;
	for(i = 0; i < RAM_FUNC_LENGTH; i++)
	{
	    *pDestAddr++ = *pSourceAddr++;
	}
	
	sInitFlash();
	
#endif

// Step 2. Initialize Event Manager registers for the specific application

	
	sInitEV();

// Step 3. Initialize AD registers
	
	sInitAdc();

// Step 4. Select GPIO for the device or for the specific application:

	sInitGpio();

// Step 5. Initialize SCI registers

	sInitSCI();
	
// Step 6. Initialize CAN registers

	//sInitCAN();

// Step 7. Initialize SPI registers
	
	sInitSPI();

// Step 8. Initialize PIE vector table:
	// The PIE vector table is initialized with pointers to shell Interrupt 
        // Service Routines (ISR).  The shell routines are found in DSP28_DefaultIsr.c.
	// Insert user specific ISR code in the appropriate shell ISR routine in 
        // the DSP28_DefaultIsr.c file.
 

	// enable EXT Interrupt 2 and Detect on rising edge
	XIntruptRegs.XINT2CR.all = 5;
	
// Step 9. Initialize extern IO
//	sInitEXTIO();	
	// Disable and clear all CPU interrupts:
	DINT;
	IER = 0x0000;
	IFR = 0x0000;
    	
    	//Enbale PIE group 1 interrupt 5 for XINT2 
    	
    	PieCtrlRegs.PIEIER1.bit.INTx5 =1;
    	
    // Enable PIE group 2 interrupt 4 for T1PINT,interrupt 6 for T1UFINT
    PieCtrlRegs.PIEIER2.bit.INTx4=1;
    PieCtrlRegs.PIEIER2.bit.INTx6=1;

    // Enalbe PIE group 3 interrupt 2 for T2CINT
//    PieCtrlRegs.PIEIER3.bit.INTx2=1;
    PieCtrlRegs.PIEIER3.bit.INTx5=1;
    PieCtrlRegs.PIEIER3.bit.INTx6=1;
    PieCtrlRegs.PIEIER3.bit.INTx7=1;
    
    PieCtrlRegs.PIEIER5.bit.INTx2=1;
    // Enable PIE group 5 interrupt 4,5,6 for CAPINT4,5,6
    PieCtrlRegs.PIEIER5.bit.INTx5=1;
    PieCtrlRegs.PIEIER5.bit.INTx6=1;
    PieCtrlRegs.PIEIER5.bit.INTx7=1;


    // Enable PIE group 9 interrupt 1 for SCIRXINTA, 5 for ECAN0INT,6 for ECAN1INT
    PieCtrlRegs.PIEIER9.bit.INTx1=1;