if ((Mode & (SK_BIG_PK_OK_ON | SK_BIG_PK_OK_OFF)) != 0) {		GM_IN16(IoC, Port, GM_SERIAL_MODE, &OldRxCmd);		RxCmd = OldRxCmd;		if ((Mode & SK_BIG_PK_OK_ON) != 0) {			RxCmd |= GM_SMOD_JUMBO_ENA;		}		else {			RxCmd &= ~GM_SMOD_JUMBO_ENA;		}		/* Write the new mode to the Rx control register if required */		if (OldRxCmd != RxCmd) {			GM_OUT16(IoC, Port, GM_SERIAL_MODE, RxCmd);		}	}}	/* SkGmSetRxCmd *//****************************************************************************** * *	SkMacSetRxCmd() - Modify the value of the MAC's Rx Control Register * * Description:	modifies the MAC's Rx Control reg. dep. on board type * * Returns: *	nothing */void SkMacSetRxCmd(SK_AC	*pAC,		/* adapter context */SK_IOC	IoC,		/* IO context */int		Port,		/* Port Index (MAC_1 + n) */int		Mode)		/* Rx Mode */{	if (pAC->GIni.GIGenesis) {		SkXmSetRxCmd(pAC, IoC, Port, Mode);	}	else {		SkGmSetRxCmd(pAC, IoC, Port, Mode);	}}	/* SkMacSetRxCmd *//****************************************************************************** * *	SkMacCrcGener() - Enable / Disable CRC Generation * * Description:	enables / disables CRC generation dep. on board type * * Returns: *	nothing */void SkMacCrcGener(SK_AC	*pAC,	/* adapter context */SK_IOC	IoC,	/* IO context */int		Port,	/* Port Index (MAC_1 + n) */SK_BOOL	Enable)	/* Enable / Disable */{	SK_U16	Word;	if (pAC->GIni.GIGenesis) {		XM_IN16(IoC, Port, XM_TX_CMD, &Word);		if (Enable) {			Word &= ~XM_TX_NO_CRC;		}		else {			Word |= XM_TX_NO_CRC;		}		/* setup Tx Command Register */		XM_OUT16(pAC, Port, XM_TX_CMD, Word);	}	else {		GM_IN16(IoC, Port, GM_TX_CTRL, &Word);		if (Enable) {			Word &= ~GM_TXCR_CRC_DIS;		}		else {			Word |= GM_TXCR_CRC_DIS;		}		/* setup Tx Control Register */		GM_OUT16(IoC, Port, GM_TX_CTRL, Word);	}}	/* SkMacCrcGener*/#endif /* SK_DIAG *//****************************************************************************** * *	SkXmClrExactAddr() - Clear Exact Match Address Registers * * Description: *	All Exact Match Address registers of the XMAC 'Port' will be *	cleared starting with 'StartNum' up to (and including) the *	Exact Match address number of 'StopNum'. * * Returns: *	nothing */void SkXmClrExactAddr(SK_AC	*pAC,		/* adapter context */SK_IOC	IoC,		/* IO context */int		Port,		/* Port Index (MAC_1 + n) */int		StartNum,	/* Begin with this Address Register Index (0..15) */int		StopNum)	/* Stop after finished with this Register Idx (0..15) */{	int		i;	SK_U16	ZeroAddr[3] = {0x0000, 0x0000, 0x0000};	if ((unsigned)StartNum > 15 || (unsigned)StopNum > 15 ||		StartNum > StopNum) {		SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E001, SKERR_HWI_E001MSG);		return;	}	for (i = StartNum; i <= StopNum; i++) {		XM_OUTADDR(IoC, Port, XM_EXM(i), &ZeroAddr[0]);	}}	/* SkXmClrExactAddr *//****************************************************************************** * *	SkMacFlushTxFifo() - Flush the MAC's transmit FIFO * * Description: *	Flush the transmit FIFO of the MAC specified by the index 'Port' * * Returns: *	nothing */void SkMacFlushTxFifo(SK_AC	*pAC,	/* adapter context */SK_IOC	IoC,	/* IO context */int		Port)	/* Port Index (MAC_1 + n) */{	SK_U32	MdReg;	if (pAC->GIni.GIGenesis) {		XM_IN32(IoC, Port, XM_MODE, &MdReg);		XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FTF);	}	else {		/* no way to flush the FIFO we have to issue a reset */		/* TBD */	}}	/* SkMacFlushTxFifo *//****************************************************************************** * *	SkMacFlushRxFifo() - Flush the MAC's receive FIFO * * Description: *	Flush the receive FIFO of the MAC specified by the index 'Port' * * Returns: *	nothing */void SkMacFlushRxFifo(SK_AC	*pAC,	/* adapter context */SK_IOC	IoC,	/* IO context */int		Port)	/* Port Index (MAC_1 + n) */{	SK_U32	MdReg;	if (pAC->GIni.GIGenesis) {		XM_IN32(IoC, Port, XM_MODE, &MdReg);		XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FRF);	}	else {		/* no way to flush the FIFO we have to issue a reset */		/* TBD */	}}	/* SkMacFlushRxFifo *//****************************************************************************** * *	SkXmSoftRst() - Do a XMAC software reset * * Description: *	The PHY registers should not be destroyed during this *	kind of software reset. Therefore the XMAC Software Reset *	(XM_GP_RES_MAC bit in XM_GP_PORT) must not be used! * *	The software reset is done by *		- disabling the Rx and Tx state machine, *		- resetting the statistics module, *		- clear all other significant XMAC Mode, *		  Command, and Control Registers *		- clearing the Hash Register and the *		  Exact Match Address registers, and *		- flushing the XMAC's Rx and Tx FIFOs. * * Note: *	Another requirement when stopping the XMAC is to *	avoid sending corrupted frames on the network. *	Disabling the Tx state machine will NOT interrupt *	the currently transmitted frame. But we must take care *	that the Tx FIFO is cleared AFTER the current frame *	is complete sent to the network. * *	It takes about 12ns to send a frame with 1538 bytes. *	One PCI clock goes at least 15ns (66MHz). Therefore *	after reading XM_GP_PORT back, we are sure that the *	transmitter is disabled AND idle. And this means *	we may flush the transmit FIFO now. * * Returns: *	nothing */static void SkXmSoftRst(SK_AC	*pAC,	/* adapter context */SK_IOC	IoC,	/* IO context */int		Port)	/* Port Index (MAC_1 + n) */{	SK_U16	ZeroAddr[4] = {0x0000, 0x0000, 0x0000, 0x0000};	/* reset the statistics module */	XM_OUT32(IoC, Port, XM_GP_PORT, XM_GP_RES_STAT);	/* disable all XMAC IRQs */	XM_OUT16(IoC, Port, XM_IMSK, 0xffff);	XM_OUT32(IoC, Port, XM_MODE, 0);		/* clear Mode Reg */	XM_OUT16(IoC, Port, XM_TX_CMD, 0);		/* reset TX CMD Reg */	XM_OUT16(IoC, Port, XM_RX_CMD, 0);		/* reset RX CMD Reg */	/* disable all PHY IRQs */	switch (pAC->GIni.GP[Port].PhyType) {	case SK_PHY_BCOM:			SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK, 0xffff);			break;#ifdef OTHER_PHY		case SK_PHY_LONE:			SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, 0);			break;		case SK_PHY_NAT:			/* todo: National			 SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, 0xffff); */			break;#endif /* OTHER_PHY */	}	/* clear the Hash Register */	XM_OUTHASH(IoC, Port, XM_HSM, &ZeroAddr);	/* clear the Exact Match Address registers */	SkXmClrExactAddr(pAC, IoC, Port, 0, 15);	/* clear the Source Check Address registers */	XM_OUTHASH(IoC, Port, XM_SRC_CHK, &ZeroAddr);}	/* SkXmSoftRst *//****************************************************************************** * *	SkXmHardRst() - Do a XMAC hardware reset * * Description: *	The XMAC of the specified 'Port' and all connected devices *	(PHY and SERDES) will receive a reset signal on its *Reset pins. *	External PHYs must be reset be clearing a bit in the GPIO register *  (Timing requirements: Broadcom: 400ns, Level One: none, National: 80ns). * * ATTENTION: * 	It is absolutely necessary to reset the SW_RST Bit first *	before calling this function. * * Returns: *	nothing */static void SkXmHardRst(SK_AC	*pAC,	/* adapter context */SK_IOC	IoC,	/* IO context */int		Port)	/* Port Index (MAC_1 + n) */{	SK_U32	Reg;	int		i;	int		TOut;	SK_U16	Word;	for (i = 0; i < 4; i++) {		/* TX_MFF_CTRL1 has 32 bits, but only the lowest 16 bits are used */		SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);		TOut = 0;		do {			if (TOut++ > 10000) {				/*				 * Adapter seems to be in RESET state.				 * Registers cannot be written.				 */				return;			}			SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_SET_MAC_RST);			SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &Word);		} while ((Word & MFF_SET_MAC_RST) == 0);	}	/* For external PHYs there must be special handling */	if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) {		/* reset external PHY */		SK_IN32(IoC, B2_GP_IO, &Reg);		if (Port == 0) {			Reg |= GP_DIR_0; /* set to output */			Reg &= ~GP_IO_0;		}		else {			Reg |= GP_DIR_2; /* set to output */			Reg &= ~GP_IO_2;		}		SK_OUT32(IoC, B2_GP_IO, Reg);		/* short delay */		SK_IN32(IoC, B2_GP_IO, &Reg);	}}	/* SkXmHardRst *//****************************************************************************** * *	SkGmSoftRst() - Do a GMAC software reset * * Description: *	The GPHY registers should not be destroyed during this *	kind of software reset. * * Returns: *	nothing */static void SkGmSoftRst(SK_AC	*pAC,	/* adapter context */SK_IOC	IoC,	/* IO context */int		Port)	/* Port Index (MAC_1 + n) */{	SK_U16	EmptyHash[4] = {0x0000, 0x0000, 0x0000, 0x0000};	SK_U16  RxCtrl;	/* reset the statistics module */	/* disable all GMAC IRQs */	SK_OUT8(IoC, GMAC_IRQ_MSK, 0);	/* disable all PHY IRQs */	SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0);	/* clear the Hash Register */	GM_OUTHASH(IoC, Port, GM_MC_ADDR_H1, EmptyHash);	/* Enable Unicast and Multicast filtering */	GM_IN16(IoC, Port, GM_RX_CTRL, &RxCtrl);	GM_OUT16(IoC, Port, GM_RX_CTRL,		RxCtrl | GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);}	/* SkGmSoftRst *//****************************************************************************** * *	SkGmHardRst() - Do a GMAC hardware reset * * Description: * * ATTENTION: * 	It is absolutely necessary to reset the SW_RST Bit first *	before calling this function. * * Returns: *	nothing */static void SkGmHardRst(SK_AC	*pAC,	/* adapter context */SK_IOC	IoC,	/* IO context */int		Port)	/* Port Index (MAC_1 + n) */{	/* set GPHY Control reset */	SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET);	/* set GMAC Control reset */	SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);}	/* SkGmHardRst *//****************************************************************************** * *	SkMacSoftRst() - Do a MAC software reset * * Description:	calls a MAC software reset routine dep. on board type * * Returns: *	nothing */void SkMacSoftRst(SK_AC	*pAC,	/* adapter context */SK_IOC	IoC,	/* IO context */int		Port)	/* Port Index (MAC_1 + n) */{	SK_GEPORT	*pPrt;	pPrt = &pAC->GIni.GP[Port];	/* disable receiver and transmitter */	SkMacRxTxDisable(pAC, IoC, Port);	if (pAC->GIni.GIGenesis) {		SkXmSoftRst(pAC, IoC, Port);	}	else {		SkGmSoftRst(pAC, IoC, Port);	}	/* flush the MAC's Rx and Tx FIFOs */	SkMacFlushTxFifo(pAC, IoC, Port);	SkMacFlushRxFifo(pAC, IoC, Port);	pPrt->PState = SK_PRT_STOP;}	/* SkMacSoftRst *//****************************************************************************** * *	SkMacHardRst() - Do a MAC hardware reset * * Description:	calls a MAC hardware reset routine dep. on board type * * Returns: *	nothing */void SkMacHardRst(SK_AC	*pAC,	/* adapter context */SK_IOC	IoC,	/* IO context */int		Port)	/* Port Index (MAC_1 + n) */{	if (pAC->GIni.GIGenesis) {		SkXmHardRst(pAC, IoC, Port);	}	else {		SkGmHardRst(pAC, IoC, Port);	}	pAC->GIni.GP[Port].PState = SK_PRT_RESET;}	/* SkMacHardRst *//****************************************************************************** * *	SkXmInitMac() - Initialize the XMAC II * * Description: *	Initialize the XMAC of the specified port. *	The XMAC must be reset or stopped before calling this function. * * Note: *	The XMAC's Rx and Tx state machine is still disabled when returning.