ili9325_pow_on(dev);	ili9325_gamma_adjust(dev);	/* Set GRAM area */	ili932x_write_reg(dev, ILI9325_HOR_ADDR_START, 0x0000); /* Horizontal GRAM Start Address. */	ili932x_write_reg(dev, ILI9325_HOR_ADDR_END, 0x00EF); /* Horizontal GRAM End Address. */	ili932x_write_reg(dev, ILI9325_VET_ADDR_START, 0x0000); /* Vertical GRAM Start Address. */	ili932x_write_reg(dev, ILI9325_VET_ADDR_END, 0x013F); /* Vertical GRAM End Address. */	ili932x_write_reg(dev, ILI9325_DRV_OUTPUT_CTRL_2, 0xA700); /* Gate Scan Line. */	ili932x_write_reg(dev, ILI9325_BASE_IMG_CTRL, 0x0001); /* NDL,VLE, REV. */	ili932x_write_reg(dev, ILI9325_VSCROLL_CTRL, 0x0000); /* set scrolling line. */	ili9325_par_dis_ctrl(dev);	ili9325_pan_ctrl(dev);	ili932x_write_reg(dev, ILI9325_GRAM_HADDR, 0x0000); /* GRAM horizontal Address. */	ili932x_write_reg(dev, ILI9325_GRAM_VADDR, 0x0000); /* GRAM Vertical Address. */	ILI9325_SET_INDEX(dev, ILI9325_GRAM_DATA);	return;}static void ili9320_chip_init(struct ili932x_device *dev){	/* printk("===>%s.\n", __FUNCTION__); */	ili932x_reset();	ili932x_write_reg(dev,0x00E5,0x8000);// Set the Vcore voltage and this setting is must.        	ili932x_write_reg(dev,0x0000,0x0001);// Start internal OSC.                                  	ili932x_write_reg(dev,0x0001,0x0100);// set SS and SM bit                                    	ili932x_write_reg(dev,0x0002,0x0700);// set 1 line inversion                                 	ili932x_write_reg(dev,0x0003,0x9030);// TRI=1, DFM=0, set GRAM write direction and BGR=1.                  	ili932x_write_reg(dev,0x0004,0x0000);// Resize register                                      	ili932x_write_reg(dev,0x0008,0x0202);// set the back porch and front porch                   	ili932x_write_reg(dev,0x0009,0x0000);// set non-display area refresh cycle ISC[3:0]          	ili932x_write_reg(dev,0x000A,0x0000);// FMARK function                                       	ili932x_write_reg(dev,0x000C,0x0000);// RGB interface setting                                	ili932x_write_reg(dev,0x000D,0x0000);// Frame marker Position                                	ili932x_write_reg(dev,0x000F,0x0000);// RGB interface polarity                               	ili932x_write_reg(dev,0x0010,0x0000);// Power On sequence  //SAP, BT[3:0], AP, DSTB, SLP, STB	ili932x_write_reg(dev,0x0011,0x0007);// DC1[2:0], DC0[2:0], VC[2:0]	ili932x_write_reg(dev,0x0012,0x0000);// VREG1OUT voltage	ili932x_write_reg(dev,0x0013,0x0000);// VDV[4:0] for VCOM amplitude	msleep(200);	ili932x_write_reg(dev,0x0010,0x17B0);// SAP, BT[3:0], AP, DSTB, SLP, STB 	ili932x_write_reg(dev,0x0011,0x0007);// R11h=0x0001 at VCI=3.3V DC1[2:0], DC0[2: 	msleep(50); 	ili932x_write_reg(dev,0x0012,0x013E);// R11h=0x0138 at VCI=3.3V VREG1OUT voltage	msleep(50); 	ili932x_write_reg(dev,0x0013,0x1F00);// R11h=0x1800 at VCI=2.8V VDV[4:0] for VCO  	ili932x_write_reg(dev,0x0029,0x0013);// setting VCM for VCOMH  0018-0012          	msleep(50); 	ili932x_write_reg(dev,0x0020,0x0000);// GRAM horizontal Address          	ili932x_write_reg(dev,0x0021,0x0000);// GRAM Vertical Address            	ili932x_write_reg(dev,0x0030,0x0000);// - Adjust the Gamma Curve -//     	ili932x_write_reg(dev,0x0031,0x0404);                                    	ili932x_write_reg(dev,0x0032,0x0404);                                    	ili932x_write_reg(dev,0x0035,0x0004);                              	ili932x_write_reg(dev,0x0036,0x0404);                                    	ili932x_write_reg(dev,0x0037,0x0404);                                    	ili932x_write_reg(dev,0x0038,0x0404);                                    	ili932x_write_reg(dev,0x0039,0x0707);                                    	ili932x_write_reg(dev,0x003C,0x0500);                                    	ili932x_write_reg(dev,0x003D,0x0607);// - Adjust the Gamma Curve -//     	//msleep(15); 	ili932x_write_reg(dev,0x0050,0x0000);// Horizontal GRAM Start Address    	ili932x_write_reg(dev,0x0051,0x00EF);// Horizontal GRAM End Address      	ili932x_write_reg(dev,0x0052,0x0000);// Vertical GRAM Start Address      	ili932x_write_reg(dev,0x0053,0x013F);// Vertical GRAM Start Address      	ili932x_write_reg(dev,0x0060,0x2700);// Gate Scan Line                   	ili932x_write_reg(dev,0x0061,0x0001);// NDL,VLE, REV                     	ili932x_write_reg(dev,0x006A,0x0000);// set scrolling line               	ili932x_write_reg(dev,0x0080,0x0000);//- Partial Display Control -//     	ili932x_write_reg(dev,0x0081,0x0000);	ili932x_write_reg(dev,0x0082,0x0000);	ili932x_write_reg(dev,0x0083,0x0000);	ili932x_write_reg(dev,0x0084,0x0000);	ili932x_write_reg(dev,0x0085,0x0000);	ili932x_write_reg(dev,0x0090,0x0010);//- Panel Control -//            	ili932x_write_reg(dev,0x0092,0x0000);                                 	ili932x_write_reg(dev,0x0093,0x0003);                                 	ili932x_write_reg(dev,0x0095,0x0110);                                 	ili932x_write_reg(dev,0x0097,0x0000);                                 	ili932x_write_reg(dev,0x0098,0x0000);//- Panel Control -//            	ili932x_write_reg(dev,0x0007,0x0173);//Display Control and display ON 	msleep(50); 	return ;}static inline void ili932x_write_gram(struct ili932x_device *dev, u8 *buf, size_t size){	size_t i = 0;	#if ILI9325_BPP		== 16	u16 *pixel_buf = (u16 *) buf;	u8 bpp = sizeof(u16);#elif ILI9325_BPP	== 32	u32 *pixel_buf = (u32 *) buf;	u8 bpp = sizeof(u32);#endif	ili932x_write_reg(dev,0x0020,0x0000);// GRAM horizontal Address          	ili932x_write_reg(dev,0x0021,0x0000);// GRAM Vertical Address            	ILI9325_SET_INDEX(dev, 0x22);	/* printk("==> write %d words.\n", size); */	for (i=0; i<(size/bpp); i++) {		ili9325_write_pixel(dev, pixel_buf[i]);	}	return;	return;}static void ili932x_update(struct work_struct *work){	if (memcmp(ili932x_cache, ili932x_buffer, ILI9325_FB_SIZE)) {		ili932x_write_gram(lcd_ili932x, ili932x_buffer,				ILI9325_FB_SIZE);			memcpy(ili932x_cache, ili932x_buffer, ILI9325_FB_SIZE);	}	if (ili932x_updating) {		ili932x_queue();	}	return;}/* * ili932x Exported Symbols */EXPORT_SYMBOL_GPL(ili932x_buffer);EXPORT_SYMBOL_GPL(ili932x_getrate);EXPORT_SYMBOL_GPL(ili932x_enable);EXPORT_SYMBOL_GPL(ili932x_disable);EXPORT_SYMBOL_GPL(ili932x_isenabled);/* * Is the module inited? */static unsigned char ili932x_inited;unsigned char ili932x_isinited(void){	return ili932x_inited;}EXPORT_SYMBOL_GPL(ili932x_isinited);static int ili932x_chip_probe(struct ili932x_device *dev){	u16 chip_id = 0;#if 0	ili932x_reset();	msleep(150);#endif	/* Get chip ID. */	chip_id = ili932x_read_reg(dev, ILI9325_DRV_CODE);#if 1	printk("%s: read addr %08x, chip_id = %04x.\n",			__FUNCTION__, dev->membase, chip_id);	if (ILI9325_CHIP_ID == (u16) chip_id) {		ili9325_chip_init(dev);	} else if (ILI9320_CHIP_ID == (u16) chip_id) {		ili9320_chip_init(dev);	} else {		WFOS_DEBUG_INFO("No Chip ILI9325/9320 found.\n");		return -1;	}#endif	WFOS_DEBUG_INFO("Chip ILI%4x found.\n", chip_id);	return 0;}/* * Module Init & Exit */static int __init ili932x_init(void){	int ret = -EINVAL;	void __iomem *membase = NULL;	lcd_ili932x = kmalloc(sizeof(struct ili932x_device), GFP_KERNEL);	if (!lcd_ili932x) {		ret = -ENOMEM;		goto alloc_failed; 	}	memset(lcd_ili932x, 0, sizeof(struct ili932x_device));	#if 0	if (!request_mem_region(ILI9325_BASE_INDEX, ILI9325_IOMEM_SIZE, "ili932x")) {		printk("%s: request mem region error.\n", __FUNCTION__);		ret = -1;		goto region_failed;	}#endif	membase = ioremap(ILI9325_BASE_INDEX, ILI9325_IOMEM_SIZE);	if (!membase) {		printk(KERN_ERR "Can NOT remap address 0x%08x\n", 				(unsigned int)ILI9325_BASE_INDEX);		ret = -1;		goto remap_failed;	}	lcd_ili932x->membase = membase;	printk("%s: phy addr %08x ==> virt %08x.\n", 			__FUNCTION__, (unsigned int)ILI9325_BASE_INDEX, 			(unsigned int)lcd_ili932x->membase);		ili932x_buffer = (unsigned char *) vmalloc_32(ILI9325_FB_SIZE);	if (ili932x_buffer == NULL) {		printk(KERN_ERR ILI932X_NAME": ERROR: "			"can't get a free page\n");		ret = -ENOMEM;		goto page_err;	}	/* printk("===> Get pages for ili932x_buffer.\n"); */	ili932x_cache = kmalloc(sizeof(unsigned char) *		ILI9325_FB_SIZE, GFP_KERNEL);	if (ili932x_cache == NULL) {		printk(KERN_ERR ILI932X_NAME ": ERROR: "			"can't alloc cache buffer (%i bytes)\n",			ILI9325_FB_SIZE);		ret = -ENOMEM;		goto bufferalloced;	}	ili932x_workqueue = create_singlethread_workqueue(ILI932X_NAME);	if (ili932x_workqueue == NULL) {		goto cachealloced;	}	memset(ili932x_buffer, 0, ILI9325_FB_SIZE);	memset(ili932x_cache, 0, ILI9325_FB_SIZE);		if (ili932x_chip_probe(lcd_ili932x)< 0) {		goto cachealloced;	}	ili932x_inited = 1;	return 0;cachealloced:	kfree(ili932x_cache);bufferalloced://	free_pages ((unsigned long)ili932x_buffer, 6);	vfree(ili932x_buffer);	page_err:	iounmap(lcd_ili932x->membase);	lcd_ili932x->membase = NULL;	remap_failed://	release_mem_region(ILI9325_BASE_INDEX, ILI9325_IOMEM_SIZE);region_failed:	kfree(lcd_ili932x);alloc_failed:	return ret;}static void __exit ili932x_exit(void){	ili932x_disable();	destroy_workqueue(ili932x_workqueue);	kfree(ili932x_cache);	free_page ((unsigned long)ili932x_buffer);	//kfree(ili932x_buffer);	iounmap(lcd_ili932x->membase);	//release_mem_region(ILI9325_BASE_INDEX, ILI9325_IOMEM_SIZE);	kfree(lcd_ili932x);	lcd_ili932x = NULL;}module_init(ili932x_init);module_exit(ili932x_exit);