__text_start:
__start:
    0014 E5CF      LDI	R28,0x5F
    0015 E0D4      LDI	R29,4
    0016 BFCD      OUT	0x3D,R28
    0017 BFDE      OUT	0x3E,R29
    0018 51C0      SUBI	R28,0x10
    0019 40D0      SBCI	R29,0
    001A EA0A      LDI	R16,0xAA
    001B 8308      STD	Y+0,R16
    001C 2400      CLR	R0
    001D E6E2      LDI	R30,0x62
    001E E0F0      LDI	R31,0
    001F E010      LDI	R17,0
    0020 36EE      CPI	R30,0x6E
    0021 07F1      CPC	R31,R17
    0022 F011      BEQ	0x0025
    0023 9201      ST	R0,Z+
    0024 CFFB      RJMP	0x0020
    0025 8300      STD	Z+0,R16
    0026 E2E6      LDI	R30,0x26
    0027 E0F0      LDI	R31,0
    0028 E6A0      LDI	R26,0x60
    0029 E0B0      LDI	R27,0
    002A E010      LDI	R17,0
    002B 32E8      CPI	R30,0x28
    002C 07F1      CPC	R31,R17
    002D F021      BEQ	0x0032
    002E 95C8      LPM
    002F 9631      ADIW	R30,1
    0030 920D      ST	R0,X+
    0031 CFF9      RJMP	0x002B
    0032 D0F7      RCALL	_main
_exit:
    0033 CFFF      RJMP	_exit
FILE: D:\ele\AVR\ICC\diantiao\dtm8-td\dtm8-td.C
(0001) /******************************************/
(0002) /*         燕山大學(xué)無線電愛好者協(xié)會       */
(0003) /*                電子調(diào)速器              */
(0004) /*     作者:張翃鵬     2005-2-27 9:04:40  */
(0005) /*     目標(biāo)MCU:MEGA8    晶振:INT RC 8MHZ  */
(0006) /******************************************/
(0007) 
(0008) #include <iom8v.h>
(0009) #include <macros.h>
(0010) #include <eeprom.h>
(0011) #define uchar unsigned char
(0012) #define unit unsigned int
(0013) #define ulong unsigned long
(0014) #define xtal 8 
(0015) #define j11 PORTD|=0x02
(0016) #define j10 PORTD&=~0x02
(0017) #define j21 PORTD|=0x10
(0018) #define j20 PORTD&=~0x10
(0019) #define j31 PORTB|=0x40
(0020) #define j30 PORTB&=~0x40
(0021) #define j41 PORTD|=0x40
(0022) #define j40 PORTD&=~0x40
(0023) #define LED1 PORTB|=0x08;
(0024) #define LED0 PORTB&=~0x08;
(0025) 
(0026) 
(0027) int mark=1500;
(0028) unit ai,aa;
(0029) uchar i,j,az,flag,flagh,zb,mid,pwm;
(0030) 
(0031) void port_init(void)
(0032) {
(0033)  PORTB = 0x23;
_port_init:
    0034 E283      LDI	R24,0x23
    0035 BB88      OUT	0x18,R24
(0034)  DDRB  = 0x58;
    0036 E588      LDI	R24,0x58
    0037 BB87      OUT	0x17,R24
(0035)  PORTC = 0x04; //m103 output only
    0038 E084      LDI	R24,4
    0039 BB85      OUT	0x15,R24
(0036)  DDRC  = 0x38;
    003A E388      LDI	R24,0x38
    003B BB84      OUT	0x14,R24
(0037)  PORTD = 0x00;
    003C 2422      CLR	R2
    003D BA22      OUT	0x12,R2
(0038)  DDRD  = 0x52;
    003E E582      LDI	R24,0x52
    003F BB81      OUT	0x11,R24
    0040 9508      RET
(0039) }
(0040) 
(0041) void timer1_init(void)
(0042) {
(0043)  TCCR1B = 0x00; //stop
_timer1_init:
    0041 2422      CLR	R2
    0042 BC2E      OUT	0x2E,R2
(0044)  TCNT1H = 0x00 /*INVALID SETTING*/; //setup
    0043 BC2D      OUT	0x2D,R2
(0045)  TCNT1L = 0x00 /*INVALID SETTING*/;
    0044 BC2C      OUT	0x2C,R2
(0046)  OCR1AH = 0x00 /*INVALID SETTING*/;
    0045 BC2B      OUT	0x2B,R2
(0047)  OCR1AL = 0x00 /*INVALID SETTING*/;
    0046 BC2A      OUT	0x2A,R2
(0048)  OCR1BH = 0x00 /*INVALID SETTING*/;
    0047 BC29      OUT	0x29,R2
(0049)  OCR1BL = 0x00 /*INVALID SETTING*/;
    0048 BC28      OUT	0x28,R2
(0050)  ICR1H  = 0x00 /*INVALID SETTING*/;
    0049 BC27      OUT	0x27,R2
(0051)  ICR1L  = 0x00 /*INVALID SETTING*/;
    004A BC26      OUT	0x26,R2
(0052)  TCCR1A = 0x00;
    004B BC2F      OUT	0x2F,R2
(0053)  TCCR1B = 0x02; //start Timer
    004C E082      LDI	R24,2
    004D BD8E      OUT	0x2E,R24
    004E 9508      RET
(0054) }
(0055) 
(0056) void timer2_init(void)
(0057) {
(0058)  TCCR2 = 0x00; //stop
_timer2_init:
    004F 2422      CLR	R2
    0050 BC25      OUT	0x25,R2
(0059)  ASSR  = 0x00; //set async mode
    0051 BC22      OUT	0x22,R2
(0060)  TCNT2 = 0x00 /*INVALID SETTING*/; //setup
    0052 BC24      OUT	0x24,R2
(0061)  OCR2  = 0x00 /*INVALID SETTING*/;
    0053 BC23      OUT	0x23,R2
(0062)  TCCR2 = 0x02; //start
    0054 E082      LDI	R24,2
    0055 BD85      OUT	0x25,R24
    0056 9508      RET
(0063) }
(0064) 
(0065) void watchdog_init(void)
(0066) {
(0067)  WDR(); //this prevents a timout on enabling
_watchdog_init:
    0057 95A8      WDR
(0068)  WDTCR = 0x08; //WATCHDOG ENABLED - dont forget to issue WDRs
    0058 E088      LDI	R24,0x8
    0059 BD81      OUT	0x21,R24
    005A 9508      RET
(0069) }
(0070) 
(0071) void init_devices(void)
(0072) {
(0073)  CLI(); //disable all interrupts
_init_devices:
    005B 94F8      BCLR	7
(0074)  port_init();
    005C DFD7      RCALL	_port_init
(0075)  timer1_init();
    005D DFE3      RCALL	_timer1_init
(0076)  timer2_init();
    005E DFF0      RCALL	_timer2_init
(0077)  watchdog_init();
    005F DFF7      RCALL	_watchdog_init
(0078)  MCUCR = 0x00;
    0060 2422      CLR	R2
    0061 BE25      OUT	0x35,R2
(0079)  GICR  = 0x00;
    0062 BE2B      OUT	0x3B,R2
(0080)  TIMSK = 0x40; //timer interrupt sources
    0063 E480      LDI	R24,0x40
    0064 BF89      OUT	0x39,R24
(0081)  SEI(); //re-enable interrupts
    0065 9478      BSET	7
    0066 9508      RET
(0082) }
(0083) 
(0084) /*		微秒級延時(shí)程序	*/	
(0085) void del(int time)
(0086) 	 {     
(0087)   	  do
(0088) 	  	{
(0089) 		 time--;
_del:
  time                 --> R16
    0067 5001      SUBI	R16,1
    0068 4010      SBCI	R17,0
(0090) 		}	
(0091)   	  while (time>1);
    0069 E081      LDI	R24,1
    006A E090      LDI	R25,0
    006B 1780      CP	R24,R16
    006C 0791      CPC	R25,R17
    006D F3CC      BLT	0x0067
    006E 9508      RET
(0092) 	 }
(0093) 	 
(0094) /*	   毫秒級延時(shí)程序   	*/	 
(0095) void delay_1ms(void)
(0096) { unsigned int i1;
(0097)  for(i1=1;i1<(unsigned int)(xtal*143-2);i1++)
_delay_1ms:
  i1                   --> R16
    006F E001      LDI	R16,1
    0070 E010      LDI	R17,0
    0071 C002      RJMP	0x0074
    0072 5F0F      SUBI	R16,0xFF
    0073 4F1F      SBCI	R17,0xFF
    0074 3706      CPI	R16,0x76
    0075 E0E4      LDI	R30,4
    0076 071E      CPC	R17,R30
    0077 F3D0      BCS	0x0072
    0078 9508      RET
_delay:
  i2                   --> R20
  n                    --> R22
    0079 D12B      RCALL	push_gset2
    007A 01B8      MOVW	R22,R16
(0098)     ;
(0099) }
(0100) 
(0101) void delay(unsigned int n)
(0102) {
(0103)  unsigned int i2=0;
    007B 2744      CLR	R20
    007C 2755      CLR	R21
    007D C004      RJMP	0x0082
(0104)    while(i2<n)
(0105)    {delay_1ms();
    007E DFF0      RCALL	_delay_1ms
(0106)     i2++; WDR();
    007F 5F4F      SUBI	R20,0xFF
    0080 4F5F      SBCI	R21,0xFF
    0081 95A8      WDR
    0082 1746      CP	R20,R22
    0083 0757      CPC	R21,R23
    0084 F3C8      BCS	0x007E
    0085 D115      RCALL	pop_gset2
    0086 9508      RET
_timer2_ovf_isr:
    0087 922A      ST	R2,-Y
    0088 923A      ST	R3,-Y
    0089 938A      ST	R24,-Y
    008A 939A      ST	R25,-Y
    008B B62F      IN	R2,0x3F
    008C 922A      ST	R2,-Y
(0107)    }
(0108) }
(0109) 
(0110) 
(0111) #pragma interrupt_handler timer2_ovf_isr:5
(0112) void timer2_ovf_isr(void)
(0113) {
(0114) WDR();
    008D 95A8      WDR
(0115) pwm++;
    008E 91800062  LDS	R24,pwm
    0090 5F8F      SUBI	R24,0xFF
    0091 93800062  STS	pwm,R24
(0116) if(pwm==250) 
    0093 3F8A      CPI	R24,0xFA
    0094 F499      BNE	0x00A8
(0117)  {
(0118)  pwm=0;
    0095 2422      CLR	R2
    0096 92200062  STS	pwm,R2
(0119)  if(zb>0)
    0098 90300064  LDS	R3,zb
    009A 1423      CP	R2,R3
    009B F460      BCC	0x00A8
(0120)   {
(0121)   if(flag==1)
    009C 91800066  LDS	R24,flag
    009E 3081      CPI	R24,1
    009F F411      BNE	0x00A2
(0122)   {j11; j31;}
    00A0 9A91      SBI	0x12,1
    00A1 9AC6      SBI	0x18,6
(0123)   if(flag==0)
    00A2 90200066  LDS	R2,flag
    00A4 2022      TST	R2
    00A5 F411      BNE	0x00A8
(0124)   {j21; j41;}  
    00A6 9A94      SBI	0x12,4
    00A7 9A96      SBI	0x12,6
(0125)   }
(0126)  }
(0127) if(pwm==zb) 
    00A8 90200064  LDS	R2,zb
    00AA 90300062  LDS	R3,pwm
    00AC 1432      CP	R3,R2
    00AD F421      BNE	0x00B2
(0128)  {j10;j20;j30;j40;}
    00AE 9891      CBI	0x12,1
    00AF 9894      CBI	0x12,4
    00B0 98C6      CBI	0x18,6
    00B1 9896      CBI	0x12,6
(0129) 
(0130) TCNT2 = 0xF0;	//reload counter value
    00B2 EF80      LDI	R24,0xF0
    00B3 BD84      OUT	0x24,R24
    00B4 9029      LD	R2,Y+
    00B5 BE2F      OUT	0x3F,R2
    00B6 9199      LD	R25,Y+
    00B7 9189      LD	R24,Y+
    00B8 9039      LD	R3,Y+
    00B9 9029      LD	R2,Y+
    00BA 9518      RETI
_fenc:
  bc                   --> R20
  bb                   --> R16
    00BB D0EB      RCALL	push_gset1
(0131) 
(0132) }
(0133) 
(0134) 
(0135) unit fenc(int bb)             
(0136) {
(0137)  int bc;        
(0138)  if((bb<mark-700)||(bb>(mark+700))) return(0);              
    00BC 91800060  LDS	R24,mark
    00BE 91900061  LDS	R25,mark+1
    00C0 5B8C      SUBI	R24,0xBC
    00C1 4092      SBCI	R25,2
    00C2 1708      CP	R16,R24
    00C3 0719      CPC	R17,R25
    00C4 F04C      BLT	0x00CE
    00C5 91800060  LDS	R24,mark
    00C7 91900061  LDS	R25,mark+1
    00C9 5484      SUBI	R24,0x44
    00CA 4F9D      SBCI	R25,0xFD
    00CB 1780      CP	R24,R16
    00CC 0791      CPC	R25,R17
    00CD F41C      BGE	0x00D1
    00CE 2700      CLR	R16
    00CF 2711      CLR	R17
    00D0 C042      RJMP	0x0113
(0139)  if((mark-bb)<0)  
    00D1 91800060  LDS	R24,mark
    00D3 91900061  LDS	R25,mark+1
    00D5 1B80      SUB	R24,R16
    00D6 0B91      SBC	R25,R17
    00D7 3080      CPI	R24,0
    00D8 E0E0      LDI	R30,0
    00D9 079E      CPC	R25,R30
    00DA F454      BGE	0x00E5
(0140)   {
(0141)   flag=1;
    00DB E081      LDI	R24,1
    00DC 93800066  STS	flag,R24
(0142)   bc=bb-mark;
    00DE 90200060  LDS	R2,mark
    00E0 90300061  LDS	R3,mark+1
    00E2 01A8      MOVW	R20,R16
    00E3 1942      SUB	R20,R2
    00E4 0953      SBC	R21,R3
(0143)   }
(0144)  if((mark-bb)>0)
    00E5 90200060  LDS	R2,mark
    00E7 90300061  LDS	R3,mark+1