?? enable_gmacs.c
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/*----------------------------------------------------------------------------* Copyright (c) 2006 by Hifn, Inc, Los Gatos, CA, U.S.A. All Rights Reserved. This software is furnished to licensee under a software license agreement and may be used and copied only in accordance with the terms and conditions of such license and with the inclusion of the above Copyright Notice. This software or any other copies thereof may not be provided or otherwise made available to any other person. No title to and ownership of the software is hereby transferred and licensee is subject to all confidentiality provisions set forth in the software license agreement. The information in this software is subject to change without notice.*-----------------------------------------------------------------------------*/static char const hftc_id[] = "$Id: @(#) enable_gmacs.c 1.11@(#) $";/*----------------------------------------------------------------------------* * @file enable_gmacs.c * @brief Enable the gmacs. * * This program is similar to the code in the startup utility enable_gmacs. * *----------------------------------------------------------------------------*//* @defgroup CD_API_UTIL *//*------------------------------------* * Header Include *------------------------------------*//* Standard includes */#include <stdio.h>#include <string.h>#include <stdlib.h>/* API specific includes */#include "download.h"#include "hftc_pub_common.h"#include "hftc_pub_types.h"#include "hftc_pub_errors.h"#include "hftc_pub_gmac.h"#include "hftc_pub_service.h"#include "hftc_pub_os_common.h"#include "hftc_pub_translate_enums.h"#include "hftc_pub_app_utils.h"/*------------------------------------* * Constants and Types *------------------------------------*/#define DL_DEBUG 0 /* Set = 1 to get debug output, 0 for none. *//* We are currently enabling the transmit and recieve, and setting the GMACs into a MAC filtering mode. If your situation requires customization, this is a place it can be done. The ROM currently sets up the GMAC registers as follows: 1) The DPU Boot ROM code will set up Host 0 / register 1 based on the boot config pin and pp_gpio_7 2) The DPU Init code will set up the rest as follows: Register 0: For Host 1, Network 0, and Network 1 If operating in GMII mode : PLL_MODE_1 == "1" Config register 0 = WATCHDOG_DIS | JABBER_DIS | FRMBURST_EN | JUMBOFRM_EN | BIGENDIAN_EN | RX_OWN_DIS | FULLDPLX_EN | DEFERRAL_CHK_EN If operating in MII mode : PLL_MODE_1 == "0" Config register 0 = WATCHDOG_DIS | JABBER_DIS | FRMBURST_EN | JUMBOFRM_EN | BIGENDIAN_EN | RX_OWN_DIS | FULLDPLX_EN | DEFERRAL_CHK_EN | MIIMODE_DIS Note: The MIIMODE_DIS bit will be controlled by the station manager at run time. Register 1: For Host 0, Host 1 Config register 1 = PROMISC_MODE Register 1: For Network 0, Network 1 (Address Filter Mode) Config register 1 = 0 Note: This is the preferred mode where user has 16 progammable MAC addresses for each GMAC for programming unicast and multicast addresses. However, for ease of initial setup the GMAC is being set into in promiscuous mode. Register 6 : For H0, H1, N0, N1 Config register 6 = RX_PAUSE_EN | TX_PAUSE_EN | Pause time (0x10000000) = 0x00 0x10 0x00 0x06 3) Additional Host programming: 1) Register 6 should be left alone 2) Register 0 : a) For any ports that the user wants to enable the user can read the value and OR in the TX and RX enable bits. b) If the user knows that the packets, with all headers (i.e. PPCI and IPSec ) will not exceed 1522 bytes, the JUMBOFRM, WATCHDOG and JABBER can be clear. 3) Register 1 may need to be programmed in the following cases: (This helps reduce the number of pause frames that pass to the DPU caused by the Pause Frame errata ER-17 -- this is 43x0/83x0 specific). a) If no multicast addresses are needed: - Put the host side GMACs into inverse filter mode. - Put the network side GMACs into address filter mode (allow up to 16 unicast addresses.) b) On a 43x0/83x0 if multicast is needed and the multicast addresses used don't hash to the pause address (there is no issue with pause address on the 44x0/84x0): - Put the host side GMACs into promiscuous mode. - Put the network side GMACs into hash mode (set the appropriate hash bits in the hash register and leave bit 3 reset. The pause address hashes to bit 3. c) On a 43x0/83x0 if multicast is needed and the address does hash to the pause address (there is no issue with pause address on the 44x0/84x0): - Put the host side GMACs into promiscuous mode. - Put the network side GMACs into address filter mode for both unicast and multicast (you will be limited to 16 of these filters). d) If multicast is needed and more than 16 MAC addresses are needed: - Put the host side GMACs into promiscuous mode - Put the net side GMACs into promiscuous mode or enable multicast. or enable promiscuous mode. On the 44x0/84x0 to allow the neighbor discovery address (a multicast address) to go through, we use promiscuous mode on the host ports, and set the allow multicast bit on the network side ports. -------------------------------------------------- This code sets TX and RX enable bits in register 0. It is allowing the possibility of jumbo packets. When using MAC filtering, the code will set the HOST side GMACs to use inverse filtering on an invalid MAC address. This will prevent the pause frames from being received as they are multicast. It will also program the IKE MAC addresses from the configparams file into the MAC filtering addresses on the NETWORK side. When setting promiscuous mode, the code will set the MAC Frame Filter register into Promiscous mode. Register 0 is the MAC Configuration Register register (HFTC_GMAC_SYN_MAC_CONFIG) Register 1 is the MAC Frame Filter Register register (HFTC_GMAC_SYN_MAC_FRAME_FILTER) Register 6 is the Flow Control Register (HFTC_GMAC_SYN_FLOW_CONTROL) Register 16 is a MAC address filter register for the right-most network order bytes. See hftc_pub_gmac.h (HFTC_GMAC_SYN_MAC_ADDR0_LO) Register 17 is a MAC address filter register for the left-most network order bytes. (HFTC_GMAC_SYN_MAC_ADDR0_HI) Register 18 is a MAC address filter register for the right-most network order bytes. (HFTC_GMAC_SYN_MAC_ADDR1_LO) Register 19 is a MAC address filter register for the left-most network order bytes. (HFTC_GMAC_SYN_MAC_ADDR1_HI) The TX enable bit is bit 3 in HFTC_GMAC_SYN_MAC_CONFIG The RX enable bit is bit 2 in HFTC_GMAC_SYN_MAC_CONFIG This code is enabling both Host 0 and 1, and Network 0 and 1*//* The origin of the values below can be found in UG-0039 Hipp III 43x0 83x0 User's Guide.*/#define CONFIG_ENABLE 0x0000000C#define FILTER_MASK 0x0000003F#define FILTER_PERFECT 0x00000000#define FILTER_ALLOW_MULTICAST 0x00000010#define FILTER_PROMISC 0x00000001#define FILTER_INVERSE 0x00000008/* This is the typedef for the table used to configure the gmacs.*/typedef struct{ HFTC_GMACReg_t gmac; HFTC_GMACIndex_t index; uint32_t config;} gmac_config_t;/* This is how many entries are used in the gmac_config_table. For a 4300 or 8300 we only configure HOST0, NET0, so the number is half that of the x350 or x450 units. Although NET1 can be enabled on a 4300 or 8300 (it may be present for failover use) it is not present on all boards. It is not enabled here.*/#define GMAC_CONFIG_TABLE_SIZE 12#define GMAC_CONFIG_TABLE_SIZE_x300 (GMAC_CONFIG_TABLE_SIZE/2)/* This is the typedef for the table used add MAC addresses for MAC filtering.*/typedef struct{ HFTC_GMACReg_t lo; HFTC_GMACReg_t hi;} gmac_filtering_t;/*------------------------------------* * External Variables *------------------------------------*//*------------------------------------* * File-Scope Variables *------------------------------------*//* This table defines what gmac registers we are configuring and how. The table is also used for setting the address filtering modes. If promiscous mode is being used, the config value is overwritten - that is a FILTER_INVERSE is overwritten with FILTER_PROMISC, etc. The value for the mac frame filter is also overwritten for the 44x0/84x0. The value being written into the 0 MAC address is the invalid MAC address for inverse filtering. The order of the bytes are reversed and the high bit of the low address is set (it is the enable bit). Thus a MAC address of 11:22:33:44:55:66 will be written as 0x80006655 0x44332211*/static gmac_config_t gmac_config_table[GMAC_CONFIG_TABLE_SIZE] ={ {HFTC_GMAC_HOST0_CONTROL, HFTC_GMAC_SYN_MAC_ADDR0_LO, 0x80000000}, {HFTC_GMAC_HOST0_CONTROL, HFTC_GMAC_SYN_MAC_ADDR0_HI, 0x00000001}, {HFTC_GMAC_HOST0_CONTROL, HFTC_GMAC_SYN_MAC_FRAME_FILTER, FILTER_INVERSE}, {HFTC_GMAC_NET0_CONTROL, HFTC_GMAC_SYN_MAC_FRAME_FILTER, FILTER_PERFECT}, {HFTC_GMAC_HOST0_CONTROL, HFTC_GMAC_SYN_MAC_CONFIG, CONFIG_ENABLE}, {HFTC_GMAC_NET0_CONTROL, HFTC_GMAC_SYN_MAC_CONFIG, CONFIG_ENABLE}, {HFTC_GMAC_HOST1_CONTROL, HFTC_GMAC_SYN_MAC_ADDR0_LO, 0x80000000}, {HFTC_GMAC_HOST1_CONTROL, HFTC_GMAC_SYN_MAC_ADDR0_HI, 0x00000001}, {HFTC_GMAC_HOST1_CONTROL, HFTC_GMAC_SYN_MAC_FRAME_FILTER, FILTER_INVERSE}, {HFTC_GMAC_NET1_CONTROL, HFTC_GMAC_SYN_MAC_FRAME_FILTER, FILTER_PERFECT}, {HFTC_GMAC_NET1_CONTROL, HFTC_GMAC_SYN_MAC_CONFIG, CONFIG_ENABLE}, {HFTC_GMAC_HOST1_CONTROL, HFTC_GMAC_SYN_MAC_CONFIG, CONFIG_ENABLE}};/* This table is used to map a "slot" where we append a GMAC address in to the MAC filtering table into the register pair used for the HFTC_WriteGMACRegister calls into the API.*/static gmac_filtering_t gmac_filter_table[] ={ {HFTC_GMAC_SYN_MAC_ADDR0_LO, HFTC_GMAC_SYN_MAC_ADDR0_HI}, {HFTC_GMAC_SYN_MAC_ADDR1_LO, HFTC_GMAC_SYN_MAC_ADDR1_HI}, {HFTC_GMAC_SYN_MAC_ADDR2_LO, HFTC_GMAC_SYN_MAC_ADDR2_HI}, {HFTC_GMAC_SYN_MAC_ADDR3_LO, HFTC_GMAC_SYN_MAC_ADDR3_HI}, {HFTC_GMAC_SYN_MAC_ADDR4_LO, HFTC_GMAC_SYN_MAC_ADDR4_HI}, {HFTC_GMAC_SYN_MAC_ADDR5_LO, HFTC_GMAC_SYN_MAC_ADDR5_HI}, {HFTC_GMAC_SYN_MAC_ADDR6_LO, HFTC_GMAC_SYN_MAC_ADDR6_HI}, {HFTC_GMAC_SYN_MAC_ADDR7_LO, HFTC_GMAC_SYN_MAC_ADDR7_HI}, {HFTC_GMAC_SYN_MAC_ADDR8_LO, HFTC_GMAC_SYN_MAC_ADDR8_HI}, {HFTC_GMAC_SYN_MAC_ADDR9_LO, HFTC_GMAC_SYN_MAC_ADDR9_HI}, {HFTC_GMAC_SYN_MAC_ADDR10_LO, HFTC_GMAC_SYN_MAC_ADDR10_HI}, {HFTC_GMAC_SYN_MAC_ADDR11_LO, HFTC_GMAC_SYN_MAC_ADDR11_HI}, {HFTC_GMAC_SYN_MAC_ADDR12_LO, HFTC_GMAC_SYN_MAC_ADDR12_HI}, {HFTC_GMAC_SYN_MAC_ADDR13_LO, HFTC_GMAC_SYN_MAC_ADDR13_HI}, {HFTC_GMAC_SYN_MAC_ADDR14_LO, HFTC_GMAC_SYN_MAC_ADDR14_HI}, {HFTC_GMAC_SYN_MAC_ADDR15_LO, HFTC_GMAC_SYN_MAC_ADDR15_HI}};/* This is the size of the above table. It is the number of pairs.*/#define NUM_SYN_MAC_ADDRESS_PAIRS \ (sizeof(gmac_filter_table)/sizeof(gmac_filtering_t))/*------------------------------------* * Implementation *------------------------------------*//*----------------------------------------------------------------------------* * findParameterValue *----------------------------------------------------------------------------* * @ingroup startup * @brief Find the value of the given parameter in the configparams data. * * @param configParams_p RO: configparams data. * @param parameter RO: Parameter to find. * @param value_pp WO: Pointer to pointer value (gets filled in) * * @par Externals: * * @return * HFTC_STATUS_OK Parsing ok, parameter found. * * @par Errors: * HFTC_NOT_FOUND Parsing problem, parameter not found. * * @par Locks: * None. * * @par Assumptions: * Assumes valid input (configparams file is good, parameter is good) * *----------------------------------------------------------------------------*/staticHFTC_Status_t findParameterValue(HFTC_ConfigParameters_t *configParams_p, HFTC_Parameter_t parameter, HFTC_ConfigParameterValue_t **value_pp){ HFTC_Status_t status = HFTC_NOT_FOUND; uint32_t i; do { for (i = 0; i < HFTC_CONFIG_PARAMETER_TABLE_SIZE; i++) {
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