?? spmc75f2413a.h
字號:
UInt16 W;
struct
{
UInt16 TGAIE : 1;
UInt16 TGBIE : 1;
UInt16 TGCIE : 1;
UInt16 Reserved1 : 1;
UInt16 TPRIE : 1;
UInt16 TCVIE : 1;
UInt16 TCUIE : 1;
UInt16 TADSE : 1;
UInt16 PDCIE : 1;
UInt16 Reserved2 : 7;
} B;
} P_TMR1_INT_DEF;
/*****************************************************************************/
/* Timer 2 Interrupt Enable Register (P_TMR2_INT) */
/* bit 0 : TGAIE, Timer General A Register interrupt enable bit */
/* bit 1 : TGBIE, Timer General B Register interrupt enable bit */
/* bit 3 - 2 : Reserve */
/* bit 4 : TPRIE, Timer Period Register interrupt enable bit */
/* bit 6 - 5 : Reserve */
/* bit 7 : TADSE, A/D conversion start request enable bit */
/* bit 15 - 8 : Reserve */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 TGAIE : 1;
UInt16 TGBIE : 1;
UInt16 Reserved1 : 2;
UInt16 TPRIE : 1;
UInt16 Reserved2 : 2;
UInt16 TADSE : 1;
UInt16 Reserved3 : 8;
} B;
} P_TMR2_INT_DEF;
/*****************************************************************************/
/* Timer 3/4 Interrupt Enable Register (P_TMR3/4_INT) */
/* bit 2 - 0 : Reserve */
/* bit 3 : TGDIE, Timer General D Register interrupt enable bit */
/* bit 4 : TPRIE, Timer Period Register interrupt enable bit */
/* bit 6 - 5 : Reserve */
/* bit 7 : TADSE, A/D conversion start request enable bit */
/* bit 15 - 8 : Reserve */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 Reserved1 : 3;
UInt16 TGDIE : 1;
UInt16 TPRIE : 1;
UInt16 Reserved2 : 2;
UInt16 TADSE : 1;
UInt16 Reserved3 : 8;
} B;
} P_TMR3_INT_DEF;
typedef union
{
UInt16 W;
struct
{
UInt16 Reserved1 : 3;
UInt16 TGDIE : 1;
UInt16 TPRIE : 1;
UInt16 Reserved2 : 2;
UInt16 TADSE : 1;
UInt16 Reserved3 : 8;
} B;
} P_TMR4_INT_DEF;
/*****************************************************************************/
/* Timer 0/1 Interrupt Status Register (P_TMR0/1_Status) */
/* bit 0 : TGAIF, Timer General A Register capture/output compare flag */
/* bit 1 : TGBIF, Timer General B Register capture/output compare flag */
/* bit 2 : TGCIF, Timer General C Register capture/output compare flag */
/* bit 3 : Reserve */
/* bit 4 : TPRIF, Timer Period Register output compare flag */
/* bit 5 : TCVIF, Timer Counter Overflow flag */
/* bit 6 : TCUIF, Timer Counter Underflow flag */
/* bit 7 : TCDF, Timer Counter Count direction flag */
/* bit 8 : PDCIF, Position detection change interrupt enable bit */
/* bit 9:15 : Reserve */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 TGAIF : 1;
UInt16 TGBIF : 1;
UInt16 TGCIF : 1;
UInt16 Reserved1 : 1;
UInt16 TPRIF : 1;
UInt16 TCVIF : 1;
UInt16 TCUIF : 1;
UInt16 TCDF : 1;
UInt16 PDCIF : 1;
UInt16 Reserved2 : 7;
} B;
} P_TMR0_Status_DEF;
typedef union
{
UInt16 W;
struct
{
UInt16 TGAIF : 1;
UInt16 TGBIF : 1;
UInt16 TGCIF : 1;
UInt16 Reserved1 : 1;
UInt16 TPRIF : 1;
UInt16 TCVIF : 1;
UInt16 TCUIF : 1;
UInt16 TCDF : 1;
UInt16 PDCIF : 1;
UInt16 Reserved2 : 7;
} B;
} P_TMR1_Status_DEF;
/*****************************************************************************/
/* Timer 2 Interrupt Status Register (P_TMR2_Status) */
/* bit 0 : TGAIF, Timer General A Register capture/output compare flag */
/* bit 1 : TGBIF, Timer General B Register capture/output compare flag */
/* bit 3 - 2 : Reserve */
/* bit 4 : TPRIF, Timer Period Register output compare flag */
/* bit 6 - 5 : Reserve */
/* bit 7 : TCDF, Timer Counter Count direction flag */
/* bit 15 - 8 : Reserve */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 TGAIF : 1;
UInt16 TGBIF : 1;
UInt16 Reserved1 : 2;
UInt16 TPRIF : 1;
UInt16 Reserved2 : 2;
UInt16 TCDF : 1;
UInt16 Reserved3 : 8;
} B;
} P_TMR2_Status_DEF;
/*****************************************************************************/
/* Timer 3/4 Interrupt Status Register (P_TMR3/4_Status) */
/* bit 2 - 0 : Reserve */
/* bit 3 : TGDIF, Timer General D Register capture/output compare flag */
/* bit 4 : TPRIF, Timer Period Register output compare flag */
/* bit 6 - 5 : Reserve */
/* bit 7 : TCDF, Timer Counter Count direction flag */
/* bit 15 - 8 : Reserve */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 Reserved1 : 3;
UInt16 TGDIF : 1;
UInt16 TPRIF : 1;
UInt16 Reserved2 : 2;
UInt16 TCDF : 1;
UInt16 Reserved3 : 8;
} B;
} P_TMR3_Status_DEF;
typedef union
{
UInt16 W;
struct
{
UInt16 Reserved1 : 3;
UInt16 TGDIF : 1;
UInt16 TPRIF : 1;
UInt16 Reserved2 : 2;
UInt16 TCDF : 1;
UInt16 Reserved3 : 8;
} B;
} P_TMR4_Status_DEF;
/*****************************************************************************/
/* Timer Start Counter Status Register (P_TMR_Start) */
/* bit 0 : TMR0ST, Timer 0 counter start setting */
/* bit 1 : TMR1ST, Timer 1 counter start setting */
/* bit 2 : TMR2ST, Timer 2 counter start setting */
/* bit 3 : TMR3ST, Timer 3 counter start setting */
/* bit 4 : TMR4ST, Timer 4 counter start setting */
/* bit 15 - 5 : Reserve */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 TMR0ST : 1;
UInt16 TMR1ST : 1;
UInt16 TMR2ST : 1;
UInt16 TMR3ST : 1;
UInt16 TMR4ST : 1;
UInt16 Reserved : 11;
} B;
} P_TMR_Start_DEF;
/*****************************************************************************/
/* Timer Output Enable Register (P_TMR_Output) */
/* bit 0 : TMR3AOE: Timer 3 IOA Output enable(TIO3A) */
/* bit 1 : TMR3BOE: Timer 3 IOB Output enable(TIO3B) */
/* bit 2 : TMR3COE: Timer 3 IOC Output enable(TIO3C) */
/* bit 3 : TMR3DOE: Timer 3 IOD Output enable(TIO3D) */
/* bit 4 : TMR3EOE: Timer 3 IOE Output enable(TIO3E) */
/* bit 5 : TMR3FOE: Timer 3 IOF Output enable(TIO3F) */
/* bit 7 - 6 : Reserve */
/* bit 8 : TMR4AOE: Timer 4 IOA Output enable(TIO4A) */
/* bit 9 : TMR4BOE: Timer 4 IOB Output enable(TIO4B) */
/* bit 10 : TMR4COE: Timer 4 IOC Output enable(TIO4C) */
/* bit 11 : TMR4DOE: Timer 4 IOD Output enable(TIO4D) */
/* bit 12 : TMR4EOE: Timer 4 IOE Output enable(TIO4E) */
/* bit 13 : TMR4FOE: Timer 4 IOF Output enable(TIO4F) */
/* bit 15 - 14: Reserve */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 TMR3AOE : 1;
UInt16 TMR3BOE : 1;
UInt16 TMR3COE : 1;
UInt16 TMR3DOE : 1;
UInt16 TMR3EOE : 1;
UInt16 TMR3FOE : 1;
UInt16 Reserved1 : 2;
UInt16 TMR4AOE : 1;
UInt16 TMR4BOE : 1;
UInt16 TMR4COE : 1;
UInt16 TMR4DOE : 1;
UInt16 TMR4EOE : 1;
UInt16 TMR4FOE : 1;
UInt16 Reserved2 : 2;
} B;
} P_TMR_Output_DEF;
/*****************************************************************************/
/* Timer 3/4 Output Control Register (P_TMR3/4_OutputCtrl) */
/* Bit 1 - 0 : UOC, U phase output contro */
/* Bit 3 - 2 : VOC, V phase output control */
/* Bit 5 - 4 : WOC, W phase output control */
/* bit 7 - 6 : SYNC, UVW phases output synchronization source select. */
/* = 00, No sync */
/* = 01, Synchronized to Position Detection Register change */
/* = 10, Synchronized to Timer General B Register compare match */
/* = 11, Synchronized to Timer General C Register compare match */
/* bit 8 : UPWM, U phase PWM output select */
/* bit 9 : VPWM, V phase PWM output select */
/* bit 10 : WPWM, W phase PWM output select */
/* bit 13 - 11 : Reserve */
/* bit 14 : POLP, Upper phase polarity select */
/* bit 15 : DUTYMODE, Duty mode select */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 UOC : 2;
UInt16 VOC : 2;
UInt16 WOC : 2;
UInt16 SYNC : 2;
UInt16 UPWM : 1;
UInt16 VPWM : 1;
UInt16 WPWM : 1;
UInt16 Reserved : 3;
UInt16 POLP : 1;
UInt16 DUTYMODE : 1;
} B;
} P_TMR3_OutputCtrl_DEF;
typedef union
{
UInt16 W;
struct
{
UInt16 UOC : 2;
UInt16 VOC : 2;
UInt16 WOC : 2;
UInt16 SYNC : 2;
UInt16 UPWM : 1;
UInt16 VPWM : 1;
UInt16 WPWM : 1;
UInt16 Reserved : 3;
UInt16 POLP : 1;
UInt16 DUTYMODE : 1;
} B;
} P_TMR4_OutputCtrl_DEF;
/*****************************************************************************/
/* Timer 0/1 Position Detection Control Register (P_POS0/1_DectCtrl) */
/* Bit 6 - 0 : SPDLY, Sampling delay */
/* Bit 7 : PDEN, Position detection enable */
/* Bit 11 - 8 : SPLCNT, Sampling count select */
/* bit 13 - 12: SPLMOD, Sampling mode select */
/* = 00, Sample when PWM is on */
/* = 01, Sample regularly */
/* = 10, Sample when lower phases conducting current */
/* = 11, Reserved */
/* bit 15 - 14: SPLCK, Sampling clock select */
/* = 00, FCK/4 */
/* = 01, FCK/8 */
/* = 10, FCK/32 */
/* = 11, FCK/128 */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 SPDLY : 7;
UInt16 PDEN : 1;
UInt16 SPLCNT : 4;
UInt16 SPLMOD : 2;
UInt16 SPLCK : 2;
} B;
} P_POS0_DectCtrl_DEF;
typedef union
{
UInt16 W;
struct
{
UInt16 SPDLY : 7;
UInt16 PDEN : 1;
UInt16 SPLCNT : 4;
UInt16 SPLMOD : 2;
UInt16 SPLCK : 2;
} B;
} P_POS1_DectCtrl_DEF;
/*****************************************************************************/
/* Timer 0/1 Position Detection Data Register (P_POS0/1_DectData) */
/* Bit 2 - 0 : PDR0/1 */
/* PDR0[2] : Noise filtered position detection input from pin TIO/10C */
/* PDR0[1] : Noise filtered position detection input from pin TIO/10B */
/* PDR0[0] : Noise filtered position detection input from pin TIO/10A */
/* bit 15 - 3 : Reserve */
/*****************************************************************************/
typedef union
{
UInt16 W;
struct
{
UInt16 PDR0 : 3;
UInt16 Reserved : 13;
} B;
} P_POS0_DectData_DEF;
typedef union
{
UInt16 W;
struct
{
UInt16 PDR1 : 3;
UInt16 Reserved : 13;
} B;
} P_POS1_DectData_DEF;
/*****************************************************************************/
/* Timer 3/4 Dead Time Control Register(P_TMR3/4_DeadTime) */
/* Bit 6 - 0 : DTP, Dead-time timer period */
/* Bit 11 - 7 : Reserve */
/* Bit 12 : DTUE, Dead-time timer enable for U phases */
/* Bit 13 : DTVE, Dead-time timer enable for V phases */
/* Bit 14 : DTWE, Dead-time timer enable for W phases */
/* Bit 15 : Reserve */
/*****************************************************************************/
typedef union
{
?? 快捷鍵說明
復制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -