?? avr-1k2k-21p.asm
字號:
;cpu used:mk7a21p
;===================================================
#define INDF 00H
#define PCL 01H
#define PCH 02H
#DEFINE STATUS 03H
#DEFINE FSR 04H
#DEFINE PA_DIR 05H
#DEFINE PA_DAT 06H
#DEFINE PB_DIR 07H
#DEFINE PB_DAT 08H
#DEFINE PC_DIR 09H
#DEFINE PC_DAT 0AH
#DEFINE TM1_CTL1 13H
#DEFINE TM1_CTL2 1FH
#DEFINE CLR_CNT 21H
#DEFINE TM1L_LA 14H
#DEFINE TM1H_LA 15H
#DEFINE TM1L_CNT 16H
#DEFINE TM1H_CNT 17H
#DEFINE TM2_CTL1 18H
#DEFINE TM2_CTL2 19H
#DEFINE TM2_LA 1AH
#DEFINE TM2_CNT 1CH
#DEFINE TM3_CTL 1EH
#DEFINE TM3_LA 20H
#DEFINE TM3_CNT 22H
#DEFINE IRQM 25H
#DEFINE IRQF 26H
#DEFINE AD_CTL1 29H
#DEFINE AD_CTL2 2AH
#DEFINE AD_CTL3 2BH
#DEFINE AD_DAT 2DH
#DEFINE PA_PLU 31H
#DEFINE PB_PLU 33H
#DEFINE PC_PLU 35H
#DEFINE PA_INTE 3AH
#DEFINE WDT_CTL 3DH
#DEFINE TAB_BNK 3EH
#DEFINE SYS_CTL 3FH
;===========================================
;==========define RAM=======================
A_BUF EQU 40H ;for store the acc back
STATUS_BUF EQU 41H ;for store the status register back
FLAG EQU 42H ;FOR STORE THE FLAG
TEMP1 EQU 43H
TEMP2 EQU 44H
TEMP3 EQU 45H
TEMP4 EQU 46H
TEMP5 EQU 47H
TEMP6 EQU 48H
TEMP7 EQU 49H
temp8 equ 4AH
temp9 equ 4BH
temp10 equ 4CH
temp11 EQU 4DH
temp12 EQU 4EH
disp_buf0 EQU 4FH
disp_buf1 EQU 50H
disp_buf2 EQU 51H
disp_buf3 equ 52H
disp_buf4 equ 53H
disp_buf5 equ 54H
Vout_H EQU 55H
Vout_L EQU 56H
Vin_H EQU 57H
Vin_L EQU 58H
Out_delay equ 59H
DISP_POINT EQU 5AH
pro_delay equ 5BH
DISP_DATA EQU 5CH
ITEMP EQU 5DH
cnt_2ms EQU 5EH
cnt_100ms EQU 5FH
cnt_1s EQU 60H
relay_delay_time EQU 61H
disp_fresh equ 62H
FLAG1 EQU 63H
SW1_VALUE EQU 64H
check_temp_dly equ 65H
TEMP0 EQU 66H
SAMPLETIME EQU 67H ;FOR STORE THE SAMPLE TIME
ADDATA EQU 68H
startup equ 69H
Vin_BUFF0 EQU 6AH
Vin_BUFF1 EQU 6BH
Vin_BUFF2 EQU 6CH
Vin_BUFF3 EQU 6DH
Vin_BUFF4 EQU 6EH
Vin_BUFF5 EQU 6FH
Vin_BUFF6 EQU 70H
Vin_BUFF7 EQU 71H
Vin_BUFF8 EQU 72H
Vin_BUFF9 EQU 73H
Vin_BUFF10 EQU 74H
Vin_BUFF11 EQU 75H
Vin_BUFF12 EQU 76H
Vin_BUFF13 EQU 77H
Vin_BUFF14 EQU 78H
Vin_BUFF15 EQU 79H
Vin_BUFF16 EQU 7AH
Vin_BUFF17 EQU 7BH
Vin_BUFF18 EQU 7CH
Vin_BUFF19 EQU 7DH
Vin_BUFF20 EQU 7EH
Vin_BUFF21 EQU 7FH
Vin_BUFF22 EQU 80H
Vin_BUFF23 EQU 81H
Vin_BUFF24 EQU 82H
Vin_BUFF25 EQU 83H
Vin_BUFF26 EQU 84H
Vin_BUFF27 EQU 85H
Vin_BUFF28 EQU 86H
Vin_BUFF29 EQU 87H
Vin_BUFF30 EQU 88H
Vin_BUFF31 EQU 89H
Vout_BUFF0 EQU 8AH
Vout_BUFF1 EQU 8BH
Vout_BUFF2 EQU 8CH
Vout_BUFF3 EQU 8DH
Vout_BUFF4 EQU 8EH
Vout_BUFF5 EQU 8FH
Vout_BUFF6 EQU 90H
Vout_BUFF7 EQU 91H
Vout_BUFF8 EQU 92H
Vout_BUFF9 EQU 93H
Vout_BUFF10 EQU 94H
Vout_BUFF11 EQU 95H
Vout_BUFF12 EQU 96H
Vout_BUFF13 EQU 97H
Vout_BUFF14 EQU 98H
Vout_BUFF15 EQU 99H
Vout_BUFF16 EQU 9AH
Vout_BUFF17 EQU 9BH
Vout_BUFF18 EQU 9CH
Vout_BUFF19 EQU 9DH
Vout_BUFF20 EQU 9EH
Vout_BUFF21 EQU 9FH
Vout_BUFF22 EQU 0A0H
Vout_BUFF23 EQU 0A1H
Vout_BUFF24 EQU 0A2H
Vout_BUFF25 EQU 0A3H
Vout_BUFF26 EQU 0A4H
Vout_BUFF27 EQU 0A5H
Vout_BUFF28 EQU 0A6H
Vout_BUFF29 EQU 0A7H
Vout_BUFF30 EQU 0A8H
Vout_BUFF31 EQU 0A9H
;===========================================
;DEFINE IRQM REGISTER SPECIAL BIT
INTM EQU 7
ADCM EQU 6
TM1M EQU 1
;DEFINE IRQF REGISTER SPECIAL BIT
ADCF EQU 6
PAF EQU 4
TM3F EQU 3
TM2F EQU 2
TM1F EQU 1
;DEFINE STATUS REGISTER SPECIAL BIT
C EQU 0
Z EQU 2
;DEFINE TM1_CTL1 REGISTER SPECIAL BIT
TM1_EN EQU 7
WR_CNT EQU 6
SUR1 EQU 5
SUR0 EQU 4
EDGE EQU 3
PRE2 EQU 2
PRE1 EQU 1
PRE0 EQU 0
;DEFINE TM2_CTL1 REGISTER SPECIAL BIT
TM2_EN EQU 7
;DEFINE TM3_CTL REGISTER SPECIAL BIT
TM3_EN EQU 7
;DEFINE AD_CTL1 REGISTER SPECIAL BIT
EN EQU 7
MODE EQU 5
CHSEL1 EQU 1
CHSEL0 EQU 0
;DEFINE PA_DAT REGISTER SPECIAL BIT
#define _WORK PA_DAT,7;CLK2
#define _DELAY PA_DAT,6;SDA
#define _UNUSUAL PA_DAT,5;CLK1
;#define ON_OFF PA_DAT,4
#define _RL1 PA_DAT,3
#define _RL2 PA_DAT,2
#define _RL3 PA_DAT,1
#define _RL4 PA_DAT,0
;DEFINE PB_DAT REGISTER SPECIAL BIT
#define _RL5 PB_DAT,3
#define _Tmptest PB_DAT,2
;DEFINE PC_DAT REGISTER SPECIAL BIT
#define _SW PC_DAT,0
;===========================================
#define RL1_status FLAG1,0
#define RL2_status FLAG1,1
#define RL3_status FLAG1,2
#define RL4_status FLAG1,3
#define timers100 FLAG1,5
#define fresh_adc FLAG1,6
#define temp_status FLAG1,7
#define sys_status0 flag,0 ;sys_status1,sys_status0:00 is delay;01 is normal;
#define sys_status1 flag,1 ;sys_status1,sys_status0:10 is high;11 is low.
#define bLED0 FLAG,2
#define bLED1 FLAG,3
#define bLED2 FLAG,4
#define bSW_delay flag,5
#define out_on flag,6 ;the flag when out is on
#define flash flag,7 ;the flag when get to 1 second
;===========================================
_3sens equ .3
_3minutes equ .180
_500ms equ .250
_200ms equ .100
_3s equ .3
_30S equ .30
MAX_SAMPLE_TIME EQU .40;.250
ZERO_SAMPLE_TIME equ .80
ADC_CLOCK EQU B'00000001' ;Fadc is Fsys/8
RL1_pointL EQU .131
RL1_pointH EQU .137
RL2_pointL EQU .163
RL2_pointH EQU .171
RL3_pointL equ .205
RL3_pointH EQU .213
RL4_pointL equ .205
RL4_pointH EQU .240
;===========================================
;SEND_DISP_DATA MACRO
;MOVLA .8
;MOVAM ITEMP
;rotate_loop:
;BC SDA
;BTSC disp_data,7
;bs SDA
;BC clk1
;nop
;nop
;BS clk1
;nop
;nop
;nop
;nop
;BC clk1
;DECSZ itemp,M ;judge counte if end rotate
;LGOTO lit_h
;LGOTO EXIT_M
;lit_h:
;RL disp_data,M
;LGOTO rotate_loop
;EXIT_M:
;ENDM
;===========================================
;OFF_LIGHT_LED MACRO
;BS ON_OFF
;ENDM
;===========================================
;ON_LIGHT_LED MACRO
;BC ON_OFF
;ENDM
;===========================================
;OFFER_CLK2 macro
;BC sda
;TMSC disp_point
;BS sda
;BC clk2
;nop
;nop
;nop
;BS clk2
;nop
;nop
;nop
;nop
;nop
;BC clk2
;endm
;===========================================
ORG 000H
LGOTO MAIN
ORG 004H
LGOTO INT
org 010h
INT:
MOVAM A_BUF
SWAP STATUS,A
MOVAM STATUS_BUF
;==================
BTSC IRQF,TM1F
LGOTO TM1_INT
BTSC IRQF,TM2F
LGOTO TM2_INT
BTSC IRQF,TM3F
LGOTO TM3_INT
BTSC IRQF,PAF
LGOTO PA_INT
;BTSC IRQF,ADCF
;LGOTO AD_INT
;=================
INT_END:
SWAP STATUS_BUF,A
MOVAM STATUS
SWAP A_BUF,m
SWAP A_BUF,A
RETI
;==========================================
PA_INT:
BC IRQF,PAF
LGOTO INT_END
TM2_INT:
BC IRQF,TM2F
LGOTO INT_END
TM3_INT:
BC IRQF,TM3F
LGOTO INT_END
;===========================================
TM1_INT:
BC IRQF,TM1F
TM1INT_LOOP0:
TMSC SAMPLETIME
DEC SAMPLETIME,M
INC cnt_2ms,m
movla .4;.25
sub cnt_2ms,a
BTSS STATUS,C
LGOTO int_end
;========timer 2ms
CLR cnt_2ms
;OFF_LIGHT_LED
;movla disp_buf0
;add disp_point,a
;movam FSR
;MOV INDF,A
;MOVAM disp_data
;SEND_DISP_DATA
;OFFER_CLK2
;ON_LIGHT_LED
;inc disp_point,m
;movla .6
;sub disp_point,a
;BTSS STATUS,C
;LGOTO TM1INT_LOOP1
;CLR disp_point
TM1INT_LOOP1:
TMSC disp_fresh
dec disp_fresh,m
tmsc relay_delay_time
dec relay_delay_time,m
;========timer 100ms
inc cnt_100ms,m
movla .50
sub cnt_100ms,a
btss STATUS,C
lgoto INT_END
CLR CNT_100MS
tmsc startup
dec startup,m
;========timer 1s
inc cnt_1s,m
movla .10
sub cnt_1s,a
btss STATUS,C
lgoto int_end
clr cnt_1s
TMSC out_delay
DEC out_delay,m
tmsc check_temp_dly
dec check_temp_dly,m
tmsc pro_delay
dec pro_delay,m
LGOTO INT_END
;===========================================
;===========================================
MAIN:
LCALL SYS_INITIALIZE
MAIN_LOOP:
lcall Input_Module
lcall Detect_Module
lcall Output_Module
lcall Regulate_Module
lcall Display_Module
lgoto Main_loop
;===========================================
SYS_INITIALIZE:
MOVLA 40H
MOVAM FSR
RAM_CLEAR:
CLR INDF
INC FSR,m
MOV FSR,A
SUBLA 0BFH
BTSC STATUS,C
LGOTO RAM_CLEAR
CLR IRQF
CLR IRQM
;========Initialize TM1 special register
movla 68H;B'01101000'
movam TM1_CTL1
movla 00H
MOVAM TM1_CTL2
MOV CLR_CNT,m;clr TM1L_CNT,TM1H_CNT
MOVLA 0D0H;40H
MOVAM TM1L_LA
MOVLA 07H;01H
MOVAM TM1H_LA ;TM1 is preset to time for 500us;80us
;========Initialize TM2 special register
BC TM2_CTL1,TM2_EN
;========Initialize TM3 special register
BC TM3_CTL,TM3_EN
;========define PA,PB,and PC porte
movla 00H
MOVAM PA_DIR;PA is defined as output porte
movla 00H
MOVAM PA_PLU;DISABLE PA.7-0 PULL-UP
MOVLA 07H
MOVAM PB_DIR;PB.3 is defined as output porte
CLR PB_PLU;PULL-UP is disabled
movla 03H
MOVAM PC_DIR
movla 01h
movam PC_PLU;PC.0 PULL-UP enabled
;========define ADC
;MOVLA 00H
;MOVAM AD_CTL1
;MOVLA 03H
;MOVAM AD_CTL3;PB.2,PB1.,PB.0 are defined as AN2,AN1,AN0
;========Initialize some ram status
BC _RL1
BC _RL2
BC _RL3
BC _RL4
BC _RL5
bc RL1_status
bc RL2_status
bc RL3_status
bc RL4_status
BC OUT_ON
movla _3sens
movam out_delay
BS bSW_delay
clr disp_point
clr relay_delay_time
CLR disp_fresh
movla .5
movam startup
;MOVLA 0FFH
;MOVAM disp_buf0
;MOVAM disp_buf1
;MOVAM disp_buf2
;MOVAM disp_buf3
;MOVAM disp_buf4
;MOVAM disp_buf5
BC sys_status0
BC sys_status1
BC bled0
BC bled1
BC bled2
;========enable IRQM,TM1
CLR IRQF
BS IRQM,INTM
BS IRQM,TM1M
BS TM1_CTL1,TM1_EN
ret
;===========================================
Input_Module:
lcall sample_INvol
clr temp3
clr temp4
;MOV Vin_BUFF29,a
;MOVAM Vin_BUFF31
;ADD TEMP4,M
;MOV Vin_BUFF28,A
;MOVAM Vin_BUFF30
;ADDC TEMP3,M
;MOV Vin_BUFF27,A
;MOVAM Vin_BUFF29
;ADD TEMP4,M
;MOV Vin_BUFF26,A
;MOVAM Vin_BUFF28
;ADDC TEMP3,M
;MOV Vin_BUFF25,A
;MOVAM Vin_BUFF27
;ADD TEMP4,M
;MOV Vin_BUFF24,A
;MOVAM Vin_BUFF26
;ADDC TEMP3,M
;MOV Vin_BUFF23,A
;MOVAM Vin_BUFF25
;ADD TEMP4,M
;MOV Vin_BUFF22,A
;MOVAM Vin_BUFF24
;ADDC TEMP3,M
;MOV Vin_BUFF21,A
;MOVAM Vin_BUFF23
;ADD TEMP4,M
;MOV Vin_BUFF20,A
;MOVAM Vin_BUFF22
;ADDC TEMP3,M
;MOV Vin_BUFF19,A
;MOVAM Vin_BUFF21
;ADD TEMP4,M
;MOV Vin_BUFF18,A
;MOVAM Vin_BUFF20
;ADDC TEMP3,M
;MOV Vin_BUFF17,A
;MOVAM Vin_BUFF19
;ADD TEMP4,M
;MOV Vin_BUFF16,A
;MOVAM Vin_BUFF18
;ADDC TEMP3,M
;MOV Vin_BUFF15,A
;MOVAM Vin_BUFF17
;ADD TEMP4,M
;MOV Vin_BUFF14,A
;MOVAM Vin_BUFF16
;ADDC TEMP3,M
MOV Vin_BUFF13,A
MOVAM Vin_BUFF15
ADD TEMP4,M
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