/* *  arch/s390/kernel/entry.S *    S390 low-level entry points. * *  S390 version *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), *               Hartmut Penner (hp@de.ibm.com), *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), */#include <linux/sys.h>#include <linux/linkage.h>#include <linux/config.h>#include <asm/cache.h>#include <asm/lowcore.h>#include <asm/errno.h>#include <asm/smp.h>#include <asm/ptrace.h>/* * Stack layout for the system_call stack entry. * The first few entries are identical to the user_regs_struct. */SP_PTREGS    =  STACK_FRAME_OVERHEAD SP_PSW       =  STACK_FRAME_OVERHEAD + PT_PSWMASKSP_R0        =  STACK_FRAME_OVERHEAD + PT_GPR0SP_R1        =  STACK_FRAME_OVERHEAD + PT_GPR1SP_R2        =  STACK_FRAME_OVERHEAD + PT_GPR2SP_R3        =  STACK_FRAME_OVERHEAD + PT_GPR3SP_R4        =  STACK_FRAME_OVERHEAD + PT_GPR4SP_R5        =  STACK_FRAME_OVERHEAD + PT_GPR5SP_R6        =  STACK_FRAME_OVERHEAD + PT_GPR6SP_R7        =  STACK_FRAME_OVERHEAD + PT_GPR7SP_R8        =  STACK_FRAME_OVERHEAD + PT_GPR8SP_R9        =  STACK_FRAME_OVERHEAD + PT_GPR9SP_R10       =  STACK_FRAME_OVERHEAD + PT_GPR10SP_R11       =  STACK_FRAME_OVERHEAD + PT_GPR11SP_R12       =  STACK_FRAME_OVERHEAD + PT_GPR12SP_R13       =  STACK_FRAME_OVERHEAD + PT_GPR13SP_R14       =  STACK_FRAME_OVERHEAD + PT_GPR14SP_R15       =  STACK_FRAME_OVERHEAD + PT_GPR15SP_AREGS     =  STACK_FRAME_OVERHEAD + PT_ACR0SP_ORIG_R2   =  STACK_FRAME_OVERHEAD + PT_ORIGGPR2/* Now the additional entries */SP_TRAP      =  (SP_ORIG_R2+GPR_SIZE)#if CONFIG_REMOTE_DEBUGSP_CRREGS    =  (SP_TRAP+4)/* fpu registers are saved & restored by the gdb stub itself */SP_FPC       =  (SP_CRREGS+(NUM_CRS*CR_SIZE))SP_FPRS      =  (SP_FPC+FPC_SIZE+FPC_PAD_SIZE)SP_PGM_OLD_ILC= (SP_FPRS+(NUM_FPRS*FPR_SIZE))#elseSP_PGM_OLD_ILC= (SP_TRAP+4)#endifSP_SIZE      =  (SP_PGM_OLD_ILC+4)/* * these defines are offsets into the thread_struct */_TSS_PTREGS  = 0_TSS_FPRS    = (_TSS_PTREGS+8)_TSS_AR2     = (_TSS_FPRS+136)_TSS_AR4     = (_TSS_AR2+4)_TSS_KSP     = (_TSS_AR4+4)_TSS_USERSEG = (_TSS_KSP+8)_TSS_PROT    = (_TSS_USERSEG+8)_TSS_ERROR   = (_TSS_PROT+8)_TSS_TRAP    = (_TSS_ERROR+4)_TSS_PER     = (_TSS_TRAP+4)_TSS_IEEE    = (_TSS_PER+72)_TSS_FLAGS   = (_TSS_IEEE+8)/* * these are offsets into the task-struct. */state        =  0flags        =  8sigpending   = 16need_resched = 32tsk_ptrace   = 40processor    = 88/* * Register usage in interrupt handlers: *    R9  - pointer to current task structure *    R13 - pointer to literal pool *    R14 - return register for function calls *    R15 - kernel stack pointer */        .macro  SAVE_ALL psworg,sync     # system entry macro        stmg    %r14,%r15,__LC_SAVE_AREA        tm      \psworg+1,0x01           # test problem state bit	stam    %a2,%a4,__LC_SAVE_AREA+16	.if	\sync        jz      1f                       # skip stack setup save	.else	jnz	0f			 # from user -> load kernel stack	lg	%r14,__LC_ASYNC_STACK	 # are we already on the async. stack ?	slgr	%r14,%r15	srag	%r14,%r14,14	jz	1f	lg	%r15,__LC_ASYNC_STACK	 # load async. stack	j	1f	.endif0:	lg      %r15,__LC_KERNEL_STACK   # problem state -> load ksp	larl	%r14,.Lc_ac	lam	%a2,%a4,0(%r14)1:      aghi    %r15,-SP_SIZE            # make room for registers & psw        nill    %r15,0xfff8              # align stack pointer to 8        stmg    %r0,%r14,SP_R0(%r15)     # store gprs 0-14 to kernel stack        stg     %r2,SP_ORIG_R2(%r15)     # store original content of gpr 2        mvc     SP_R14(16,%r15),__LC_SAVE_AREA # move R15 to stack        stam    %a0,%a15,SP_AREGS(%r15)  # store access registers to kst.        mvc     SP_AREGS+8(12,%r15),__LC_SAVE_AREA+16 # store ac. regs        mvc     SP_PSW(16,%r15),\psworg  # move user PSW to stack        lhi     %r0,\psworg              # store trap indication        st      %r0,SP_TRAP(%r15)        xc      0(8,%r15),0(%r15)        # clear back chain        .endm        .macro  RESTORE_ALL sync         # system exit macro        mvc     __LC_RETURN_PSW(16),SP_PSW(%r15) # move user PSW to lowcore        lam     %a0,%a15,SP_AREGS(%r15)  # load the access registers        lmg     %r0,%r15,SP_R0(%r15)     # load gprs 0-15 of user        ni      __LC_RETURN_PSW+1,0xfd   # clear wait state bit        lpswe   __LC_RETURN_PSW          # back to caller        .endm        .macro  GET_CURRENT	lg	%r9,__LC_KERNEL_STACK    # load pointer to task_struct to %r9	aghi	%r9,-16384        .endm/* * Scheduler resume function, called by switch_to *  grp2 = (thread_struct *) prev->tss *  grp3 = (thread_struct *) next->tss * Returns: *  gpr2 = prev */        .globl  resumeresume:        lg      %r4,_TSS_PTREGS(%r3)        tm      SP_PSW-SP_PTREGS(%r4),0x40 # is the new process using per ?        jz      resume_noper            # if not we're fine        stctg   %c9,%c11,48(%r15)       # We are using per stuff        clc     _TSS_PER(24,%r3),48(%r15)        je      resume_noper            # we got away without bashing TLB's        lctlg   %c9,%c11,_TSS_PER(%r3)  # Nope we didn'tresume_noper:        stmg    %r6,%r15,48(%r15)       # store resume registers of prev task        stg     %r15,_TSS_KSP(%r2) # store kernel stack ptr to prev->tss.ksp        lghi    %r0,-16384        ngr     %r0,%r15        lg      %r15,_TSS_KSP(%r3) # load kernel stack ptr from next->tss.ksp        lghi    %r1,16383        ogr     %r1,%r15        aghi    %r1,1        stg     %r1,__LC_KERNEL_STACK   # __LC_KERNEL_STACK = new kernel stack        stam    %a2,%a2,_TSS_AR2(%r2)   # store kernel access reg. 2        stam    %a4,%a4,_TSS_AR4(%r2)   # store kernel access reg. 4        lam     %a2,%a2,_TSS_AR2(%r3)   # load kernel access reg. 2        lam     %a4,%a4,_TSS_AR4(%r3)   # load kernel access reg. 4        lgr     %r2,%r0                 # return task_struct of last task        lmg     %r6,%r15,48(%r15)       # load resume registers of next task        br      %r14/* * do_softirq calling function. We want to run the softirq functions on the * asynchronous interrupt stack. */	.global do_call_softirqdo_call_softirq:	stmg	%r12,%r15,48(%r15)	lgr	%r12,%r15	lg	%r0,__LC_ASYNC_STACK	slgr    %r0,%r15	srag	%r0,%r0,14	je	0f	lg	%r15,__LC_ASYNC_STACK0:	aghi	%r15,-STACK_FRAME_OVERHEAD	stg	%r12,0(%r15)		# store back chain	brasl	%r14,do_softirq	lmg	%r12,%r15,48(%r12)	br	%r14	/* * SVC interrupt handler routine. System calls are synchronous events and * are executed with interrupts enabled. */	.globl  system_callsystem_call:        SAVE_ALL __LC_SVC_OLD_PSW,1	mvi     SP_PGM_OLD_ILC(%r15),1  # mark PGM_OLD_ILC as invalidpgm_system_call:        GET_CURRENT               # load pointer to task_struct to R9	larl    %r7,sys_call_table	llgc    %r8,__LC_SVC_INT_CODE+1 # get svc number from lowcore	stosm   48(%r15),0x03     # reenable interrupts        sll     %r8,3        tm      SP_PSW+3(%r15),0x01  # are we running in 31 bit mode ?        jo      sysc_noemu	la      %r8,4(%r8)        # use 31 bit emulation system callssysc_noemu:        lgf     %r8,0(%r8,%r7)    # load address of system call routine        tm      tsk_ptrace+7(%r9),0x02 # PT_TRACESYS        jnz     sysc_tracesys        basr    %r14,%r8          # call sys_xxxx        stg     %r2,SP_R2(%r15)   # store return value (change R2 on stack)                                  # ATTENTION: check sys_execve_glue before                                  # changing anything here !!sysc_return:        tm      SP_PSW+1(%r15),0x01 # returning to user ?        jno     sysc_leave        # no-> skip bottom half, resched & signal## check, if reschedule is needed#	lg      %r0,need_resched(%r9) # get need_resched from task_struct	ltgr    %r0,%r0        jnz     sysc_reschedule        icm     %r0,15,sigpending(%r9)     # get sigpending from task_struct        jnz     sysc_signal_returnsysc_leave:        tm      SP_PGM_OLD_ILC(%r15),0xff        jz      pgm_svcret	stnsm   48(%r15),0xfc         # disable I/O and ext. interrupts        RESTORE_ALL 1## call do_signal before return#sysc_signal_return:             la      %r2,SP_PTREGS(%r15) # load pt_regs        sgr     %r3,%r3             # clear *oldset	larl    %r14,sysc_leave	jg      do_signal           # return point is sysc_leave## call trace before and after sys_call#sysc_tracesys:	lghi    %r2,-ENOSYS	stg     %r2,SP_R2(%r15)     # give sysc_trace an -ENOSYS retval        brasl   %r14,syscall_trace	lg      %r2,SP_R2(%r15)	cghi    %r2,-ENOSYS	je      sysc_tracesys_dn1   	sllg    %r2,%r2,56          # strace wants to change the syscall	srlg    %r2,%r2,53          # zap unused bits & multiply by 8	tm      SP_PSW+3(%r15),0x01 # are we running in 31 bit mode ?        jo      sysc_tracesys_noemu	la      %r2,4(%r2)          # use 31 bit emulation system callssysc_tracesys_noemu:	lgf	%r8,0(%r2,%r7)      # load address of system call routinesysc_tracesys_dn1:		lmg     %r3,%r6,SP_R3(%r15)	lg      %r2,SP_ORIG_R2(%r15)        basr    %r14,%r8            # call sys_xxx        stg     %r2,SP_R2(%r15)     # store return value	larl    %r14,sysc_return        jg      syscall_trace       # return point is sysc_return## call schedule with sysc_return as return-address#sysc_reschedule:        	larl    %r14,sysc_return        jg      schedule            # return point is sysc_return## a new process exits the kernel with ret_from_fork#        .globl  ret_from_forkret_from_fork:          GET_CURRENT               # load pointer to task_struct to R9        stosm   48(%r15),0x03     # reenable interrupts