/*******************************************************************************
*	@ModuleName  ::	TiDTV_TVP5160.h
*	
*	@Copyright	 ::	Copyright 2005- Texas Instruments, Inc.
*	
*	@Description ::	Constants and definitions for TVP5160
*	
*	@History     ::
*---------------------------------------
*	11-12-2005	W.Shi	Created
*******************************************************************************/

#ifndef _TI_DTV_TVP5160_H_
#define _TI_DTV_TVP5160_H_

//----------------------------------------------------------
#define	TVP5160_I2C_CHANNEL			0
#define	TVP5160_I2C_DEVICE_ADDR		0xB8

#define	TiDTV_Tvp5160I2cWrite(ByteSize, pDataBuf, TimeOut)		\
				TiDTV_I2cWrite(TVP5160_I2C_CHANNEL,				\
								0,								\
								TVP5160_I2C_DEVICE_ADDR,		\
								ByteSize,						\
								pDataBuf,						\
								TimeOut)

#define	TiDTV_Tvp5160I2cRead(SubAddr, ByteSize, pDataBuf, TimeOut)	\
				TiDTV_I2cRead(TVP5160_I2C_CHANNEL,				\
								0,								\
								TVP5160_I2C_DEVICE_ADDR,		\
								1,								\
								SubAddr,						\
								ByteSize,						\
								pDataBuf,						\
								TimeOut)

//----------------------------------------------------------
// Register definitions
//
#define TVP5160_REG_INPUT_SEL				0x00
#define TVP5160_REG_AFE_GAIN_OFFSET			0x01
#define TVP5160_REG_SELECT_MODE				0x02
#define TVP5160_REG_OPERATION_MODE			0x03
#define TVP5160_REG_AUTOSWITCH_MASK_1		0x04
#define TVP5160_REG_COLOR_KILLER_THRESHOLD	0x05
#define TVP5160_REG_LUMA_1					0x06
#define TVP5160_REG_LUMA_2					0x07
#define TVP5160_REG_LUMA_3					0x08
#define TVP5160_REG_LUMA_BRIGHTNESS			0x09
#define TVP5160_REG_LUMA_CONTRAST			0x0A
#define TVP5160_REG_COLOR_SATURATION		0x0B
#define TVP5160_REG_HUE						0x0C
#define TVP5160_REG_CHROMA_1				0x0D
#define TVP5160_REG_CHROMA_2				0x0E
#define TVP5160_REG_COMPONENT_GAIN_R_PR		0x10
#define TVP5160_REG_COMPONENT_GAIN_G_Y		0x11
#define TVP5160_REG_COMPONENT_GAIN_B_PB		0x12
#define TVP5160_REG_AVID_START_LSB			0x16
#define TVP5160_REG_AVID_START_MSB			0x17
#define TVP5160_REG_AVID_STOP_LSB			0x18
#define TVP5160_REG_AVOD_STOP_MSB			0x19
#define TVP5160_REG_HSYN_START				0x1A
#define TVP5160_REG_HSYN_STOP_LSB			0x1C
#define TVP5160_REG_VSYN_START_LSB			0x1E
#define TVP5160_REG_VSYN_STOP_LSB			0x20
#define TVP5160_REG_VBLK_START_LSB			0x22
#define TVP5160_REG_VBLK_STOP_LSB			0x24
#define TVP5160_REG_FAST_SWITCH				0x28
#define TVP5160_REG_FSO_DELAY				0x29
#define TVP5160_REG_FSS_DELAY				0x2A
#define TVP5160_REG_OVERLAY_DELAY			0x2B
#define TVP5160_REG_SCART_DELAY				0x2C
#define TVP5160_REG_CTI_CORING_GAIN			0x2E
#define TVP5160_REG_BRIGHTNESS_X			0x2F
#define TVP5160_REG_AUTOSWITCH_MASK_2		0x30
#define TVP5160_REG_GENLOCK					0x31
#define TVP5160_REG_SYNC_CTRL				0x32
#define TVP5160_REG_OUTPUT_FMT_1			0x33
#define TVP5160_REG_OUTPUT_FMT_2			0x34
#define TVP5160_REG_OUTPUT_FMT_3			0x35
#define TVP5160_REG_OUTPUT_FMT_4			0x36
#define TVP5160_REG_OUTPUT_FMT_5			0x37
#define TVP5160_REG_OUTPUT_FMT_6			0x38
#define TVP5160_REG_CLEAR_LOST_LOCK			0x39
#define TVP5160_REG_STATUS_1				0x3A
#define TVP5160_REG_STATUS_2				0x3B
#define TVP5160_REG_STATUS_3				0x3C
#define TVP5160_REG_STATUS_4				0x3E
#define TVP5160_REG_STATUS_5				0x3F
#define TVP5160_REG_GPIO_IN_1				0x40
#define TVP5160_REG_VERT_COUNT_LSB			0x42
#define TVP5160_REG_ANALOG_GAIN_CHAN_1		0x46
#define TVP5160_REG_ANALOG_GAIN_CHAN_2		0x47
#define TVP5160_REG_ANALOG_GAIN_CHAN_3		0x48
#define TVP5160_REG_ANALOG_GAIN_CHAN_4		0x49
#define TVP5160_REG_FINE_GAIN_BPB_LSB		0x4A
#define TVP5160_REG_FINE_GAIN_G_CR_LSB		0x4C
#define TVP5160_REG_FINE_GAIN_RPR_LSB		0x4E
#define TVP5160_REG_FINE_GAIN_CVBS_Y_LSB	0x50
#define TVP5160_REG_TV_KP					0x52
#define TVP5160_REG_TV_KI					0x53
#define TVP5160_REG_VCR_KP					0x54
#define TVP5160_REG_VCR_KI					0x55
#define TVP5160_REG_COARSE_PHERR_LIMIT		0x56
#define TVP5160_REG_Y_NOISE_SFACTOR			0x5A
#define TVP5160_REG_UV_NOISE_SFACTOR		0x5B
#define TVP5160_REG_Y_NOISE_SENSITIVITY		0x5C
#define TVP5160_REG_UV_CORING_THRESHOLD		0x5D
#define TVP5160_REG_LOW_NOISE_LIMIT			0x5E
#define TVP5160_REG_BLUE_SCREEN_CB			0x60
#define TVP5160_REG_BLUE_SCREEN_CR			0x61
#define TVP5160_REG_RESET_VPLL				0x63
#define TVP5160_REG_NOISE_MEASUREMENT_MSB	0x65
#define TVP5160_REG_VSYNC_FILTER_SHIFT		0x68
#define TVP5160_REG_COLOR_AGC_CTRL			0x6A
#define TVP5160_REG_LUMA_PEAK_CTRL			0x6B
#define TVP5160_REG_GAIN_FACTOR_DISABLE		0x6C
#define TVP5160_REG_SECAM_AMP_REF_DIS		0x6D
#define TVP5160_REG_SECAM_GAIN_FACTOR_DIS	0x6E
#define TVP5160_REG_AGC_DEC_SPEED			0x6F
#define TVP5160_REG_ROM_VESRION				0x70
#define TVP5160_REG_TV_VCR_THRESHOLD		0x73
#define TVP5160_REG_WHITE_PEAK_PROCESSING	0x74
#define TVP5160_REG_DTO_FREE_RUN			0x75
#define TVP5160_REG_H_SHAKE_THRESHOLD		0x76
#define TVP5160_REG_H_SHAKE_INC				0x77
#define TVP5160_REG_AGC_INC_SPEED			0x78
#define TVP5160_REG_GAIN_INC_DELAY			0x79
#define TVP5160_REG_VLOCK_FRAME_OFFSET		0x7D
#define TVP5160_REG_DEVICE_ID_MSB			0x80
#define TVP5160_REG_DEVICE_ID_LSB			0x81
#define TVP5160_REG_CPLL_SPEED_CTRL         0x83
#define TVP5160_REG_SIGN_CHANGE_COUNT		0x8C
#define TVP5160_REG_HPLL_PIXEL_OFFSET		0x91
#define TVP5160_REG_F_BIT_MIN_TIME			0x92
#define TVP5160_REG_F_BIT_MAX_TIME			0x93
#define TVP5160_REG_VER_TRIGGER_LEVEL_CTRL	0x94
#define TVP5160_REG_WEAK_SIGNAL_HIGH_THR	0x95
#define TVP5160_REG_WEAK_SIGNAL_LOW_THR		0x96
#define TVP5160_REG_STATUS_REQUEST			0x97
#define TVP5160_REG_FRAME_SUM_CDTO_THR_NTSC	0x98
#define TVP5160_REG_FRAME_SUM_CDTO_THR_PAL	0x99
#define TVP5160_REG_VERTICAL_COUNT			0x9A
#define TVP5160_REG_ALC_SPEED				0x9C
#define TVP5160_REG_PSEUDO_SYNC_CTRL		0x9D
#define TVP5160_REG_GAIN_RANGE_CTRL			0x9F
#define TVP5160_REG_ALC_FREEZE_LUMA			0xA0
#define TVP5160_REG_ALC_FREEZE_CHROMA		0xA1
#define TVP5160_REG_FIFO_READ_DATA			0xBE
#define TVP5160_REG_FIFO_RESET				0xBF
#define TVP5160_REG_VDP_FIFO_OUT_CTRL		0xC0
#define TVP5160_REG_LINE_NUMBER_INTERRUPT	0xC1
#define TVP5160_REG_PIXEL_ALIGNMENT_LSB		0xC2
#define TVP5160_REG_CNT_THR_NOM_COARSE		0xC4
#define TVP5160_REG_SYNC_HEIGHT_LO_THR		0xC5
#define TVP5160_REG_SYNC_HEIGHT_HI_THR		0xC6
#define TVP5160_REG_COUNT3_LO_THR			0xC7
#define TVP5160_REG_COUNT3_HI_THR			0xC8
#define TVP5160_REG_TIME_SHIFT_N			0xC9
#define TVP5160_REG_FRAME_CNT_THR_3DYC		0xCB
#define TVP5160_REG_FRAME_CNT_THR_HLOCK		0xCC
#define TVP5160_REG_FRAME_CNT_THR_AGC		0xCD
#define TVP5160_REG_SIGNAL_PRESENT_THR		0xD0
#define TVP5160_REG_FIELD_COUNT_LIMIT		0xD1
#define TVP5160_REG_FIELD_COUNT_THR			0xD2
#define TVP5160_REG_LOST_LOCK_TIMER_INIT	0xD3
#define TVP5160_REG_GLOBAL_LINE_START		0xD6
#define TVP5160_REG_GLOBAL_LINE_STOP		0xD7
#define TVP5160_REG_GLOBAL_LINE_MODE		0xD8
#define TVP5160_REG_FULL_FIELD_ENABLE		0xD9
#define TVP5160_REG_FULL_FIELD				0xDA

//-----------------------------------------------------------------------------
enum _TVP5160_FMT_enum_ {
	TVP5160_VIDEO_NTSC = 1,
	TVP5160_VIDEO_PAL,
	TVP5160_VIDEO_MPAL,
	TVP5160_VIDEO_NPAL,
	TVP5160_VIDEO_NTSC443,
	TVP5160_VIDEO_SECAM,
	TVP5160_VIDEO_PAL60,

	TVP5160_VIDEO_480P = 9,
	TVP5160_VIDEO_576P
};

//-----------------------------------------------------------------------------
typedef struct _TI_DTV_TVP5160_CTRL_ {
	OS_EVENT *pMutexSem;		// Mutual Exclusive Semaphore

	UINT16	Version;			// Version
	UINT8	VideoFmt;			// Input video format
	UINT8	LockStatus;			// Lock status
	UINT8	NvVideoFmt;			// NV Video Format (according to VideoFmt)
} TI_DTV_TVP5160_CTRL;

//----------------------------------------------------------
// defined in "TiDTV_TVP5160.c"
//
extern TI_DTV_TVP5160_CTRL TiDTV_VideoDecCtrl;

void TiDTV_InitVideoDec(void);
void TiDTV_VideoDecHwReset(void);
void TiDTV_VideoDecInputSel(void);
int  TiDTV_VideoDecCheckLockStatus(void);
int  TiDTV_VideoDecCheckVideoFmt(void);
void TiDTV_VideoDecOutputCtrl(int Flag);

int TiDTV_VideoDecCheckTotalVLines(void);
void TiDTV_VideoDecAdjBrightness(int Persentage);
void TiDTV_VideoDecAdjSharpness(int Persentage);
void TiDTV_VideoDecAdjNoiseReduction(int Persentage);
void TiDTV_Tvp5160InitVDP(void);
void TiDTV_Tvp5160InitVDP_2x(void);

#endif	/* _TI_DTV_VIDEO_DEC_H_ */