cregister unsigned int IE,IF,ST,IOF;
interrupt void uart0(void);
interrupt void uart1(void);
#define UART_RESET				*((int *)0x60010)
#define UART_B_BASE_ADDR		0x060000
#define UART_A_BASE_ADDR		0x060008

/*for 5 dip port*/
#define RBR_B					*((int *)(UART_B_BASE_ADDR+0))	
#define THR_B					*((int *)(UART_B_BASE_ADDR+0))	
#define IER_B					*((int *)(UART_B_BASE_ADDR+1))
#define IIR_B					*((int *)(UART_B_BASE_ADDR+2))	
#define FCR_B					*((int *)(UART_B_BASE_ADDR+2))	
#define LCR_B					*((int *)(UART_B_BASE_ADDR+3))
#define MCR_B					*((int *)(UART_B_BASE_ADDR+4))
#define LSR_B					*((int *)(UART_B_BASE_ADDR+5))
#define MSR_B					*((int *)(UART_B_BASE_ADDR+6))
#define SCR_B					*((int *)(UART_B_BASE_ADDR+7))
#define DLL_B					*((int *)(UART_B_BASE_ADDR+0))
#define DLM_B					*((int *)(UART_B_BASE_ADDR+1))
#define AFR_B					*((int *)(UART_B_BASE_ADDR+2))
/*for db9 port*/
#define RBR_A		*((int *)(UART_A_BASE_ADDR+0))	
#define THR_A		*((int *)(UART_A_BASE_ADDR+0))	
#define IER_A		*((int *)(UART_A_BASE_ADDR+1))
#define IIR_A		*((int *)(UART_A_BASE_ADDR+2))	
#define FCR_A		*((int *)(UART_A_BASE_ADDR+2))	
#define LCR_A		*((int *)(UART_A_BASE_ADDR+3))
#define MCR_A		*((int *)(UART_A_BASE_ADDR+4))
#define LSR_A		*((int *)(UART_A_BASE_ADDR+5))
#define MSR_A		*((int *)(UART_A_BASE_ADDR+6))
#define SCR_A		*((int *)(UART_A_BASE_ADDR+7))
#define DLL_A		*((int *)(UART_A_BASE_ADDR+0))
#define DLM_A		*((int *)(UART_A_BASE_ADDR+1))
#define AFR_A		*((int *)(UART_A_BASE_ADDR+2))

#define IE_RX			1
#define LOOPBACK 		0x10
#define LC_8_BITS		3
#define LC_0_STOP		0
#define LC_NONE_PARITY	0
#define LC_0_DLAB		0
#define LC_1_DLAB		8
unsigned char inp_buffer[0x100]; 
int flag,index; 

main()
{
	int i;  

	unsigned int *VECS=(unsigned int *)0x809fc0;  
	IE=4; /*IE == 8 FOR A ;IE == 4 FOR B*/    
	IF=0;
	IOF  = 0x66;	
/*	UART_RESET=0; reset uart*/
	*(VECS+4)=0x60000000|(unsigned int)uart0; 
	*(VECS+3)=0x60000000|(unsigned int)uart1;       /*initialization interrupt vectors*/
	flag=0;
	index=0;
 /*1= receive 2 = translate*/ 
 /*   LCR_A=0x80;
	DLL_A=0x18;
	DLM_A=0;
    LCR_A=3;
    MCR_A=8;
    IER_A=1;
    FCR_A=0x0f; 
    FCR_A=0x4f; */
            
    LCR_B=0x80;
	DLL_B=0x18;
	DLM_B=0;
    LCR_B=3;
    MCR_B=8;
    IER_B=1; 
    FCR_B=0x0f; 
    FCR_B=0x4f; 
         
    
        
    ST=0x2000;  
    IOF  = 0x22;
    THR_B=0x12;  
 
    for(;;)
    { 
    
     /*THR_A=0x12; 
    	for(flag=LSR_A&0x1;flag==1;);
    	inp_buffer[index]=RBR_A;
    	index++;    
    	if( index == 0x100 ) index =0; */ 
    /*for(flag=LSR_B&0x40;flag==1;);
    	THR_B=0xaa;*/      
    	
    }
}
interrupt void uart0(void)
{       
        
    	inp_buffer[index]=RBR_A;
    	  index++;
    	  index =index%0x100; 
      /*	THR_A=0x21; */  
}
interrupt void uart1(void)
{  
     inp_buffer[index]=RBR_B;
    	  index++;
    	  index =index%0x100;  	
    /*	THR_B=0x55;*/ 
}