?? ethernet.c
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/*--------------------------------------------------------------------------
*
* FILE: ethernet.c
*
* DESCRIPTION:
*
* Exercises SCC1 Ethernet transmit/receive functions, using RX interrupts.
* This program sends 8 Ethernet frames, with each frame containing a
* different data pattern. SCC1 will receive all 8 frames and then vector
* to the external interrupt. In this interrupt, all 8 Rx frames will be
* checked against it's corresponding Tx frame. It also checks for Rx
* errors. If any errors or mismatches exist then red GPL2 on the ADS
* board will be lit. If the transfer of data was successful the green
* signalling GPL1 on the ADS board will stay lit constantly.
*
* For a complete high level explanation, please refer to the applications
* document for this example which is included in the .zip file you received.
* If you are interested in a MPC8272ADS development/evaluation
* system, please contact your local sales representative.
*
* NOTES <<<IMPORTANT: PLEASE READ>>>:
*
* 1) Specifically Designed to run on MPC8272ADS board.
*
* 2) Make sure that data and BDs are either in global (snooped) areas
* of memory or that data cache is disabled for that area.
*
* 3) Using the internal loopback Mode, the driver tests the transmitted
* information against the received and turns on the green GPL1 on
* the ADS board if there is an exact match. If there is not a
* match, then the red GPL2 on the ADS board will be lit.
*
* 4) This driver also takes an external interrupt on a full ethernet
* packet reception. If the interrupt handler does not see Received
* Full status (RXF) in the SCC Event register i.e. an unanticapted
* external interrupt occurs other then SCC1 the red GPL2 on the
* ADS board will flash to signal an error condition.
*
*
* REFERENCES:
*
* 1) MPC8272 Users Manual
* 2) MPC603e Users Manual
* 3) PowerPC Microprocessor Family: The Programming Environments for
* 32-bit Microprocessors
*
*
* HISTORY:
*
* 07 JAN 99 pdw Initial Version. Created from 860 SCC Example
* 10 FEB 99 pdw Updated ISR and re-tested on 8260 VADS board.
* 23 NOV 99 jms Modified code for PILOT Rev boards. The code now reads
* BCSR2 for the board revision and then chooses the correct
* bit positionings for BCSR0 and BCSR1.
* 24 JUN 04 ddc Modified code to run in MPC8272 environment, and removed
* revision modifications
*-------------------------------------------------------------------------*/
#include <string.h>
#include <stdlib.h>
#include "netcomm.h" /* global defines */
#include "mpc8260.h" /* IMM definitions and declarations */
#include "ethernet.h" /* Local header file */
#include "masks8260.h" /* Global mask header file */
/***********************/
/* Global Declarations */
/***********************/
t_PQ2IMM *IMM; /* Internal memory map base pointer */
BDRINGS *RxTxBD; /* buffer descriptors base pointer */
t_BCSR *CSR;
/*-----------------------------------------------*/
/* Set of Data Buffers for Ethernet transmit and */
/* receive data. */
/*-----------------------------------------------*/
TXB TxBufferPool[NUM_TXBDS];
RXB RxBufferPool[NUM_RXBDS];
/*---------------------------------------------------------*/
/* Status parameters of the receive and transmit processes */
/*---------------------------------------------------------*/
UHWORD RxGood; /* Successful RX flag */
UBYTE RxProcIndex; /* Used in Interrupt Hnadler */
UBYTE NotDone; /* Not done processing all eight frames */
/*-----------------------------------------------------*/
/* Interrupt Handler Code to be moved to Address 0x500 */
/*-----------------------------------------------------*/
extern UWORD ExtIntTable[];
/***********************/
/* Function Prototypes */
/***********************/
void InterruptInit(UWORD *, UWORD[]);
void InitBDs(void);
void InitParallelPorts(void);
void InterruptControlInit(void);
void SCC1EtherInit(void);
void ExtIntHandler(UWORD);
void main(void);
void LoadTxBuffers(void);
UHWORD BDEmpty(UHWORD);
UHWORD LastBD(UHWORD);
void Led(UHWORD);
void FlashLed(void);
/*--------------------------------------------------------------------------
*
* FUNCTION NAME: main
*
* DESCRIPTION:
*
* Main function for PQ2 Ethernet example code.
*
* EXTERNAL EFFECT:
*
* PARAMETERS: None
*
* RETURNS: None
*
*-------------------------------------------------------------------------*/
void main()
{
RxGood = TRUE; /* Successful RX flag */
NotDone = TRUE; /* Not Done processing all eight ethernet frames/BDs */
RxProcIndex = 0; /* Used in the interrupt handler */
/*------------------------------------*/
/* Establish IMM pointer at 0x4700000 */
/*------------------------------------*/
IMM = (t_PQ2IMM *)(0x4700000);
CSR = (t_BCSR *)(IMM->mem_regs[1].memc_br & 0xFFFF8000);
/*---------------------------*/
/* Turn Off Green & Red LEDs */
/*---------------------------*/
Led(OFF);
/*--------------------------------------------------------*/
/* Place External Interrupt Handler Code to Address 0x500 */
/*--------------------------------------------------------*/
InterruptInit((UWORD *) EXT_INT_VECTOR, ExtIntTable);
/***********************************************************/
/* Establish base pointer for Tx and Rx buffer descriptors */
/* Get pointer to BD area in DPRAM */
/***********************************************************/
RxTxBD = (BDRINGS *)(BASE_OF_BDS);
/*------------------------------------------------*/
/* Load the Tx buffer pool with the test patterns */
/*------------------------------------------------*/
LoadTxBuffers();
/*-------------------------------------------------------------------*/
/* This function defines a number of buffers for an RX and TX buffer */
/* pool, but does not attempt to manage memory. It uses the first */
/* half of the BD pool for RX and the second half for TX. */
/*-------------------------------------------------------------------*/
InitBDs(); /* Initialize RX and TX BDs */
/*----------------------------------------*/
/* Initialize the parallel port I/O ports */
/*----------------------------------------*/
InitParallelPorts();
/*------------------------------------------*/
/* Initialize Interrupt Controller for SCC1 */
/*------------------------------------------*/
InterruptControlInit();
/*--------------------------------------------------*/
/* Setup BRG clock, Initialize and enable SCC1 for */
/* Ethernet operation in internal loopback mode */
/*--------------------------------------------------*/
SCC1EtherInit();
/*------------------------------------------------------------------*/
/* Come in to the loop and wait until all frames have been sent and */
/* received. The green general purpose LED GP0 on the ADS */
/* board will stay lit until all frames have been received and */
/* checked. If frames are not received properly then the red */
/* general purpose LED GP1 will be lit. If an interrupt external to */
/* to SCC1 is received the red general purpose LED GP1 will be */
/* flashed. This action is initiated in the interrupt handler where */
/* the checking takes place. */
/*------------------------------------------------------------------*/
while (NotDone); /* Spin here until reception is done */
/*---------------------------------------------------------------------*/
/* All eight frames were successfully received. Illuminate General */
/* Signalling LED #0 green. */
/*---------------------------------------------------------------------*/
while (1)
{
/*--------------------------------------*/
/* Turn ON Green general purpose LED GP0 */
/* to indicate error-free reception */
/*--------------------------------------*/
Led(GREEN);
}
} /* End Main */
/*--------------------------------------------------------------------------
*
* FUNCTION NAME: InitBDs
*
*
* DESCRIPTION:
*
* Initializes BD rings to point RX BDs to first half of buffer pool and
* TX BDs to second half of buffer pool. This function also initializes the
* buffer descriptors control and data length fields. It also insures that
* transmit and recieve functions are disabled before buffer descriptors
* are initialized.
*
*
* EXTERNAL EFFECTS: Disable Tx/Rx functions. Changes BDs in dual port ram.
*
* PARAMETERS: None
*
* RETURNS: None
*
*-------------------------------------------------------------------------*/
void InitBDs()
{
UHWORD index;
/*********************************************/
/* Disable SCC1 while we program the buffer */
/* descriptors */
/*********************************************/
/*----------------------------------------------------------------*/
/* Clear the ENT/ENR bits in the GSMR -- disable Transmit/Receive */
/*----------------------------------------------------------------*/
IMM->scc_regs[SCC1].gsmr_l &= DISABLE_TX_RX;
/*--------------------------------------*/
/* Issue Init Stop TX Command for SCC1. */
/*--------------------------------------*/
while ((IMM->cpm_cpcr & CPCR_FLG) != READY_TO_RX_CMD);
IMM->cpm_cpcr = CPCR_STOP_TX |
SCC1_PAGE_SUBBLOCK |
CPCR_FLG; /* ISSUE COMMAND */
while ((IMM->cpm_cpcr & CPCR_FLG) != READY_TO_RX_CMD);
/*-------------------*/
/* Initialize RxBDs. */
/*-------------------*/
for (index = 0; index < NUM_RXBDS; index++)
{
/*--------------------------*/
/* Allocate Receive Buffers */
/*--------------------------*/
RxTxBD->RxBD[index].bd_addr = (UBYTE *)&RxBufferPool[index];
RxTxBD->RxBD[index].bd_length = 0; /* reset */
if( index != (NUM_RXBDS-1) )
{
RxTxBD->RxBD[index].bd_cstatus = 0x8000; /* Empty */
}
else
{
/*-----------------------------------------------------*/
/* Last RX BD. Set the Empty, Wrap, and Interrupt bits */
/*-----------------------------------------------------*/
RxTxBD->RxBD[index].bd_cstatus = 0xB000;
}
}
/*-------------------*/
/* Initialize TxBDs */
/*-------------------*/
for (index=0; index < NUM_TXBDS; index++)
{
/*------------------------*/
/* load the buffer length */
/*------------------------*/
RxTxBD->TxBD[index].bd_length = (TX_BUFFER_SIZE-4);
/*--------------------------------------------------------*/
/* load the address of the data buffer in external memory */
/*--------------------------------------------------------*/
RxTxBD->TxBD[index].bd_addr = (UBYTE *)&TxBufferPool[index];
/*------------------------------------------*/
/* If this is not the final BD in the table */
/*------------------------------------------*/
if( index != (NUM_TXBDS-1) )
{
/*-------------------------------*/
/* Set Ready, PAD, Last, TC bits */
/*-------------------------------*/
RxTxBD->TxBD[index].bd_cstatus = 0xCC00;
}
/*------------------------------------------------------- */
/* If this is the final BD in the table set the WRAP bit */
/*------------------------------------------------------- */
else
{
/*-----------------------------------------*/
/* Set Ready, PAD, Wrap, Last, and TC bits */
/*-----------------------------------------*/
RxTxBD->TxBD[index].bd_cstatus = 0xEC00;
}
}
} /* end InitBDs */
/*-------------------------------------------------------------------------
*
* FUNCTION NAME: LoadTxBuffers
*
*
* DESCRIPTION:
*
* This function loads all 8 Tx buffers with Ethernet header
* information, followed by the following data patterns:
*
* Buffer 0: 0x55
* Buffer 1: 0xAA
* Buffer 2: 0x00
* Buffer 3: 0xFF
* Buffer 4: Increasing Walking Ones
* Buffer 5: Decreasing Walking Ones
* Buffer 6: Increment from 0
* Buffer 7: Decrement from 255
*
* The Tx buffers are initialized as shown:
*
* | | |
* DEST ADDR | SOURCE ADDR | TYPE\LENGTH | DATA
* (6 bytes) | (6 bytes) | (2 bytes) | (238 bytes)
*
* This results in a total of 252 bytes. Ethernet's 32-bit CRC is
* transmitted after the last data byte, so the Rx buffers receive
* 252 + 4 = 256 bytes.
*
* EXTERNAL EFFECTS:
*
* BufferPool
*
* PARAMETERS: none
*
* RETURNS: none
*
*-------------------------------------------------------------------------*/
void LoadTxBuffers()
{
UHWORD index, pattern, bufcount;
/*---------------------------------------------------*/
/* Load buffers 0 through 3 with the following data */
/* patterns: */
/* */
/* Buffer[0] = 0x55 */
/* Buffer[1] = 0xAA */
/* Buffer[2] = 0x00 */
/* Buffer[3] = 0xFF */
/*---------------------------------------------------*/
for (index = 12; index < (TX_BUFFER_SIZE-4); index++)
{
TxBufferPool[0][index] = 0x55;
TxBufferPool[1][index] = 0xAA;
TxBufferPool[2][index] = 0x00;
TxBufferPool[3][index] = 0xFF;
}
/*-----------------------------------------*/
/* Buffer[4]: Load increasing walking ones */
/*-----------------------------------------*/
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