/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : IO_Map.C
**     Project   : Project
**     Processor : MC9S08DZ60MLF
**     Beantype  : IO_Map
**     Version   : Driver 01.06
**     Compiler  : CodeWarrior HCS08 C Compiler
**     Date/Time : 2008-12-10, 上午 09:28
**     Abstract  :
**         IO_Map.h - implements an IO device's mapping. 
**         This module contains symbol definitions of all peripheral 
**         registers and bits. 
**     Settings  :
**
**     Contents  :
**         No public methods
**
**     (c) Copyright UNIS, spol. s r.o. 1997-2006
**     UNIS, spol. s r.o.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : info@processorexpert.com
** ###################################################################*/
/* Based on CPU DB MC9S08DZ60_48, version 2.87.131 (RegistersPrg V2.18) */
/* DataSheet : MC9S08DZ60 Rev. 1 Draft G 2/2007 */

#include "PE_types.h"
#include "IO_Map.h"

/*lint -save -esym(765, *) */


/* * * * *  8-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PTADSTR _PTAD;                                    /* Port A Data Register; 0x00000000 */
volatile PTADDSTR _PTADD;                                  /* Data Direction Register A; 0x00000001 */
volatile PTBDSTR _PTBD;                                    /* Port B Data Register; 0x00000002 */
volatile PTBDDSTR _PTBDD;                                  /* Data Direction Register B; 0x00000003 */
volatile PTCDSTR _PTCD;                                    /* Port C Data Register; 0x00000004 */
volatile PTCDDSTR _PTCDD;                                  /* Data Direction Register C; 0x00000005 */
volatile PTDDSTR _PTDD;                                    /* Port D Data Register; 0x00000006 */
volatile PTDDDSTR _PTDDD;                                  /* Data Direction Register D; 0x00000007 */
volatile PTEDSTR _PTED;                                    /* Port E Data Register; 0x00000008 */
volatile PTEDDSTR _PTEDD;                                  /* Data Direction Register E; 0x00000009 */
volatile PTFDSTR _PTFD;                                    /* Port F Data Register; 0x0000000A */
volatile PTFDDSTR _PTFDD;                                  /* Data Direction Register F; 0x0000000B */
volatile PTGDSTR _PTGD;                                    /* Port G Data Register; 0x0000000C */
volatile PTGDDSTR _PTGDD;                                  /* Data Direction Register G; 0x0000000D */
volatile ACMP1SCSTR _ACMP1SC;                              /* Analog Comparator 1 Status and Control Register; 0x0000000E */
volatile ACMP2SCSTR _ACMP2SC;                              /* Analog Comparator 2 Status and Control Register; 0x0000000F */
volatile ADCSC1STR _ADCSC1;                                /* Status and Control Register; 0x00000010 */
volatile ADCSC2STR _ADCSC2;                                /* Status and Control Register 2; 0x00000011 */
volatile ADCCFGSTR _ADCCFG;                                /* Configuration Register; 0x00000016 */
volatile APCTL1STR _APCTL1;                                /* ADC Pin Control 1 Register; 0x00000017 */
volatile APCTL2STR _APCTL2;                                /* ADC Pin Control 2 Register; 0x00000018 */
volatile APCTL3STR _APCTL3;                                /* ADC Pin Control 3 Register; 0x00000019 */
volatile IRQSCSTR _IRQSC;                                  /* Interrupt Request Status and Control Register; 0x0000001C */
volatile TPM1SCSTR _TPM1SC;                                /* TPM 1 Status and Control Register; 0x00000020 */
volatile TPM1C0SCSTR _TPM1C0SC;                            /* TPM 1 Timer Channel 0 Status and Control Register; 0x00000025 */
volatile TPM1C1SCSTR _TPM1C1SC;                            /* TPM 1 Timer Channel 1 Status and Control Register; 0x00000028 */
volatile TPM1C2SCSTR _TPM1C2SC;                            /* TPM 1 Timer Channel 2 Status and Control Register; 0x0000002B */
volatile TPM1C3SCSTR _TPM1C3SC;                            /* TPM 1 Timer Channel 3 Status and Control Register; 0x0000002E */
volatile TPM1C4SCSTR _TPM1C4SC;                            /* TPM 1 Timer Channel 4 Status and Control Register; 0x00000031 */
volatile TPM1C5SCSTR _TPM1C5SC;                            /* TPM 1 Timer Channel 5 Status and Control Register; 0x00000034 */
volatile SCI1C1STR _SCI1C1;                                /* SCI1 Control Register 1; 0x0000003A */
volatile SCI1C2STR _SCI1C2;                                /* SCI1 Control Register 2; 0x0000003B */
volatile SCI1S1STR _SCI1S1;                                /* SCI1 Status Register 1; 0x0000003C */
volatile SCI1S2STR _SCI1S2;                                /* SCI1 Status Register 2; 0x0000003D */
volatile SCI1C3STR _SCI1C3;                                /* SCI1 Control Register 3; 0x0000003E */
volatile SCI1DSTR _SCI1D;                                  /* SCI1 Data Register; 0x0000003F */
volatile SCI2C1STR _SCI2C1;                                /* SCI1 Control Register 1; 0x00000042 */
volatile SCI2C2STR _SCI2C2;                                /* SCI2 Control Register 2; 0x00000043 */
volatile SCI2S1STR _SCI2S1;                                /* SCI2 Status Register 1; 0x00000044 */
volatile SCI2S2STR _SCI2S2;                                /* SCI2 Status Register 2; 0x00000045 */
volatile SCI2C3STR _SCI2C3;                                /* SCI2 Control Register 3; 0x00000046 */
volatile SCI2DSTR _SCI2D;                                  /* SCI2 Data Register; 0x00000047 */
volatile MCGC1STR _MCGC1;                                  /* ICS Control Register 1; 0x00000048 */
volatile MCGC2STR _MCGC2;                                  /* ICS Control Register 2; 0x00000049 */
volatile MCGTRMSTR _MCGTRM;                                /* ICS Trim Register; 0x0000004A */
volatile MCGSCSTR _MCGSC;                                  /* MCG Status and Control Register; 0x0000004B */
volatile MCGC3STR _MCGC3;                                  /* MCG Control Register 3; 0x0000004C */
volatile SPIC1STR _SPIC1;                                  /* SPI Control Register 1; 0x00000050 */
volatile SPIC2STR _SPIC2;                                  /* SPI Control Register 2; 0x00000051 */
volatile SPIBRSTR _SPIBR;                                  /* SPI Baud Rate Register; 0x00000052 */
volatile SPISSTR _SPIS;                                    /* SPI Status Register; 0x00000053 */
volatile SPIDSTR _SPID;                                    /* SPI Data Register; 0x00000055 */
volatile IICASTR _IICA;                                    /* IIC Address Register; 0x00000058 */
volatile IICFSTR _IICF;                                    /* IIC Frequency Divider Register; 0x00000059 */
volatile IICC1STR _IICC1;                                  /* IIC Control Register 1; 0x0000005A */
volatile IICSSTR _IICS;                                    /* IIC Status Register; 0x0000005B */
volatile IICDSTR _IICD;                                    /* IIC Data I/O Register; 0x0000005C */
volatile IICC2STR _IICC2;                                  /* IIC Control Register 2; 0x0000005D */
volatile TPM2SCSTR _TPM2SC;                                /* TPM 2 Status and Control Register; 0x00000060 */
volatile TPM2C0SCSTR _TPM2C0SC;                            /* TPM 2 Timer Channel 0 Status and Control Register; 0x00000065 */
volatile TPM2C1SCSTR _TPM2C1SC;                            /* TPM 2 Timer Channel 1 Status and Control Register; 0x00000068 */
volatile RTCSCSTR _RTCSC;                                  /* RTC Status and Control Register; 0x0000006C */
volatile RTCCNTSTR _RTCCNT;                                /* RTC Counter Register; 0x0000006D */
volatile RTCMODSTR _RTCMOD;                                /* RTC Modulo Register; 0x0000006E */
volatile SRSSTR _SRS;                                      /* System Reset Status; 0x00001800 */
volatile SBDFRSTR _SBDFR;                                  /* System Background Debug Force Reset Register; 0x00001801 */
volatile SOPT1STR _SOPT1;                                  /* System Options Register 1; 0x00001802 */
volatile SOPT2STR _SOPT2;                                  /* System Options Register 2; 0x00001803 */
volatile SPMSC1STR _SPMSC1;                                /* System Power Management Status and Control 1 Register; 0x00001809 */
volatile SPMSC2STR _SPMSC2;                                /* System Power Management Status and Control 2 Register; 0x0000180A */
volatile DBGCAHSTR _DBGCAH;                                /* Debug Comparator A High Register; 0x00001810 */
volatile DBGCALSTR _DBGCAL;                                /* Debug Comparator A Low Register; 0x00001811 */
volatile DBGCBHSTR _DBGCBH;                                /* Debug Comparator B High Register; 0x00001812 */
volatile DBGCBLSTR _DBGCBL;                                /* Debug Comparator B Low Register; 0x00001813 */
volatile DBGCSTR _DBGC;                                    /* Debug Control Register; 0x00001816 */
volatile DBGTSTR _DBGT;                                    /* Debug Trigger Register; 0x00001817 */
volatile DBGSSTR _DBGS;                                    /* Debug Status Register; 0x00001818 */
volatile FCDIVSTR _FCDIV;                                  /* FLASH and EEPROM Clock Divider Register; 0x00001820 */
volatile FOPTSTR _FOPT;                                    /* FLASH and EEPROM Options Register; 0x00001821 */
volatile FCNFGSTR _FCNFG;                                  /* FLASH and EEPROM Configuration Register; 0x00001823 */
volatile FPROTSTR _FPROT;                                  /* FLASH and EEPROM Protection Register; 0x00001824 */
volatile FSTATSTR _FSTAT;                                  /* FLASH and EEPROM Status Register; 0x00001825 */
volatile FCMDSTR _FCMD;                                    /* FLASH and EEPROM Command Register; 0x00001826 */
volatile PTAPESTR _PTAPE;                                  /* Pullup Enable for Port A; 0x00001840 */
volatile PTASESTR _PTASE;                                  /* Slew Rate Control Enable for Port A; 0x00001841 */
volatile PTADSSTR _PTADS;                                  /* Output Drive Strength Selection for Port A; 0x00001842 */
volatile PTASCSTR _PTASC;                                  /* Port A Interrupt Status and Control Register; 0x00001844 */
volatile PTAPSSTR _PTAPS;                                  /* Port A Interrupt Pin Select Register; 0x00001845 */
volatile PTAESSTR _PTAES;                                  /* Port A Interrupt Edge Select Register; 0x00001846 */
volatile PTBPESTR _PTBPE;                                  /* Pullup Enable for Port B; 0x00001848 */
volatile PTBSESTR _PTBSE;                                  /* Slew Rate Control Enable for Port B; 0x00001849 */
volatile PTBDSSTR _PTBDS;                                  /* Output Drive Strength Selection for Port B; 0x0000184A */