?? em78p468.inc
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mCNT2EN == 0x02 ; Counter 2 Enable Bit
mCNT1EN == 0x01 ; Counter 1 Enable Bit
;}
;
; System Clock, Booster Frequency and PLL Frequency Control Register
;
RD == 0X0D
SBPCR == 0X0D
;
;{
; bit 7 not use
CLK2 == 0x06 ; Main Clock Select Bit[2] for PLL Mode
CLK1 == 0x05 ; Main Clock Select Bit[1] for PLL Mode
CLK0 == 0x04 ; Main Clock Select Bit[0] for PLL Mode
;
; |-----|-----|-----|----------|
; |CLK2 |CLK1 |CLK0 | PLL FREQ |
; |-----|-----|-----|----------|
; | 0 | 0 | 0 | 4.260 MHz|
; | 0 | 0 | 1 | 2.130 MHz|
; | 0 | 1 | 0 | 1.065 MHz|
; | 0 | 1 | 1 | 532.5 KHz|
; | 1 | X | X | 8.000 MHz|
; |-----|-----|-----|----------|
;
IDLE == 0x03 ; IDLE Mode Select Bit
; "0"+SLEP -> Sleep Mode
; "1"+SLEP -> IDLE Mode
BF1 == 0x02 ; LCD Booster Frequency Select Bit[1]
BF0 == 0x01 ; LCD Booster Frequency Select Bit[0]
;
; |-----|-----|------------|
; | BF1 | BF0 |BOOSTER FREQ|
; |-----|-----|------------|
; | 0 | 0 | FS |
; | 0 | 1 | FS/4 |
; | 1 | 0 | FS/8 |
; | 1 | 1 | FS/16 |
; |-----|-----|------------|
;
CPUS == 0x00 ; CPU oscillator Source Select Bit.
; "0" : run on Sub Oscillator
; "1" : run on Main Oscillator
;
; bit 7 not use
mCLK2 == 0x40 ; Main Clock Select Bit[2] for PLL Mode
mCLK1 == 0x20 ; Main Clock Select Bit[1] for PLL Mode
mCLK0 == 0x10 ; Main Clock Select Bit[0] for PLL Mode
mIDLE == 0x08 ; IDLE Mode Select Bit
mBF1 == 0x04 ; LCD Booster Frequency Select Bit[1]
mBF0 == 0x02 ; LCD Booster Frequency Select Bit[0]
mCPUS == 0x01 ; CPU oscillator Source Select Bit.
;}
;
; IR (Infrared) Control and PORT5 External Function Pins Set Register
;
RE == 0X0E
IRCR == 0X0E
;
;{
IRE == 0x07 ; IR/PWM Enable Bit.
; "0" : Disable
; "1" : Enable
HF == 0x06 ; IR/PWM Select Bit
; "0" : for PWM
; "1" : for IR
LGP == 0x05 ; Long Pulse, Only Output Low Pulse.
; "0" : Normal
; "1" : Only Output LPWT (Include Carrier Freq.)
; bit 4 not use
IROUTE == 0x03 ; Control Bit is used to define the function of P5.7(IROUT) Pin
; "0" : P5.7,bi-directional I/O Pin.
; "1" : IROUT Pin. The bit7 of IOC50 must be set to "0"
TCCE == 0x02 ; Control Bit is used to define the function of P5.6(TCC) Pin
; "0" : P5.6,bi-directional I/O Pin.
; "1" : External input pin of TCC. The bit6 of IOC50 must be set to "1"
EINT1 == 0x01 ; Control Bit is used to define the function of P5.5(INT1) Pin
; "0" : P5.5,bi-directional I/O Pin.
; "1" : INT1,External Interrupt Pin. The bit5 of IOC50 must be set to "1"
EINT0 == 0x00 ; Control Bit is used to define the function of P5.4(INT0) Pin
; "0" : P5.4,bi-directional I/O Pin.
; "1" : INTO,External Interrupt Pin. The bit4 of IOC50 must be set to "1"
;
mIRE == 0x80 ; IR/PWM Enable Bit.
mHF == 0x40 ; IR/PWM Select Bit.
mLGP == 0x20 ; Long Pulse, Only Output Low Pulse.
mIROUTE == 0x08 ; Control Bit is used to define the function of P5.7(IROUT) Pin
mTCCE == 0x04 ; Control Bit is used to define the function of P5.6(TCC) Pin
mEINT1 == 0x02 ; Control Bit is used to define the function of P5.5(INT1) Pin
mEINT0 == 0x01 ; Control Bit is used to define the function of P5.4(INT0) Pin
;}
;
; Interrupt Status Register
;
RF == 0X0F
ISR == 0X0F
;
;{
; Totally "0" : Interrupt not Occur
; "1" : Interrupt Occur
;
ICIF == 0x07 ; Pin Change Wake Up Interrupt Flag
LPWTF == 0x06 ; Low Pulse Width Timer Interrupt Flag
HPWTF == 0x05 ; High Pulse Width Timer Interrupt Flag
CNT2F == 0x04 ; Counter 2 Interrupt Flag
CNT1F == 0x03 ; Counter 1 Interrupt Flag
INT1F == 0x02 ; INT1 Interrupt Flag
INT0F == 0x01 ; INT0 Interrupt Flag
TCIF == 0x00 ; TCC Interrupt Flag
;
mICIF == 0x80 ; Pin Change Wake Up Interrupt Flag
mLPWTF == 0x40 ; Low Pulse Width Timer Interrupt Flag
mHPWTF == 0x20 ; High Pulse Width Timer Interrupt Flag
mCNT2F == 0x10 ; Counter 2 Interrupt Flag
mCNT1F == 0x08 ; Counter 1 Interrupt Flag
mINT1F == 0x04 ; INT1 Interrupt Flag
mINT0F == 0x02 ; INT0 Interrupt Flag
mTCIF == 0x01 ; TCC Interrupt Flag
;}
;
;======================================================;
; Register R10~R3F ;
;======================================================;
;
; (R10 ~ R3F): General Purpose Register
;
R10 == 0x10
R11 == 0x11
R12 == 0x12
R13 == 0x13
R14 == 0x14
R15 == 0x15
R16 == 0x16
R17 == 0x17
R18 == 0x18
R19 == 0x19
R1A == 0x1A
R1B == 0x1B
R1C == 0x1C
R1D == 0x1D
R1E == 0x1E
R1F == 0x1F
;
R20 == 0x20
R21 == 0x21
R22 == 0x22
R23 == 0x23
R24 == 0x24
R25 == 0x25
R26 == 0x26
R27 == 0x27
R28 == 0x28
R29 == 0x29
R2A == 0x2A
R2B == 0x2B
R2C == 0x2C
R2D == 0x2D
R2E == 0x2E
R2F == 0x2F
;
R30 == 0x30
R31 == 0x31
R32 == 0x32
R33 == 0x33
R34 == 0x34
R35 == 0x35
R36 == 0x36
R37 == 0x37
R38 == 0x38
R39 == 0x39
R3A == 0x3A
R3B == 0x3B
R3C == 0x3C
R3D == 0x3D
R3E == 0x3E
R3F == 0x3F
;
;==============================================================;
; Register IOC50 ~ IOCF0 ;
; Must be Set Bit0 of R5 to "0" and use IOW and IOR Instruction;
;==============================================================;
;
;PORT 5 I/O Control and PORT7,8 for LCD Segment Control Register
;
IOC50 == 0X05
P5CR == 0x05
;
;{ ; Bit[n]="1",Set P5.[n] as Input Pin, n=7~4
; Bit[n]="0",Set P5[n] as Output Pin, n=7~4
mIOC57 == 0x80 ;
mIOC56 == 0x40 ;
mIOC55 == 0x20 ;
mIOC54 == 0x10 ;
; "0" : for General I/O
; "1" : for LCD Segment
mP8HS == 0x08 ; Switch P8.4~7 to General I/O or to LCD Segment Pin(SEG28~31).
mP8LS == 0x04 ; Switch P8.0~3 to General I/O or to LCD Segment Pin(SEG24~27).
mP7HS == 0x02 ; Switch P7.4~7 to General I/O or to LCD Segment Pin(SEG20~23).
mP7LS == 0x01 ; Switch P8.0~3 to General I/O or to LCD Segment Pin(SEG16~19).
;}
;
; Port 6 I/O Control Register
;
IOC60 == 0X06
P6CR == 0x06
;
;{ ; Bit[n]="1", Set P6.[n] as Input Pin, n=7~0
; Bit[n]="0", Set P6.[n] as Output Pin, n=7~0
mIOC67 == 0x80 ;
mIOC66 == 0x40 ;
mIOC65 == 0x20 ;
mIOC64 == 0x10 ;
mIOC63 == 0x08 ;
mIOC62 == 0x04 ;
mIOC61 == 0x02 ;
mIOC60 == 0x01 ;
;}
;
; Port 7 I/O Control Register
;
IOC70 == 0X07
P7CR == 0x07
;
;{ ; Bit[n]="1", Set P7.[n] as Input Pin, n=7~0
; Bit[n]="0", Set P7.[n] as Output Pin, n=7~0
mIOC77 == 0x80 ;
mIOC76 == 0x40 ;
mIOC75 == 0x20 ;
mIOC74 == 0x10 ;
mIOC73 == 0x08 ;
mIOC72 == 0x04 ;
mIOC71 == 0x02 ;
mIOC70 == 0x01 ;
;}
;
; Port 8 I/O Control Register
;
IOC80 == 0X08
P8CR == 0x08
;
;{ ; Bit[n]="1", Set P8.[n] as Input Pin, n=7~0
; Bit[n]="0", Set P8.[n] as Output Pin, n=7~0
mIOC87 == 0x80 ;
mIOC86 == 0x40 ;
mIOC85 == 0x20 ;
mIOC84 == 0x10 ;
mIOC83 == 0x08 ;
mIOC82 == 0x04 ;
mIOC81 == 0x02 ;
mIOC80 == 0x01 ;
;}
;
; 128 Byte RAM Address
;
IOC90 == 0X09
RAM_ADDR == 0X09
;
; 128 Byte RAM Data Buffer
;
IOCA0 == 0X0A
RAM_DB == 0X0A
;
; Counter 1 Preset Register
;
IOCB0 == 0X0B
CNT1PR == 0X0B
;
; Counter 2 Preset Register
;
IOCC0 == 0X0C
CNT2PR == 0X0C
;
; High Pulse Width Timer Preset Register
;
IOCD0 == 0X0D
HPWTPR == 0X0D
;
; Low Pulse Width Timer Preset Register
;
IOCE0 == 0X0E
LPWTPR == 0X0E
;
; Interrupt Mask Register
;
IOCF0 == 0X0F
IMR == 0X0F
;
;{ ; "0" : Disable Interrupt.
; "1" : Enable Interrupt.
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