?? specctra.log,3
字號(hào):
# Total Conflicts: 845 (Cross: 500, Clear: 345, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 195
# Attempts 445 Successes 221 Failures 224 Vias 44
# Cpu Time = 0:00:08 Elapsed Time = 0:00:08
# End Pass 2 of 50
# <<ERROR:>> Smart Route: Design is unroutable, not enough resources.
# Many unroutes will exist if you use the filter command.
# Check number of layers, grids, design rules and placement.
# Cpu Time = 0:00:12 Elapsed Time = 0:00:12
#
# Design Rules --------------------------------------------
# Via Grid 0.0100 with offset 0.0000
# Layer TOP Horz Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# Layer BOTTOM Vert Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# ROUTING HISTORY ================================================================
# Pass | Conflicts | | | | | |Red| CPU Time |
# Name |No.| Cross| Clear|Fail|Unrte| Vias|XTalk|Len.| % | Pass | Total |
#----------+---+------+------+----+-----+-----+-----+----+---+---------+---------|
# Bus | 0| 0| 20| 104| 319| 26| 0| 0| | 0:00:00| 0:00:00|
# Route | 1| 400| 89| 313| 236| 24| 0| 0| 0| 0:00:02| 0:00:02|
# Route | 2| 711| 359| 297| 200| 31| 0| 0| 0| 0:00:05| 0:00:07|
# Route | 3| 707| 312| 308| 196| 34| 0| 0| 4| 0:00:07| 0:00:14|
# Route | 4| 767| 265| 242| 186| 28| 0| 0| 0| 0:00:08| 0:00:22|
# Route | 5| 774| 267| 233| 183| 28| 0| 0| 0| 0:00:05| 0:00:27|
# Route | 6| 523| 42| 204| 214| 28| 0| 0| 45| 0:00:07| 0:00:34|
# Route | 7| 581| 56| 200| 208| 26| 0| 0| 0| 0:00:06| 0:00:40|
# Route | 8| 432| 101| 217| 213| 29| 0| 0| 16| 0:00:08| 0:00:48|
# Route | 9| 434| 83| 218| 210| 29| 0| 0| 3| 0:00:07| 0:00:55|
# Route | 10| 579| 162| 221| 195| 31| 0| 0| 0| 0:00:08| 0:01:03|
# Route | 11| 319| 33| 41| 220| 32| 0| 0| 52| 0:00:03| 0:01:06|
# Route | 12| 293| 40| 48| 224| 32| 0| 0| 5| 0:00:03| 0:01:09|
# Route | 13| 359| 27| 46| 219| 34| 0| 0| 0| 0:00:04| 0:01:13|
# Route | 14| 223| 36| 58| 230| 36| 0| 0| 32| 0:00:03| 0:01:16|
# Route | 15| 269| 29| 54| 225| 34| 0| 0| 0| 0:00:04| 0:01:20|
# Route | 16| 306| 37| 40| 224| 33| 0| 0| 0| 0:00:03| 0:01:23|
# Route | 17| 194| 26| 57| 235| 33| 0| 0| 35| 0:00:03| 0:01:26|
# Route | 18| 235| 36| 58| 230| 33| 0| 0| 0| 0:00:03| 0:01:29|
# Route | 19| 214| 34| 54| 232| 33| 0| 0| 8| 0:00:04| 0:01:33|
# Route | 20| 238| 29| 228| 228| 39| 0| 0| 0| 0:00:07| 0:01:40|
# Route | 21| 209| 25| 218| 231| 39| 0| 0| 12| 0:00:05| 0:01:45|
# Route | 22| 209| 22| 221| 231| 41| 0| 0| 1| 0:00:06| 0:01:51|
# Route | 23| 206| 23| 224| 230| 43| 0| 0| 0| 0:00:06| 0:01:57|
# Route | 24| 184| 22| 232| 234| 43| 0| 0| 10| 0:00:07| 0:02:04|
# Route | 25| 179| 24| 231| 234| 43| 0| 0| 1| 0:00:05| 0:02:09|
# Clean | 26| 179| 24| 373| 232| 43| 0| 0| | 0:00:01| 0:02:10|
# Clean | 27| 176| 23| 371| 232| 44| 0| 0| | 0:00:03| 0:02:13|
# Route | 28| 207| 38| 221| 228| 44| 0| 0| 0| 0:00:03| 0:02:16|
# Route | 29| 500| 345| 224| 195| 44| 0| 0| 0| 0:00:08| 0:02:24|
# Conflicts between polygon wires and fixed objects: 0
# Stub Violations: 0
# Net Order Violations: 0
# Diffpair Uncoupled Length Violations: 0
# Diffpair Phase Tolerance Violations: 0
# Total layerset violations: 0
# Total layerset violations (exclude Fanout/Stagger/XNet Short side): 0
# Overall Routing Time: 0:02:24
#
# Wiring Statistics ----------------- F:/wenjian/第十一章/自動(dòng)布線\Autorouted.dsn
# Nets 182 Connections 572 Unroutes 195
# Signal Layers 2 Power Layers 2
# Wire Junctions 137, at vias 39 Total Vias 44
# Percent Connected 20.45
# Manhattan Length 350385.8600 Horizontal 165830.4680 Vertical 184555.3920
# Routed Length 301825.7422 Horizontal 133555.5720 Vertical 178231.9700
# Ratio Actual / Manhattan 0.8614
# Unconnected Length 65229.8100 Horizontal 36616.0000 Vertical 28613.8100
# <<ERROR:>> Smart Route: Smart_route command aborting due to failures.
write routes (changed_only) (reset_changed) C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaac02804.tmp
# Routing Written to File C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaac02804.tmp
# Loading Do File C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaae02804.tmp ...
# All Components Unselected.
# All Nets Unselected.
# Net V12P Selected.
# Net N17221 Selected.
# Net VD6 Selected.
# Net RA3 Selected.
# Net RA0 Selected.
# Net RA7 Selected.
# Net RD5 Selected.
# Net RA6 Selected.
# Net N17080 Selected.
# Net N17084 Selected.
# Net RD2 Selected.
# Net N17088 Selected.
# Net RA2 Selected.
# Net VD0 Selected.
# Net VD3 Selected.
# Net N17100 Selected.
# Net N17096 Selected.
# Net N17092 Selected.
# Net N17048 Selected.
# Net GND_POWER Selected.
# Net N17104 Selected.
# Net N17044 Selected.
# Net N17052 Selected.
# Net N16732 Selected.
# Net VD2 Selected.
# Net VD1 Selected.
# Net VD4 Selected.
# Net VD3 Selected.
# Net VD0 Selected.
# Net VD5 Selected.
# Net SEL Selected.
# Net VREF Selected.
# Net N29715 Selected.
# Net VD7 Selected.
# Net N29863 Selected.
# Net N30149 Selected.
# Net N30003 Selected.
# Net HS Selected.
# Net FPGA Selected.
# Net N17361_4621 Selected.
# Net N17221_4624 Selected.
# Net BRESET Selected.
# Net BRD Selected.
# Net BWR Selected.
# Net N17197_4623 Selected.
# Net MWR Selected.
# Net RDY Selected.
# Net DDIR Selected.
# Net AEN Selected.
# Net MRD Selected.
# Net DHEN Selected.
# Net DEN Selected.
# Net D10 Selected.
# Net D13 Selected.
# Net D6 Selected.
# Net BD5 Selected.
# Net N17361 Selected.
# Net N17197 Selected.
# Net BD1 Selected.
# Net BD2 Selected.
# Net BD4 Selected.
# Net D7 Selected.
# Net BD6 Selected.
# Net BD8 Selected.
# Net D0 Selected.
# Net D3 Selected.
# Net BD7 Selected.
# Net BD9 Selected.
# Net D4 Selected.
# Net D5 Selected.
# Net D9 Selected.
# Net BD11 Selected.
# Net BD10 Selected.
# Net BD13 Selected.
# Net BD12 Selected.
# Net D2 Selected.
# Net BD13 Selected.
# Net BD10 Selected.
# Net BD14 Selected.
# Net D1 Selected.
# Net D14 Selected.
# Net D3 Selected.
# Net D0 Selected.
# Net BD15 Selected.
# Net D15 Selected.
# Net BA0 Selected.
# Net BA3 Selected.
# Net BA1 Selected.
# Net BA4 Selected.
# Net D13 Selected.
# Net D10 Selected.
# Net BA2 Selected.
# Net BA3 Selected.
# Net BA0 Selected.
# Net BA5 Selected.
# Net D11 Selected.
# Net BA6 Selected.
# Net D12 Selected.
# Net V12N Selected.
# Net AGND Selected.
# Net VCLKA Selected.
# Net Q7 Selected.
# Net Q5 Selected.
# Net Q1 Selected.
# Net Q3 Selected.
# Net D8 Selected.
# Net Q0 Selected.
# Net Q6 Selected.
# Net Q4 Selected.
# Net A0 Selected.
# Net A3 Selected.
# Net A1 Selected.
# Net DATA Selected.
# Net A2 Selected.
# Net NCS Selected.
# Net RWE Selected.
# Net OE Selected.
# Net Q2 Selected.
# Net A3 Selected.
# Net A0 Selected.
# Net A4 Selected.
# Net A5 Selected.
# Net GAIN Selected.
# Net OUTB Selected.
# Net A6 Selected.
# Net A7 Selected.
# Net N16740 Selected.
# Net N16748 Selected.
# Net A8 Selected.
# Net RCS0 Selected.
# Net RCS3 Selected.
# Net N17056 Selected.
# Net A9 Selected.
# Net RCS2 Selected.
# Net A10 Selected.
# Net A13 Selected.
# Net A11 Selected.
# Net N17060 Selected.
# Net A12 Selected.
# Net RA1 Selected.
# Net RCS1 Selected.
# Net N16748 Selected.
# Net N16740 Selected.
# Net A13 Selected.
# Net A10 Selected.
# Net N17064 Selected.
# Net WSTAT Selected.
# Net OUTA Selected.
# Net A14 Selected.
# Net A15 Selected.
# Net GND_EARTH Selected.
# Net BNC2 Selected.
# Net N17068 Selected.
# Net A16 Selected.
# Net A17 Selected.
# Net RA0 Selected.
# Net RA3 Selected.
# Net BNC3 Selected.
# Net A18 Selected.
# Net A19 Selected.
# Net N16756 Selected.
# Net A20 Selected.
# Net A23 Selected.
# Net RD7 Selected.
# Net RD6 Selected.
# Net RA11 Selected.
# Net N17072 Selected.
# Net A21 Selected.
# Net RA9 Selected.
# Net A22 Selected.
# Net A23 Selected.
# Net A20 Selected.
# Net RA8 Selected.
# Net RA5 Selected.
# Net N17076 Selected.
# Net RD3 Selected.
# Net RD0 Selected.
# Net RD0 Selected.
# Net RD3 Selected.
# Net RD4 Selected.
# Net RA4 Selected.
# Net RA15 Selected.
# Net RA13 Selected.
# Net RA10 Selected.
# Net RD1 Selected.
# Net RA12 Selected.
# Net DCLK Selected.
# Net RA14 Selected.
# Net RA10 Selected.
# Net RA13 Selected.
# <<WARNING:>> Unrecognized net +UNUSED_PINS+
# <<WARNING:>> Unrecognized net orphan_net
# <<WARNING:>> Unrecognized net orphan_net
# All Selected Wires Unprotected.
# <<WARNING:>> Protected wire of net GND_POWER was not deleted.
# <<WARNING:>> Protected wire of net RA7 was not deleted.
# <<WARNING:>> Protected wire of net VD0 was not deleted.
# All unprotected selected wires were deleted.
# Current time = Mon May 04 11:28:01 2009
# Total Conflicts: 0 (Cross: 0, Clear: 0, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Cpu Time = 0:00:00 Elapsed Time = 0:00:00
#
# Wiring Statistics ----------------- F:/wenjian/第十一章/自動(dòng)布線\Autorouted.dsn
# Nets 182 Connections 572 Unroutes 571
# Signal Layers 2 Power Layers 2
# Wire Junctions 5, at vias 2 Total Vias 3
# Percent Connected 0.17
# Manhattan Length 339717.0000 Horizontal 161402.8020 Vertical 178314.1980
# Routed Length 2091.4875 Horizontal 1151.9000 Vertical 1078.0000
# Ratio Actual / Manhattan 0.0062
# Unconnected Length 339287.0800 Horizontal 150258.8300 Vertical 189028.2500
# All Components Unselected.
# All Nets Unselected.
# Current time = Mon May 04 11:28:01 2009
# <<WARNING:>> Redundant wire deleted from net RA3
# <<WARNING:>> Redundant wire deleted from net RA7
# <<WARNING:>> Redundant via deleted from net VD0
# <<WARNING:>> Redundant wire deleted from net VD0
# <<WARNING:>> Redundant wire deleted from net VD0
# <<WARNING:>> Redundant via deleted from net VD0
# <<WARNING:>> Redundant wire deleted from net GND_POWER
# <<WARNING:>> Redundant via deleted from net GND_POWER
# <<WARNING:>> Redundant wire deleted from net VD3
# <<WARNING:>> Redundant wire deleted from net VD3
# <<WARNING:>> 10 redundant wires and vias were deleted
# Nets Processed 184, Net Terminals 869
# Signal Connections Created 141
#
# Design Rules --------------------------------------------
# Via Grid 0.0100 with offset 0.0000
# Layer TOP Horz Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# Layer BOTTOM Vert Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# Total Conflicts: 20 (Cross: 0, Clear: 20, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Cpu Time = 0:00:00 Elapsed Time = 0:00:01
#
# Wiring Statistics ----------------- F:/wenjian/第十一章/自動(dòng)布線\Autorouted.dsn
# Nets 184 Connections 572 Unroutes 326
# Signal Layers 2 Power Layers 2
# Wire Junctions 73, at vias 21 Total Vias 26
# Percent Connected 41.26
# Manhattan Length 351864.4000 Horizontal 167252.7020 Vertical 184611.6980
# Routed Length 173423.4054 Horizontal 76412.4600 Vertical 110645.9800
# Ratio Actual / Manhattan 0.4929
# Unconnected Length 180579.6800 Horizontal 87868.2300 Vertical 92711.4500
# Net Orphan_net Fixed.
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