/*
 * File: c2812adcpwmtest.c
 *
 * Real-Time Workshop code generated for Simulink model c2812adcpwmtest.
 *
 * Model version                        : 1.138
 * Real-Time Workshop file version      : 6.3  (R14SP3)  26-Jul-2005
 * Real-Time Workshop file generated on : Thu Dec 11 22:05:31 2008
 * TLC version                          : 6.3 (Aug  5 2005)
 * C source code generated on           : Thu Dec 11 22:05:34 2008
 */

#include "c2812adcpwmtest.h"
#include "c2812adcpwmtest_private.h"

/* Block signals (auto storage) */
BlockIO_c2812adcpwmtest c2812adcpwmtest_B;

/* Real-time model */
RT_MODEL_c2812adcpwmtest c2812adcpwmtest_M_;
RT_MODEL_c2812adcpwmtest *c2812adcpwmtest_M = &c2812adcpwmtest_M_;

/* Set which subrates need to run this base step (base rate always runs).
 * This function must be called prior to calling the model step function
 * in order to "remember" which rates need to run this base step.  The
 * buffering of events allows for overlapping preemption.
 */
void c2812adcpwmtest_SetEventsForThisBaseStep(boolean_T *eventFlags)
{
  /* Task runs when its counter is zero, computed via rtmStepTask macro */
  eventFlags[1] = rtmStepTask(c2812adcpwmtest_M, 1);
}

/* This function implements a deterministic rate-monotonic multitasking
 * scheduler for a system with 2 rates.  The function is called by the
 * generated step function, hence the generated code self-manages all
 * its subrates.
 */
static void rate_monotonic_scheduler(void)
{

  /* Compute which subrates run during the next base time step.  Subrates
   * are an integer multiple of the base rate counter.  Therefore, the subtask
   * counter is reset when it reaches its limit (zero means run).
   */
  if (++c2812adcpwmtest_M->Timing.TaskCounters.TID[1] == 8) { /* Sample time: [0.0008s, 0.0s] */
    c2812adcpwmtest_M->Timing.TaskCounters.TID[1] = 0;
  }
}

/* Model step function for TID0 */
void c2812adcpwmtest_step0(void)        /* Sample time: [0.0001s, 0.0s] */
{
  /* local block i/o variables */
  uint16_T rtb_Gain1;

  {                                     /* Sample time: [0.0001s, 0.0s] */
    rate_monotonic_scheduler();
  }

  /* S-Function Block: <Root>/C28x ADC (c28xadc) */
  {
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 0x1; // Sequencer reset
    AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 0x1; // Software start of conversion  			               
    asm("    nop" );
    asm("    nop" );
    asm("    nop" );
    asm("    nop" );
    while (AdcRegs.ADCST.bit.SEQ1_BSY==0x1) {} //Wait for Sequencer Busy bit to clear 

    c2812adcpwmtest_B.C28xADC = (AdcRegs.ADCRESULT0) >> 4;
  }

  /* Gain: '<Root>/Gain1' */
  rtb_Gain1 = (uint16_T)((uint32_T)c2812adcpwmtest_B.C28xADC *
    (uint32_T)c2812adcpwmtest_P.Gain1_Gain);

  /* S-Function Block: <Root>/C28x PWM (c28xpwm) */
  {
    EvaRegs.CMPR1 = (uint16_T)rtb_Gain1;
  }
}

/* Model step function for TID1 */
void c2812adcpwmtest_step1(void)        /* Sample time: [0.0008s, 0.0s] */
{
  /* (no output/update code required) */
}

void c2812adcpwmtest_step(int_T tid) {

  switch(tid) {
   case 0 :
    c2812adcpwmtest_step0();
    break;
   case 1 :
    c2812adcpwmtest_step1();
    break;
   default :
    break;
  }
}

/* Model initialize function */

void c2812adcpwmtest_initialize(boolean_T firstTime)
{

  if (firstTime) {
    /* initialize real-time model */
    (void) memset((char_T
      *)c2812adcpwmtest_M,0,sizeof(RT_MODEL_c2812adcpwmtest));

    /* block I/O */
    (void) memset(((void *)
      &c2812adcpwmtest_B),0,sizeof(BlockIO_c2812adcpwmtest));

    /* initialize non-finites */
    rt_InitInfAndNaN(sizeof(real_T));

    InitAdc();

    config_ADC_A (0U, 0U, 0U, 0U, 0U);

    EALLOW;

    GpioMuxRegs.GPAMUX.all = 0x00FF;    // EVA PWM 1-6  pins
    config_PWM_A (64000.0,2,1,"INPUT_PORT",18500.0,
     0,"SPECIFY_VIA_DIALOG",18500.0,0,"SPECIFY_VIA_DIALOG",18500.0,1638,
     1, 0, 0, 4, 12, 0);
    EDIS;
  }
}

/* Model terminate function */

void c2812adcpwmtest_terminate(void)
{
  /* (no terminate code required) */
}

/* File trailer for Real-Time Workshop generated code.
 *
 * [EOF]
 */