library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity nw is
  port(clk: in std_logic;
       clear: in std_logic;                        --清零命令
       left:  in std_logic;                        --左移命令
       right: in std_logic;                        --右移命令
       busy:  in std_logic;                        --忙信號標志
       data : out std_logic_vector(7 downto 0);    --8位數據輸出
       req  : out std_logic);                      --請求信號
end entity nw;
architecture art of nw is
signal s:std_logic_vector(31 downto 0);         --漢字高位和低位的區位碼
signal n:std_logic_vector(3 downto 0);           --顯示十四個漢字的選擇信號
signal count:std_logic_vector(2 downto 0);            --五個字節命令的計數器
signal sel:std_logic;                                 --顯示十六個漢字的進位時鐘信號
signal gateclock:std_logic;                              --5個字節命令的計數器時鐘信號
signal scanclk:std_logic;                         --分頻時鐘信號
 begin
   process(clk,scanclk)
       variable scan: std_logic_vector(20 downto 0);         --分頻進程
       begin
          if clk'event and clk='1' then
                  if scan="111111111111111111111" then scan:="000000000000000000000";
                  else scan:=scan+1;
                  end if;
          end if;
       scanclk<=scan(3);
     end process;
  process(gateclock)             --5個字節計數器的進程
  begin 
  if gateclock'event and gateclock='1' then
       if count="100" then
         count<="000";
       else
         count<=count+1;
       end if;
    end if;
end process;
process (scanclk) is
begin
  if rising_edge(scanclk) then
     if busy = '0' then
       if clear = '1' then
          data<=x"f4";
        elsif right='1'  then
          data<=x"f8";
        elsif left='1'   then
          data<=x"f7"; 
       else
       case count is
         when "000"=>data<=x"f0";          sel<='0';
         when "001"=>data<=s(31 downto 24);
         when "010"=>data<=s(23 downto 16);sel<='1';
         when "011"=>data<=s(15 downto 8);
         when "100"=>data<=s(7 downto 0);
         when  others=>null;
       end case;
       end if;
     gateclock<='1';
     ELSE
     gateclock<='0';
     end if; 
    end if;
end process;
req<='1' when gateclock='1' else
     '0';
process(sel)
begin
if sel'event and sel='0' then
    n<=n+1;
         case n is
             when "0000"=> s<=x"00002217";   --分別是"xx,yy,qq,ww"    
             when "0001"=> s<=x"0100225E";    
             when "0010"=> s<=x"0200225E";    
             when "0011"=> s<=x"03002644";    
             when "0100"=> s<=x"0400303E";    
             when "0101"=> s<=x"05003416";    
             when "0110"=> s<=x"06003942";       
             when "0111"=> s<=x"0700030C";    
             when "1000"=> s<=x"00012E41";     
             when "1001"=> s<=x"01011D0B";    
             when "1010"=> s<=x"0201292F";    
             when "1011"=> s<=x"03012F22";    
             when "1100"=> s<=x"04011658";    
             when "1101"=> s<=x"05012753";
             when "1110"=> s<=x"06012B57";    
             when "1111"=> s<=x"07010103";       
             when others=>null;   
       end case; 
   end if;
end process;
end architecture;